gh_pwm.h 18 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_pwm.h
  5. **
  6. ** \brief Pulse Width Modulator.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_PWM_H
  18. #define _GH_PWM_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_PWM_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_PWM_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_PWM_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_PWM_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_PWM_ENABLE FIO_ADDRESS(PWM,0xA000A000) /* read/write */
  59. #define REG_PWM_CONTROL0 FIO_ADDRESS(PWM,0xA000A004) /* read/write */
  60. #define REG_PWM_CONTROL1 FIO_ADDRESS(PWM,0xA000A008) /* read/write */
  61. #define REG_PWM_MODE FIO_ADDRESS(PWM,0xA000A00C) /* read/write */
  62. /*----------------------------------------------------------------------------*/
  63. /* bit group structures */
  64. /*----------------------------------------------------------------------------*/
  65. typedef union { /* PWM_Enable */
  66. U32 all;
  67. struct {
  68. U32 enb : 1;
  69. U32 : 31;
  70. } bitc;
  71. } GH_PWM_ENABLE_S;
  72. typedef union { /* PWM_Control0 */
  73. U32 all;
  74. struct {
  75. U32 highcnt : 16;
  76. U32 lowcnt : 16;
  77. } bitc;
  78. } GH_PWM_CONTROL0_S;
  79. typedef union { /* PWM_Control1 */
  80. U32 all;
  81. struct {
  82. U32 highcnt : 16;
  83. U32 lowcnt : 16;
  84. } bitc;
  85. } GH_PWM_CONTROL1_S;
  86. typedef union { /* PWM_Mode */
  87. U32 all;
  88. struct {
  89. U32 divider : 10;
  90. U32 mode : 1;
  91. U32 : 21;
  92. } bitc;
  93. } GH_PWM_MODE_S;
  94. /*----------------------------------------------------------------------------*/
  95. /* mirror variables */
  96. /*----------------------------------------------------------------------------*/
  97. #ifdef __cplusplus
  98. extern "C" {
  99. #endif
  100. /*----------------------------------------------------------------------------*/
  101. /* register PWM_Enable (read/write) */
  102. /*----------------------------------------------------------------------------*/
  103. #if GH_INLINE_LEVEL == 0
  104. /*! \brief Writes the register 'PWM_Enable'. */
  105. void GH_PWM_set_Enable(U8 index, U32 data);
  106. /*! \brief Reads the register 'PWM_Enable'. */
  107. U32 GH_PWM_get_Enable(U8 index);
  108. /*! \brief Writes the bit group 'enb' of register 'PWM_Enable'. */
  109. void GH_PWM_set_Enable_enb(U8 index, U8 data);
  110. /*! \brief Reads the bit group 'enb' of register 'PWM_Enable'. */
  111. U8 GH_PWM_get_Enable_enb(U8 index);
  112. #else /* GH_INLINE_LEVEL == 0 */
  113. GH_INLINE void GH_PWM_set_Enable(U8 index, U32 data)
  114. {
  115. *(volatile U32 *)(REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)) = data;
  116. #if GH_PWM_ENABLE_DEBUG_PRINT
  117. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Enable] <-- 0x%08x\n",
  118. (REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)),data,data);
  119. #endif
  120. }
  121. GH_INLINE U32 GH_PWM_get_Enable(U8 index)
  122. {
  123. U32 value = (*(volatile U32 *)(REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)));
  124. #if GH_PWM_ENABLE_DEBUG_PRINT
  125. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Enable] --> 0x%08x\n",
  126. (REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)),value);
  127. #endif
  128. return value;
  129. }
  130. GH_INLINE void GH_PWM_set_Enable_enb(U8 index, U8 data)
  131. {
  132. GH_PWM_ENABLE_S d;
  133. d.all = *(volatile U32 *)(REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000));
  134. d.bitc.enb = data;
  135. *(volatile U32 *)(REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  136. #if GH_PWM_ENABLE_DEBUG_PRINT
  137. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Enable_enb] <-- 0x%08x\n",
  138. (REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  139. #endif
  140. }
  141. GH_INLINE U8 GH_PWM_get_Enable_enb(U8 index)
  142. {
  143. GH_PWM_ENABLE_S tmp_value;
  144. U32 value = (*(volatile U32 *)(REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)));
  145. tmp_value.all = value;
  146. #if GH_PWM_ENABLE_DEBUG_PRINT
  147. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Enable_enb] --> 0x%08x\n",
  148. (REG_PWM_ENABLE + index * FIO_MOFFSET(PWM,0x00001000)),value);
  149. #endif
  150. return tmp_value.bitc.enb;
  151. }
  152. #endif /* GH_INLINE_LEVEL == 0 */
  153. /*----------------------------------------------------------------------------*/
  154. /* register PWM_Control0 (read/write) */
  155. /*----------------------------------------------------------------------------*/
  156. #if GH_INLINE_LEVEL == 0
  157. /*! \brief Writes the register 'PWM_Control0'. */
  158. void GH_PWM_set_Control0(U8 index, U32 data);
  159. /*! \brief Reads the register 'PWM_Control0'. */
  160. U32 GH_PWM_get_Control0(U8 index);
  161. /*! \brief Writes the bit group 'HighCnt' of register 'PWM_Control0'. */
  162. void GH_PWM_set_Control0_HighCnt(U8 index, U16 data);
  163. /*! \brief Reads the bit group 'HighCnt' of register 'PWM_Control0'. */
  164. U16 GH_PWM_get_Control0_HighCnt(U8 index);
  165. /*! \brief Writes the bit group 'LowCnt' of register 'PWM_Control0'. */
  166. void GH_PWM_set_Control0_LowCnt(U8 index, U16 data);
  167. /*! \brief Reads the bit group 'LowCnt' of register 'PWM_Control0'. */
  168. U16 GH_PWM_get_Control0_LowCnt(U8 index);
  169. #else /* GH_INLINE_LEVEL == 0 */
  170. GH_INLINE void GH_PWM_set_Control0(U8 index, U32 data)
  171. {
  172. *(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)) = data;
  173. #if GH_PWM_ENABLE_DEBUG_PRINT
  174. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control0] <-- 0x%08x\n",
  175. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),data,data);
  176. #endif
  177. }
  178. GH_INLINE U32 GH_PWM_get_Control0(U8 index)
  179. {
  180. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)));
  181. #if GH_PWM_ENABLE_DEBUG_PRINT
  182. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control0] --> 0x%08x\n",
  183. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  184. #endif
  185. return value;
  186. }
  187. GH_INLINE void GH_PWM_set_Control0_HighCnt(U8 index, U16 data)
  188. {
  189. GH_PWM_CONTROL0_S d;
  190. d.all = *(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000));
  191. d.bitc.highcnt = data;
  192. *(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  193. #if GH_PWM_ENABLE_DEBUG_PRINT
  194. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control0_HighCnt] <-- 0x%08x\n",
  195. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  196. #endif
  197. }
  198. GH_INLINE U16 GH_PWM_get_Control0_HighCnt(U8 index)
  199. {
  200. GH_PWM_CONTROL0_S tmp_value;
  201. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)));
  202. tmp_value.all = value;
  203. #if GH_PWM_ENABLE_DEBUG_PRINT
  204. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control0_HighCnt] --> 0x%08x\n",
  205. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  206. #endif
  207. return tmp_value.bitc.highcnt;
  208. }
  209. GH_INLINE void GH_PWM_set_Control0_LowCnt(U8 index, U16 data)
  210. {
  211. GH_PWM_CONTROL0_S d;
  212. d.all = *(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000));
  213. d.bitc.lowcnt = data;
  214. *(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  215. #if GH_PWM_ENABLE_DEBUG_PRINT
  216. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control0_LowCnt] <-- 0x%08x\n",
  217. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  218. #endif
  219. }
  220. GH_INLINE U16 GH_PWM_get_Control0_LowCnt(U8 index)
  221. {
  222. GH_PWM_CONTROL0_S tmp_value;
  223. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)));
  224. tmp_value.all = value;
  225. #if GH_PWM_ENABLE_DEBUG_PRINT
  226. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control0_LowCnt] --> 0x%08x\n",
  227. (REG_PWM_CONTROL0 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  228. #endif
  229. return tmp_value.bitc.lowcnt;
  230. }
  231. #endif /* GH_INLINE_LEVEL == 0 */
  232. /*----------------------------------------------------------------------------*/
  233. /* register PWM_Control1 (read/write) */
  234. /*----------------------------------------------------------------------------*/
  235. #if GH_INLINE_LEVEL == 0
  236. /*! \brief Writes the register 'PWM_Control1'. */
  237. void GH_PWM_set_Control1(U8 index, U32 data);
  238. /*! \brief Reads the register 'PWM_Control1'. */
  239. U32 GH_PWM_get_Control1(U8 index);
  240. /*! \brief Writes the bit group 'HighCnt' of register 'PWM_Control1'. */
  241. void GH_PWM_set_Control1_HighCnt(U8 index, U16 data);
  242. /*! \brief Reads the bit group 'HighCnt' of register 'PWM_Control1'. */
  243. U16 GH_PWM_get_Control1_HighCnt(U8 index);
  244. /*! \brief Writes the bit group 'LowCnt' of register 'PWM_Control1'. */
  245. void GH_PWM_set_Control1_LowCnt(U8 index, U16 data);
  246. /*! \brief Reads the bit group 'LowCnt' of register 'PWM_Control1'. */
  247. U16 GH_PWM_get_Control1_LowCnt(U8 index);
  248. #else /* GH_INLINE_LEVEL == 0 */
  249. GH_INLINE void GH_PWM_set_Control1(U8 index, U32 data)
  250. {
  251. *(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)) = data;
  252. #if GH_PWM_ENABLE_DEBUG_PRINT
  253. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control1] <-- 0x%08x\n",
  254. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),data,data);
  255. #endif
  256. }
  257. GH_INLINE U32 GH_PWM_get_Control1(U8 index)
  258. {
  259. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)));
  260. #if GH_PWM_ENABLE_DEBUG_PRINT
  261. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control1] --> 0x%08x\n",
  262. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  263. #endif
  264. return value;
  265. }
  266. GH_INLINE void GH_PWM_set_Control1_HighCnt(U8 index, U16 data)
  267. {
  268. GH_PWM_CONTROL1_S d;
  269. d.all = *(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000));
  270. d.bitc.highcnt = data;
  271. *(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  272. #if GH_PWM_ENABLE_DEBUG_PRINT
  273. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control1_HighCnt] <-- 0x%08x\n",
  274. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  275. #endif
  276. }
  277. GH_INLINE U16 GH_PWM_get_Control1_HighCnt(U8 index)
  278. {
  279. GH_PWM_CONTROL1_S tmp_value;
  280. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)));
  281. tmp_value.all = value;
  282. #if GH_PWM_ENABLE_DEBUG_PRINT
  283. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control1_HighCnt] --> 0x%08x\n",
  284. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  285. #endif
  286. return tmp_value.bitc.highcnt;
  287. }
  288. GH_INLINE void GH_PWM_set_Control1_LowCnt(U8 index, U16 data)
  289. {
  290. GH_PWM_CONTROL1_S d;
  291. d.all = *(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000));
  292. d.bitc.lowcnt = data;
  293. *(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  294. #if GH_PWM_ENABLE_DEBUG_PRINT
  295. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Control1_LowCnt] <-- 0x%08x\n",
  296. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  297. #endif
  298. }
  299. GH_INLINE U16 GH_PWM_get_Control1_LowCnt(U8 index)
  300. {
  301. GH_PWM_CONTROL1_S tmp_value;
  302. U32 value = (*(volatile U32 *)(REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)));
  303. tmp_value.all = value;
  304. #if GH_PWM_ENABLE_DEBUG_PRINT
  305. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Control1_LowCnt] --> 0x%08x\n",
  306. (REG_PWM_CONTROL1 + index * FIO_MOFFSET(PWM,0x00001000)),value);
  307. #endif
  308. return tmp_value.bitc.lowcnt;
  309. }
  310. #endif /* GH_INLINE_LEVEL == 0 */
  311. /*----------------------------------------------------------------------------*/
  312. /* register PWM_Mode (read/write) */
  313. /*----------------------------------------------------------------------------*/
  314. #if GH_INLINE_LEVEL == 0
  315. /*! \brief Writes the register 'PWM_Mode'. */
  316. void GH_PWM_set_Mode(U8 index, U32 data);
  317. /*! \brief Reads the register 'PWM_Mode'. */
  318. U32 GH_PWM_get_Mode(U8 index);
  319. /*! \brief Writes the bit group 'divider' of register 'PWM_Mode'. */
  320. void GH_PWM_set_Mode_divider(U8 index, U16 data);
  321. /*! \brief Reads the bit group 'divider' of register 'PWM_Mode'. */
  322. U16 GH_PWM_get_Mode_divider(U8 index);
  323. /*! \brief Writes the bit group 'mode' of register 'PWM_Mode'. */
  324. void GH_PWM_set_Mode_mode(U8 index, U8 data);
  325. /*! \brief Reads the bit group 'mode' of register 'PWM_Mode'. */
  326. U8 GH_PWM_get_Mode_mode(U8 index);
  327. #else /* GH_INLINE_LEVEL == 0 */
  328. GH_INLINE void GH_PWM_set_Mode(U8 index, U32 data)
  329. {
  330. GH_PWM_MODE_S d;
  331. d.all = (*(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)));
  332. d.bitc.mode = data;
  333. *(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  334. #if GH_PWM_ENABLE_DEBUG_PRINT
  335. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Mode] <-- 0x%08x\n",
  336. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),data,data);
  337. #endif
  338. }
  339. GH_INLINE U32 GH_PWM_get_Mode(U8 index)
  340. {
  341. U32 value = (*(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)));
  342. #if GH_PWM_ENABLE_DEBUG_PRINT
  343. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Mode] --> 0x%08x\n",
  344. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),value);
  345. #endif
  346. return value;
  347. }
  348. GH_INLINE void GH_PWM_set_Mode_divider(U8 index, U16 data)
  349. {
  350. GH_PWM_MODE_S d;
  351. d.all = *(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000));
  352. d.bitc.divider = data;
  353. *(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  354. #if GH_PWM_ENABLE_DEBUG_PRINT
  355. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Mode_divider] <-- 0x%08x\n",
  356. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  357. #endif
  358. }
  359. GH_INLINE U16 GH_PWM_get_Mode_divider(U8 index)
  360. {
  361. GH_PWM_MODE_S tmp_value;
  362. U32 value = (*(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)));
  363. tmp_value.all = value;
  364. #if GH_PWM_ENABLE_DEBUG_PRINT
  365. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Mode_divider] --> 0x%08x\n",
  366. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),value);
  367. #endif
  368. return tmp_value.bitc.divider;
  369. }
  370. GH_INLINE void GH_PWM_set_Mode_mode(U8 index, U8 data)
  371. {
  372. GH_PWM_MODE_S d;
  373. d.all = *(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000));
  374. d.bitc.mode = data;
  375. *(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)) = d.all;
  376. #if GH_PWM_ENABLE_DEBUG_PRINT
  377. GH_PWM_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_PWM_set_Mode_mode] <-- 0x%08x\n",
  378. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),d.all,d.all);
  379. #endif
  380. }
  381. GH_INLINE U8 GH_PWM_get_Mode_mode(U8 index)
  382. {
  383. GH_PWM_MODE_S tmp_value;
  384. U32 value = (*(volatile U32 *)(REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)));
  385. tmp_value.all = value;
  386. #if GH_PWM_ENABLE_DEBUG_PRINT
  387. GH_PWM_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_PWM_get_Mode_mode] --> 0x%08x\n",
  388. (REG_PWM_MODE + index * FIO_MOFFSET(PWM,0x00001000)),value);
  389. #endif
  390. return tmp_value.bitc.mode;
  391. }
  392. #endif /* GH_INLINE_LEVEL == 0 */
  393. /*----------------------------------------------------------------------------*/
  394. /* init function */
  395. /*----------------------------------------------------------------------------*/
  396. /*! \brief Initialises the registers and mirror variables. */
  397. void GH_PWM_init(void);
  398. #ifdef __cplusplus
  399. }
  400. #endif
  401. #endif /* _GH_PWM_H */
  402. /*----------------------------------------------------------------------------*/
  403. /* end of file */
  404. /*----------------------------------------------------------------------------*/