gh_sdio1.h 188 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_sdio1.h
  5. **
  6. ** \brief SDIO1 Host Controller.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_SDIO1_H
  18. #define _GH_SDIO1_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_SDIO1_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_SDIO1_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_SDIO1_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_SDIO1_SYSADDRREG FIO_ADDRESS(SDIO1,0x90010000) /* read/write */
  59. #define REG_SDIO1_TRANMODENORINTSIGENREG FIO_ADDRESS(SDIO1,0x90010004) /* read/write */
  60. #define REG_SDIO1_ERRINTSIGENBLKCOUREG FIO_ADDRESS(SDIO1,0x90010008) /* read/write */
  61. #define REG_SDIO1_BLKSIZENORINTSTAENREG FIO_ADDRESS(SDIO1,0x9001000C) /* read/write */
  62. #define REG_SDIO1_ERRINTSTAENNORINTSTAREG FIO_ADDRESS(SDIO1,0x90010010) /* read/write */
  63. #define REG_SDIO1_ERRINTSTATUSCOMMONDREG FIO_ADDRESS(SDIO1,0x90010014) /* read/write */
  64. #define REG_SDIO1_CONTROL01REG FIO_ADDRESS(SDIO1,0x90010018) /* read/write */
  65. #define REG_SDIO1_RESP0REG FIO_ADDRESS(SDIO1,0x9001001C) /* read */
  66. #define REG_SDIO1_RESP1REG FIO_ADDRESS(SDIO1,0x90010020) /* read */
  67. #define REG_SDIO1_RESP2REG FIO_ADDRESS(SDIO1,0x90010024) /* read */
  68. #define REG_SDIO1_RESP3REG FIO_ADDRESS(SDIO1,0x90010028) /* read */
  69. #define REG_SDIO1_CONTROL00REG FIO_ADDRESS(SDIO1,0x9001002C) /* read/write */
  70. #define REG_SDIO1_PRESENTSTATEREG FIO_ADDRESS(SDIO1,0x90010030) /* read */
  71. #define REG_SDIO1_ARGREG FIO_ADDRESS(SDIO1,0x90010034) /* read/write */
  72. #define REG_SDIO1_CAPREG FIO_ADDRESS(SDIO1,0x90010038) /* read */
  73. #define REG_SDIO1_AUTOCMD12ERRSTATUSREG FIO_ADDRESS(SDIO1,0x9001003C) /* read */
  74. #define REG_SDIO1_BUFFERDATAPORTREG FIO_ADDRESS(SDIO1,0x90010040) /* read/write */
  75. #define REG_SDIO1_MAXCURCAPREG FIO_ADDRESS(SDIO1,0x90010048) /* read/write */
  76. #define REG_SDIO1_SLOTINTSTATUSREG FIO_ADDRESS(SDIO1,0x900100FC) /* read */
  77. /*----------------------------------------------------------------------------*/
  78. /* bit group structures */
  79. /*----------------------------------------------------------------------------*/
  80. typedef union { /* SDIO1_TranModeNorIntSigEnReg */
  81. U32 all;
  82. struct {
  83. U32 blkcounten : 1;
  84. U32 autocmd12en : 1;
  85. U32 dmaen : 1;
  86. U32 : 1;
  87. U32 msblkselect : 1;
  88. U32 datatradirselect : 1;
  89. U32 : 10;
  90. U32 cmdcompletesigen : 1;
  91. U32 tracompletesigen : 1;
  92. U32 blkgapevesigen : 1;
  93. U32 dmaintsigen : 1;
  94. U32 bufwreadysigen : 1;
  95. U32 bufrreadysigen : 1;
  96. U32 cardinsertionsigen : 1;
  97. U32 cardremsigen : 1;
  98. U32 cardintsigen : 1;
  99. U32 : 6;
  100. U32 fixedto0 : 1;
  101. } bitc;
  102. } GH_SDIO1_TRANMODENORINTSIGENREG_S;
  103. typedef union { /* SDIO1_ErrIntSigEnBlkCouReg */
  104. U32 all;
  105. struct {
  106. U32 cmdtimeouterrsigen : 1;
  107. U32 cmdendbiterrsigen : 1;
  108. U32 cmdindexerrsigen : 1;
  109. U32 datatimeouterrsigen : 1;
  110. U32 cmdcrcerrsigen : 1;
  111. U32 datacrcerrsigen : 1;
  112. U32 dataendbiterrsigen : 1;
  113. U32 curlimiterrsigen : 1;
  114. U32 autocmd12errsigen : 1;
  115. U32 : 5;
  116. U32 vendorspecificerrsigen : 2;
  117. U32 blkcountforcurtra : 16;
  118. } bitc;
  119. } GH_SDIO1_ERRINTSIGENBLKCOUREG_S;
  120. typedef union { /* SDIO1_BlkSizeNorIntStaEnReg */
  121. U32 all;
  122. struct {
  123. U32 trablksize : 12;
  124. U32 hostsdmabufsize : 3;
  125. U32 : 1;
  126. U32 cmdcompletestatusen : 1;
  127. U32 tracompletestatusen : 1;
  128. U32 blkgapevestatusen : 1;
  129. U32 dmaintstatusen : 1;
  130. U32 bufwreadystatusen : 1;
  131. U32 bufrreadystatusen : 1;
  132. U32 cardinsertionstatusen : 1;
  133. U32 cardremstatusen : 1;
  134. U32 cardintstatusen : 1;
  135. U32 : 6;
  136. U32 fixedto0 : 1;
  137. } bitc;
  138. } GH_SDIO1_BLKSIZENORINTSTAENREG_S;
  139. typedef union { /* SDIO1_ErrIntStaEnNorIntStaReg */
  140. U32 all;
  141. struct {
  142. U32 cmdtimeouterrstatusen : 1;
  143. U32 cmdendbiterrstatusen : 1;
  144. U32 cmdcrcerrstatusen : 1;
  145. U32 cmdindexerrstatusen : 1;
  146. U32 datacrcerrstatusen : 1;
  147. U32 datatimeouterrstatusen : 1;
  148. U32 dataendbiterrstatusen : 1;
  149. U32 curlimiterrstatusen : 1;
  150. U32 autocmd12errstatusen : 1;
  151. U32 : 5;
  152. U32 vendorspecificerrstatusen : 2;
  153. U32 cmdcomplete : 1;
  154. U32 blkgapevent : 1;
  155. U32 dmaint : 1;
  156. U32 tracomplete : 1;
  157. U32 bufwready : 1;
  158. U32 cardinsertion : 1;
  159. U32 bufrready : 1;
  160. U32 cardremoval : 1;
  161. U32 cardint : 1;
  162. U32 bootackrcv : 1;
  163. U32 : 5;
  164. U32 errint : 1;
  165. } bitc;
  166. } GH_SDIO1_ERRINTSTAENNORINTSTAREG_S;
  167. typedef union { /* SDIO1_ErrIntStatusCommondReg */
  168. U32 all;
  169. struct {
  170. U32 cmdtimeouterr : 1;
  171. U32 cmdcrcerr : 1;
  172. U32 cmdendbiterr : 1;
  173. U32 cmdindexerr : 1;
  174. U32 datatimeouterr : 1;
  175. U32 datacrcerr : 1;
  176. U32 dataendbiterr : 1;
  177. U32 curlimiterr : 1;
  178. U32 autocmd12err : 1;
  179. U32 : 5;
  180. U32 vendorspecificerrstatus : 2;
  181. U32 reptypeselect : 2;
  182. U32 : 1;
  183. U32 cmdcrcchecken : 1;
  184. U32 datapreselect : 1;
  185. U32 cmdindexchecken : 1;
  186. U32 cmdtype : 2;
  187. U32 cmdindex : 6;
  188. U32 : 2;
  189. } bitc;
  190. } GH_SDIO1_ERRINTSTATUSCOMMONDREG_S;
  191. typedef union { /* SDIO1_Control01Reg */
  192. U32 all;
  193. struct {
  194. U32 datatimeoutcountervalue : 4;
  195. U32 : 4;
  196. U32 softwareresetcmdline : 1;
  197. U32 softwareresetall : 1;
  198. U32 softwareresetdatline : 1;
  199. U32 : 5;
  200. U32 internalclken : 1;
  201. U32 internalclkstable : 1;
  202. U32 sdclken : 1;
  203. U32 : 5;
  204. U32 sdclkfreselect : 8;
  205. } bitc;
  206. } GH_SDIO1_CONTROL01REG_S;
  207. typedef union { /* SDIO1_Control00Reg */
  208. U32 all;
  209. struct {
  210. U32 ledcontrol : 1;
  211. U32 datatrawidth : 1;
  212. U32 sd8bitmode : 1;
  213. U32 hostspeeden : 1;
  214. U32 : 2;
  215. U32 carddetecttestlevel : 1;
  216. U32 carddetectsigdet : 1;
  217. U32 sdbuspower : 1;
  218. U32 sdbusvoltageselect : 3;
  219. U32 : 4;
  220. U32 stopatblkgapreq : 1;
  221. U32 rwaitcontrol : 1;
  222. U32 continuereq : 1;
  223. U32 intatblkgap : 1;
  224. U32 driveccsd : 1;
  225. U32 spimode : 1;
  226. U32 booten : 1;
  227. U32 altbooten : 1;
  228. U32 wakeupevetenoncardins : 1;
  229. U32 wakeupevetenoncardint : 1;
  230. U32 wakeupevetenoncardrem : 1;
  231. U32 : 5;
  232. } bitc;
  233. } GH_SDIO1_CONTROL00REG_S;
  234. typedef union { /* SDIO1_PresentStateReg */
  235. U32 all;
  236. struct {
  237. U32 cmdinhibitcmd : 1;
  238. U32 datalineactive : 1;
  239. U32 cmdinhibitdata : 1;
  240. U32 : 5;
  241. U32 rtraactive : 1;
  242. U32 bufwen : 1;
  243. U32 wtraactive : 1;
  244. U32 bufren : 1;
  245. U32 : 4;
  246. U32 cardinserted : 1;
  247. U32 carddetectpinlevel : 1;
  248. U32 cardstatestable : 1;
  249. U32 wproswipinlevel : 1;
  250. U32 data03linesiglevel : 4;
  251. U32 cmdlinesiglevel : 1;
  252. U32 data47linesiglevel : 4;
  253. U32 : 3;
  254. } bitc;
  255. } GH_SDIO1_PRESENTSTATEREG_S;
  256. typedef union { /* SDIO1_CapReg */
  257. U32 all;
  258. struct {
  259. U32 timeoutclkfre : 6;
  260. U32 : 1;
  261. U32 timeoutclkunit : 1;
  262. U32 baseclkfreforsdclk : 6;
  263. U32 : 2;
  264. U32 maxblklen : 2;
  265. U32 extendedmediabussup : 1;
  266. U32 : 2;
  267. U32 highspeedsup : 1;
  268. U32 susressup : 1;
  269. U32 sdmasup : 1;
  270. U32 voltagesup33v : 1;
  271. U32 voltagesup30v : 1;
  272. U32 voltagesup18v : 1;
  273. U32 intmode : 1;
  274. U32 : 4;
  275. } bitc;
  276. } GH_SDIO1_CAPREG_S;
  277. typedef union { /* SDIO1_AutoCmd12ErrStatusReg */
  278. U32 all;
  279. struct {
  280. U32 autocmd12timeouterr : 1;
  281. U32 autocmd12crcerr : 1;
  282. U32 autocmd12endbiterr : 1;
  283. U32 autocmd12notexe : 1;
  284. U32 autocmd12indexerr : 1;
  285. U32 : 2;
  286. U32 cmdnotissuedbyautocmd12err : 1;
  287. U32 : 24;
  288. } bitc;
  289. } GH_SDIO1_AUTOCMD12ERRSTATUSREG_S;
  290. typedef union { /* SDIO1_MaxCurCapReg */
  291. U32 all;
  292. struct {
  293. U32 maxcurfor33v : 8;
  294. U32 maxcurfor30v : 8;
  295. U32 maxcurfor18v : 8;
  296. U32 : 8;
  297. } bitc;
  298. } GH_SDIO1_MAXCURCAPREG_S;
  299. typedef union { /* SDIO1_SlotIntStatusReg */
  300. U32 all;
  301. struct {
  302. U32 intsigforeachslot : 8;
  303. U32 : 8;
  304. U32 specifivernum : 8;
  305. U32 vendorvernum : 8;
  306. } bitc;
  307. } GH_SDIO1_SLOTINTSTATUSREG_S;
  308. /*----------------------------------------------------------------------------*/
  309. /* mirror variables */
  310. /*----------------------------------------------------------------------------*/
  311. #ifdef __cplusplus
  312. extern "C" {
  313. #endif
  314. /*----------------------------------------------------------------------------*/
  315. /* register SDIO1_SysAddrReg (read/write) */
  316. /*----------------------------------------------------------------------------*/
  317. #if GH_INLINE_LEVEL == 0
  318. /*! \brief Writes the register 'SDIO1_SysAddrReg'. */
  319. void GH_SDIO1_set_SysAddrReg(U32 data);
  320. /*! \brief Reads the register 'SDIO1_SysAddrReg'. */
  321. U32 GH_SDIO1_get_SysAddrReg(void);
  322. #else /* GH_INLINE_LEVEL == 0 */
  323. GH_INLINE void GH_SDIO1_set_SysAddrReg(U32 data)
  324. {
  325. *(volatile U32 *)REG_SDIO1_SYSADDRREG = data;
  326. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  327. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_SysAddrReg] <-- 0x%08x\n",
  328. REG_SDIO1_SYSADDRREG,data,data);
  329. #endif
  330. }
  331. GH_INLINE U32 GH_SDIO1_get_SysAddrReg(void)
  332. {
  333. U32 value = (*(volatile U32 *)REG_SDIO1_SYSADDRREG);
  334. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  335. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SysAddrReg] --> 0x%08x\n",
  336. REG_SDIO1_SYSADDRREG,value);
  337. #endif
  338. return value;
  339. }
  340. #endif /* GH_INLINE_LEVEL == 0 */
  341. /*----------------------------------------------------------------------------*/
  342. /* register SDIO1_TranModeNorIntSigEnReg (read/write) */
  343. /*----------------------------------------------------------------------------*/
  344. #if GH_INLINE_LEVEL == 0
  345. /*! \brief Writes the register 'SDIO1_TranModeNorIntSigEnReg'. */
  346. void GH_SDIO1_set_TranModeNorIntSigEnReg(U32 data);
  347. /*! \brief Reads the register 'SDIO1_TranModeNorIntSigEnReg'. */
  348. U32 GH_SDIO1_get_TranModeNorIntSigEnReg(void);
  349. /*! \brief Writes the bit group 'BlkCountEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  350. void GH_SDIO1_set_TranModeNorIntSigEnReg_BlkCountEn(U8 data);
  351. /*! \brief Reads the bit group 'BlkCountEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  352. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BlkCountEn(void);
  353. /*! \brief Writes the bit group 'AutoCmd12En' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  354. void GH_SDIO1_set_TranModeNorIntSigEnReg_AutoCmd12En(U8 data);
  355. /*! \brief Reads the bit group 'AutoCmd12En' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  356. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_AutoCmd12En(void);
  357. /*! \brief Writes the bit group 'DmaEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  358. void GH_SDIO1_set_TranModeNorIntSigEnReg_DmaEn(U8 data);
  359. /*! \brief Reads the bit group 'DmaEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  360. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DmaEn(void);
  361. /*! \brief Writes the bit group 'MSBlkSelect' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  362. void GH_SDIO1_set_TranModeNorIntSigEnReg_MSBlkSelect(U8 data);
  363. /*! \brief Reads the bit group 'MSBlkSelect' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  364. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_MSBlkSelect(void);
  365. /*! \brief Writes the bit group 'DataTraDirSelect' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  366. void GH_SDIO1_set_TranModeNorIntSigEnReg_DataTraDirSelect(U8 data);
  367. /*! \brief Reads the bit group 'DataTraDirSelect' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  368. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DataTraDirSelect(void);
  369. /*! \brief Writes the bit group 'CmdCompleteSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  370. void GH_SDIO1_set_TranModeNorIntSigEnReg_CmdCompleteSigEn(U8 data);
  371. /*! \brief Reads the bit group 'CmdCompleteSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  372. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CmdCompleteSigEn(void);
  373. /*! \brief Writes the bit group 'TraCompleteSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  374. void GH_SDIO1_set_TranModeNorIntSigEnReg_TraCompleteSigEn(U8 data);
  375. /*! \brief Reads the bit group 'TraCompleteSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  376. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_TraCompleteSigEn(void);
  377. /*! \brief Writes the bit group 'BlkGapEveSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  378. void GH_SDIO1_set_TranModeNorIntSigEnReg_BlkGapEveSigEn(U8 data);
  379. /*! \brief Reads the bit group 'BlkGapEveSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  380. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BlkGapEveSigEn(void);
  381. /*! \brief Writes the bit group 'DmaIntSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  382. void GH_SDIO1_set_TranModeNorIntSigEnReg_DmaIntSigEn(U8 data);
  383. /*! \brief Reads the bit group 'DmaIntSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  384. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DmaIntSigEn(void);
  385. /*! \brief Writes the bit group 'BufWReadySigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  386. void GH_SDIO1_set_TranModeNorIntSigEnReg_BufWReadySigEn(U8 data);
  387. /*! \brief Reads the bit group 'BufWReadySigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  388. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BufWReadySigEn(void);
  389. /*! \brief Writes the bit group 'BufRReadySigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  390. void GH_SDIO1_set_TranModeNorIntSigEnReg_BufRReadySigEn(U8 data);
  391. /*! \brief Reads the bit group 'BufRReadySigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  392. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BufRReadySigEn(void);
  393. /*! \brief Writes the bit group 'CardInsertionSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  394. void GH_SDIO1_set_TranModeNorIntSigEnReg_CardInsertionSigEn(U8 data);
  395. /*! \brief Reads the bit group 'CardInsertionSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  396. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardInsertionSigEn(void);
  397. /*! \brief Writes the bit group 'CardRemSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  398. void GH_SDIO1_set_TranModeNorIntSigEnReg_CardRemSigEn(U8 data);
  399. /*! \brief Reads the bit group 'CardRemSigEn' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  400. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardRemSigEn(void);
  401. /*! \brief Writes the bit group 'CardIntSigEN' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  402. void GH_SDIO1_set_TranModeNorIntSigEnReg_CardIntSigEN(U8 data);
  403. /*! \brief Reads the bit group 'CardIntSigEN' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  404. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardIntSigEN(void);
  405. /*! \brief Writes the bit group 'FixedTo0' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  406. void GH_SDIO1_set_TranModeNorIntSigEnReg_FixedTo0(U8 data);
  407. /*! \brief Reads the bit group 'FixedTo0' of register 'SDIO1_TranModeNorIntSigEnReg'. */
  408. U8 GH_SDIO1_get_TranModeNorIntSigEnReg_FixedTo0(void);
  409. #else /* GH_INLINE_LEVEL == 0 */
  410. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg(U32 data)
  411. {
  412. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = data;
  413. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  414. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg] <-- 0x%08x\n",
  415. REG_SDIO1_TRANMODENORINTSIGENREG,data,data);
  416. #endif
  417. }
  418. GH_INLINE U32 GH_SDIO1_get_TranModeNorIntSigEnReg(void)
  419. {
  420. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  421. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  422. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg] --> 0x%08x\n",
  423. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  424. #endif
  425. return value;
  426. }
  427. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_BlkCountEn(U8 data)
  428. {
  429. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  430. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  431. d.bitc.blkcounten = data;
  432. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  433. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  434. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_BlkCountEn] <-- 0x%08x\n",
  435. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  436. #endif
  437. }
  438. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BlkCountEn(void)
  439. {
  440. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  441. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  442. tmp_value.all = value;
  443. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  444. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_BlkCountEn] --> 0x%08x\n",
  445. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  446. #endif
  447. return tmp_value.bitc.blkcounten;
  448. }
  449. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_AutoCmd12En(U8 data)
  450. {
  451. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  452. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  453. d.bitc.autocmd12en = data;
  454. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  455. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  456. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_AutoCmd12En] <-- 0x%08x\n",
  457. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  458. #endif
  459. }
  460. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_AutoCmd12En(void)
  461. {
  462. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  463. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  464. tmp_value.all = value;
  465. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  466. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_AutoCmd12En] --> 0x%08x\n",
  467. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  468. #endif
  469. return tmp_value.bitc.autocmd12en;
  470. }
  471. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_DmaEn(U8 data)
  472. {
  473. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  474. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  475. d.bitc.dmaen = data;
  476. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  477. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  478. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_DmaEn] <-- 0x%08x\n",
  479. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  480. #endif
  481. }
  482. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DmaEn(void)
  483. {
  484. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  485. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  486. tmp_value.all = value;
  487. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  488. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_DmaEn] --> 0x%08x\n",
  489. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  490. #endif
  491. return tmp_value.bitc.dmaen;
  492. }
  493. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_MSBlkSelect(U8 data)
  494. {
  495. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  496. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  497. d.bitc.msblkselect = data;
  498. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  499. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  500. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_MSBlkSelect] <-- 0x%08x\n",
  501. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  502. #endif
  503. }
  504. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_MSBlkSelect(void)
  505. {
  506. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  507. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  508. tmp_value.all = value;
  509. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  510. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_MSBlkSelect] --> 0x%08x\n",
  511. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  512. #endif
  513. return tmp_value.bitc.msblkselect;
  514. }
  515. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_DataTraDirSelect(U8 data)
  516. {
  517. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  518. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  519. d.bitc.datatradirselect = data;
  520. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  521. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  522. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_DataTraDirSelect] <-- 0x%08x\n",
  523. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  524. #endif
  525. }
  526. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DataTraDirSelect(void)
  527. {
  528. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  529. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  530. tmp_value.all = value;
  531. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  532. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_DataTraDirSelect] --> 0x%08x\n",
  533. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  534. #endif
  535. return tmp_value.bitc.datatradirselect;
  536. }
  537. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_CmdCompleteSigEn(U8 data)
  538. {
  539. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  540. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  541. d.bitc.cmdcompletesigen = data;
  542. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  543. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  544. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_CmdCompleteSigEn] <-- 0x%08x\n",
  545. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  546. #endif
  547. }
  548. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CmdCompleteSigEn(void)
  549. {
  550. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  551. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  552. tmp_value.all = value;
  553. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  554. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_CmdCompleteSigEn] --> 0x%08x\n",
  555. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  556. #endif
  557. return tmp_value.bitc.cmdcompletesigen;
  558. }
  559. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_TraCompleteSigEn(U8 data)
  560. {
  561. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  562. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  563. d.bitc.tracompletesigen = data;
  564. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  565. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  566. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_TraCompleteSigEn] <-- 0x%08x\n",
  567. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  568. #endif
  569. }
  570. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_TraCompleteSigEn(void)
  571. {
  572. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  573. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  574. tmp_value.all = value;
  575. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  576. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_TraCompleteSigEn] --> 0x%08x\n",
  577. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  578. #endif
  579. return tmp_value.bitc.tracompletesigen;
  580. }
  581. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_BlkGapEveSigEn(U8 data)
  582. {
  583. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  584. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  585. d.bitc.blkgapevesigen = data;
  586. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  587. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  588. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_BlkGapEveSigEn] <-- 0x%08x\n",
  589. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  590. #endif
  591. }
  592. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BlkGapEveSigEn(void)
  593. {
  594. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  595. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  596. tmp_value.all = value;
  597. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  598. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_BlkGapEveSigEn] --> 0x%08x\n",
  599. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  600. #endif
  601. return tmp_value.bitc.blkgapevesigen;
  602. }
  603. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_DmaIntSigEn(U8 data)
  604. {
  605. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  606. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  607. d.bitc.dmaintsigen = data;
  608. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  609. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  610. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_DmaIntSigEn] <-- 0x%08x\n",
  611. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  612. #endif
  613. }
  614. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_DmaIntSigEn(void)
  615. {
  616. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  617. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  618. tmp_value.all = value;
  619. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  620. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_DmaIntSigEn] --> 0x%08x\n",
  621. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  622. #endif
  623. return tmp_value.bitc.dmaintsigen;
  624. }
  625. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_BufWReadySigEn(U8 data)
  626. {
  627. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  628. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  629. d.bitc.bufwreadysigen = data;
  630. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  631. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  632. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_BufWReadySigEn] <-- 0x%08x\n",
  633. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  634. #endif
  635. }
  636. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BufWReadySigEn(void)
  637. {
  638. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  639. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  640. tmp_value.all = value;
  641. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  642. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_BufWReadySigEn] --> 0x%08x\n",
  643. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  644. #endif
  645. return tmp_value.bitc.bufwreadysigen;
  646. }
  647. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_BufRReadySigEn(U8 data)
  648. {
  649. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  650. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  651. d.bitc.bufrreadysigen = data;
  652. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  653. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  654. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_BufRReadySigEn] <-- 0x%08x\n",
  655. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  656. #endif
  657. }
  658. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_BufRReadySigEn(void)
  659. {
  660. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  661. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  662. tmp_value.all = value;
  663. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  664. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_BufRReadySigEn] --> 0x%08x\n",
  665. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  666. #endif
  667. return tmp_value.bitc.bufrreadysigen;
  668. }
  669. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_CardInsertionSigEn(U8 data)
  670. {
  671. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  672. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  673. d.bitc.cardinsertionsigen = data;
  674. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  675. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  676. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_CardInsertionSigEn] <-- 0x%08x\n",
  677. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  678. #endif
  679. }
  680. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardInsertionSigEn(void)
  681. {
  682. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  683. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  684. tmp_value.all = value;
  685. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  686. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_CardInsertionSigEn] --> 0x%08x\n",
  687. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  688. #endif
  689. return tmp_value.bitc.cardinsertionsigen;
  690. }
  691. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_CardRemSigEn(U8 data)
  692. {
  693. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  694. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  695. d.bitc.cardremsigen = data;
  696. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  697. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  698. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_CardRemSigEn] <-- 0x%08x\n",
  699. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  700. #endif
  701. }
  702. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardRemSigEn(void)
  703. {
  704. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  705. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  706. tmp_value.all = value;
  707. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  708. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_CardRemSigEn] --> 0x%08x\n",
  709. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  710. #endif
  711. return tmp_value.bitc.cardremsigen;
  712. }
  713. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_CardIntSigEN(U8 data)
  714. {
  715. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  716. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  717. d.bitc.cardintsigen = data;
  718. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  719. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  720. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_CardIntSigEN] <-- 0x%08x\n",
  721. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  722. #endif
  723. }
  724. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_CardIntSigEN(void)
  725. {
  726. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  727. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  728. tmp_value.all = value;
  729. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  730. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_CardIntSigEN] --> 0x%08x\n",
  731. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  732. #endif
  733. return tmp_value.bitc.cardintsigen;
  734. }
  735. GH_INLINE void GH_SDIO1_set_TranModeNorIntSigEnReg_FixedTo0(U8 data)
  736. {
  737. GH_SDIO1_TRANMODENORINTSIGENREG_S d;
  738. d.all = *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG;
  739. d.bitc.fixedto0 = data;
  740. *(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG = d.all;
  741. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  742. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_TranModeNorIntSigEnReg_FixedTo0] <-- 0x%08x\n",
  743. REG_SDIO1_TRANMODENORINTSIGENREG,d.all,d.all);
  744. #endif
  745. }
  746. GH_INLINE U8 GH_SDIO1_get_TranModeNorIntSigEnReg_FixedTo0(void)
  747. {
  748. GH_SDIO1_TRANMODENORINTSIGENREG_S tmp_value;
  749. U32 value = (*(volatile U32 *)REG_SDIO1_TRANMODENORINTSIGENREG);
  750. tmp_value.all = value;
  751. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  752. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_TranModeNorIntSigEnReg_FixedTo0] --> 0x%08x\n",
  753. REG_SDIO1_TRANMODENORINTSIGENREG,value);
  754. #endif
  755. return tmp_value.bitc.fixedto0;
  756. }
  757. #endif /* GH_INLINE_LEVEL == 0 */
  758. /*----------------------------------------------------------------------------*/
  759. /* register SDIO1_ErrIntSigEnBlkCouReg (read/write) */
  760. /*----------------------------------------------------------------------------*/
  761. #if GH_INLINE_LEVEL == 0
  762. /*! \brief Writes the register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  763. void GH_SDIO1_set_ErrIntSigEnBlkCouReg(U32 data);
  764. /*! \brief Reads the register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  765. U32 GH_SDIO1_get_ErrIntSigEnBlkCouReg(void);
  766. /*! \brief Writes the bit group 'CmdTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  767. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn(U8 data);
  768. /*! \brief Reads the bit group 'CmdTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  769. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn(void);
  770. /*! \brief Writes the bit group 'CmdEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  771. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn(U8 data);
  772. /*! \brief Reads the bit group 'CmdEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  773. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn(void);
  774. /*! \brief Writes the bit group 'CmdIndexErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  775. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn(U8 data);
  776. /*! \brief Reads the bit group 'CmdIndexErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  777. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn(void);
  778. /*! \brief Writes the bit group 'DataTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  779. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn(U8 data);
  780. /*! \brief Reads the bit group 'DataTimeoutErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  781. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn(void);
  782. /*! \brief Writes the bit group 'CmdCrcErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  783. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn(U8 data);
  784. /*! \brief Reads the bit group 'CmdCrcErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  785. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn(void);
  786. /*! \brief Writes the bit group 'DataCrcErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  787. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataCrcErrSigEn(U8 data);
  788. /*! \brief Reads the bit group 'DataCrcErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  789. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataCrcErrSigEn(void);
  790. /*! \brief Writes the bit group 'DataEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  791. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn(U8 data);
  792. /*! \brief Reads the bit group 'DataEndBitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  793. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn(void);
  794. /*! \brief Writes the bit group 'CurLimitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  795. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CurLimitErrSigEn(U8 data);
  796. /*! \brief Reads the bit group 'CurLimitErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  797. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CurLimitErrSigEn(void);
  798. /*! \brief Writes the bit group 'AutoCmd12ErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  799. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn(U8 data);
  800. /*! \brief Reads the bit group 'AutoCmd12ErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  801. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn(void);
  802. /*! \brief Writes the bit group 'VendorSpecificErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  803. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn(U8 data);
  804. /*! \brief Reads the bit group 'VendorSpecificErrSigEn' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  805. U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn(void);
  806. /*! \brief Writes the bit group 'BlkCountForCurTra' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  807. void GH_SDIO1_set_ErrIntSigEnBlkCouReg_BlkCountForCurTra(U16 data);
  808. /*! \brief Reads the bit group 'BlkCountForCurTra' of register 'SDIO1_ErrIntSigEnBlkCouReg'. */
  809. U16 GH_SDIO1_get_ErrIntSigEnBlkCouReg_BlkCountForCurTra(void);
  810. #else /* GH_INLINE_LEVEL == 0 */
  811. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg(U32 data)
  812. {
  813. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = data;
  814. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  815. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg] <-- 0x%08x\n",
  816. REG_SDIO1_ERRINTSIGENBLKCOUREG,data,data);
  817. #endif
  818. }
  819. GH_INLINE U32 GH_SDIO1_get_ErrIntSigEnBlkCouReg(void)
  820. {
  821. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  822. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  823. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg] --> 0x%08x\n",
  824. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  825. #endif
  826. return value;
  827. }
  828. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn(U8 data)
  829. {
  830. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  831. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  832. d.bitc.cmdtimeouterrsigen = data;
  833. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  834. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  835. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn] <-- 0x%08x\n",
  836. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  837. #endif
  838. }
  839. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn(void)
  840. {
  841. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  842. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  843. tmp_value.all = value;
  844. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  845. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdTimeoutErrSigEn] --> 0x%08x\n",
  846. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  847. #endif
  848. return tmp_value.bitc.cmdtimeouterrsigen;
  849. }
  850. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn(U8 data)
  851. {
  852. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  853. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  854. d.bitc.cmdendbiterrsigen = data;
  855. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  856. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  857. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn] <-- 0x%08x\n",
  858. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  859. #endif
  860. }
  861. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn(void)
  862. {
  863. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  864. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  865. tmp_value.all = value;
  866. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  867. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdEndBitErrSigEn] --> 0x%08x\n",
  868. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  869. #endif
  870. return tmp_value.bitc.cmdendbiterrsigen;
  871. }
  872. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn(U8 data)
  873. {
  874. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  875. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  876. d.bitc.cmdindexerrsigen = data;
  877. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  878. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  879. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn] <-- 0x%08x\n",
  880. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  881. #endif
  882. }
  883. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn(void)
  884. {
  885. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  886. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  887. tmp_value.all = value;
  888. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  889. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdIndexErrSigEn] --> 0x%08x\n",
  890. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  891. #endif
  892. return tmp_value.bitc.cmdindexerrsigen;
  893. }
  894. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn(U8 data)
  895. {
  896. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  897. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  898. d.bitc.datatimeouterrsigen = data;
  899. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  900. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  901. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn] <-- 0x%08x\n",
  902. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  903. #endif
  904. }
  905. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn(void)
  906. {
  907. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  908. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  909. tmp_value.all = value;
  910. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  911. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataTimeoutErrSigEn] --> 0x%08x\n",
  912. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  913. #endif
  914. return tmp_value.bitc.datatimeouterrsigen;
  915. }
  916. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn(U8 data)
  917. {
  918. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  919. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  920. d.bitc.cmdcrcerrsigen = data;
  921. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  922. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  923. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn] <-- 0x%08x\n",
  924. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  925. #endif
  926. }
  927. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn(void)
  928. {
  929. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  930. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  931. tmp_value.all = value;
  932. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  933. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_CmdCrcErrSigEn] --> 0x%08x\n",
  934. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  935. #endif
  936. return tmp_value.bitc.cmdcrcerrsigen;
  937. }
  938. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataCrcErrSigEn(U8 data)
  939. {
  940. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  941. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  942. d.bitc.datacrcerrsigen = data;
  943. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  944. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  945. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataCrcErrSigEn] <-- 0x%08x\n",
  946. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  947. #endif
  948. }
  949. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataCrcErrSigEn(void)
  950. {
  951. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  952. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  953. tmp_value.all = value;
  954. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  955. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataCrcErrSigEn] --> 0x%08x\n",
  956. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  957. #endif
  958. return tmp_value.bitc.datacrcerrsigen;
  959. }
  960. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn(U8 data)
  961. {
  962. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  963. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  964. d.bitc.dataendbiterrsigen = data;
  965. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  966. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  967. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn] <-- 0x%08x\n",
  968. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  969. #endif
  970. }
  971. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn(void)
  972. {
  973. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  974. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  975. tmp_value.all = value;
  976. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  977. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_DataEndBitErrSigEn] --> 0x%08x\n",
  978. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  979. #endif
  980. return tmp_value.bitc.dataendbiterrsigen;
  981. }
  982. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_CurLimitErrSigEn(U8 data)
  983. {
  984. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  985. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  986. d.bitc.curlimiterrsigen = data;
  987. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  988. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  989. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_CurLimitErrSigEn] <-- 0x%08x\n",
  990. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  991. #endif
  992. }
  993. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_CurLimitErrSigEn(void)
  994. {
  995. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  996. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  997. tmp_value.all = value;
  998. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  999. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_CurLimitErrSigEn] --> 0x%08x\n",
  1000. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  1001. #endif
  1002. return tmp_value.bitc.curlimiterrsigen;
  1003. }
  1004. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn(U8 data)
  1005. {
  1006. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  1007. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  1008. d.bitc.autocmd12errsigen = data;
  1009. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  1010. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1011. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn] <-- 0x%08x\n",
  1012. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  1013. #endif
  1014. }
  1015. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn(void)
  1016. {
  1017. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  1018. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  1019. tmp_value.all = value;
  1020. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1021. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_AutoCmd12ErrSigEn] --> 0x%08x\n",
  1022. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  1023. #endif
  1024. return tmp_value.bitc.autocmd12errsigen;
  1025. }
  1026. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn(U8 data)
  1027. {
  1028. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  1029. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  1030. d.bitc.vendorspecificerrsigen = data;
  1031. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  1032. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1033. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn] <-- 0x%08x\n",
  1034. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  1035. #endif
  1036. }
  1037. GH_INLINE U8 GH_SDIO1_get_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn(void)
  1038. {
  1039. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  1040. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  1041. tmp_value.all = value;
  1042. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1043. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_VendorSpecificErrSigEn] --> 0x%08x\n",
  1044. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  1045. #endif
  1046. return tmp_value.bitc.vendorspecificerrsigen;
  1047. }
  1048. GH_INLINE void GH_SDIO1_set_ErrIntSigEnBlkCouReg_BlkCountForCurTra(U16 data)
  1049. {
  1050. GH_SDIO1_ERRINTSIGENBLKCOUREG_S d;
  1051. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG;
  1052. d.bitc.blkcountforcurtra = data;
  1053. *(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG = d.all;
  1054. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1055. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntSigEnBlkCouReg_BlkCountForCurTra] <-- 0x%08x\n",
  1056. REG_SDIO1_ERRINTSIGENBLKCOUREG,d.all,d.all);
  1057. #endif
  1058. }
  1059. GH_INLINE U16 GH_SDIO1_get_ErrIntSigEnBlkCouReg_BlkCountForCurTra(void)
  1060. {
  1061. GH_SDIO1_ERRINTSIGENBLKCOUREG_S tmp_value;
  1062. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSIGENBLKCOUREG);
  1063. tmp_value.all = value;
  1064. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1065. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntSigEnBlkCouReg_BlkCountForCurTra] --> 0x%08x\n",
  1066. REG_SDIO1_ERRINTSIGENBLKCOUREG,value);
  1067. #endif
  1068. return tmp_value.bitc.blkcountforcurtra;
  1069. }
  1070. #endif /* GH_INLINE_LEVEL == 0 */
  1071. /*----------------------------------------------------------------------------*/
  1072. /* register SDIO1_BlkSizeNorIntStaEnReg (read/write) */
  1073. /*----------------------------------------------------------------------------*/
  1074. #if GH_INLINE_LEVEL == 0
  1075. /*! \brief Writes the register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1076. void GH_SDIO1_set_BlkSizeNorIntStaEnReg(U32 data);
  1077. /*! \brief Reads the register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1078. U32 GH_SDIO1_get_BlkSizeNorIntStaEnReg(void);
  1079. /*! \brief Writes the bit group 'TraBlkSize' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1080. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraBlkSize(U16 data);
  1081. /*! \brief Reads the bit group 'TraBlkSize' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1082. U16 GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraBlkSize(void);
  1083. /*! \brief Writes the bit group 'HostSdmaBufSize' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1084. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_HostSdmaBufSize(U8 data);
  1085. /*! \brief Reads the bit group 'HostSdmaBufSize' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1086. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_HostSdmaBufSize(void);
  1087. /*! \brief Writes the bit group 'CmdCompleteStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1088. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn(U8 data);
  1089. /*! \brief Reads the bit group 'CmdCompleteStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1090. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn(void);
  1091. /*! \brief Writes the bit group 'TraCompleteStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1092. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraCompleteStatusEn(U8 data);
  1093. /*! \brief Reads the bit group 'TraCompleteStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1094. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraCompleteStatusEn(void);
  1095. /*! \brief Writes the bit group 'BlkGapEveStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1096. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn(U8 data);
  1097. /*! \brief Reads the bit group 'BlkGapEveStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1098. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn(void);
  1099. /*! \brief Writes the bit group 'DmaIntStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1100. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_DmaIntStatusEn(U8 data);
  1101. /*! \brief Reads the bit group 'DmaIntStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1102. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_DmaIntStatusEn(void);
  1103. /*! \brief Writes the bit group 'BufWReadyStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1104. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufWReadyStatusEn(U8 data);
  1105. /*! \brief Reads the bit group 'BufWReadyStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1106. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufWReadyStatusEn(void);
  1107. /*! \brief Writes the bit group 'BufRReadyStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1108. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufRReadyStatusEn(U8 data);
  1109. /*! \brief Reads the bit group 'BufRReadyStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1110. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufRReadyStatusEn(void);
  1111. /*! \brief Writes the bit group 'CardInsertionStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1112. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardInsertionStatusEn(U8 data);
  1113. /*! \brief Reads the bit group 'CardInsertionStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1114. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardInsertionStatusEn(void);
  1115. /*! \brief Writes the bit group 'CardRemStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1116. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardRemStatusEn(U8 data);
  1117. /*! \brief Reads the bit group 'CardRemStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1118. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardRemStatusEn(void);
  1119. /*! \brief Writes the bit group 'CardIntStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1120. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardIntStatusEn(U8 data);
  1121. /*! \brief Reads the bit group 'CardIntStatusEn' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1122. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardIntStatusEn(void);
  1123. /*! \brief Writes the bit group 'FixedTo0' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1124. void GH_SDIO1_set_BlkSizeNorIntStaEnReg_FixedTo0(U8 data);
  1125. /*! \brief Reads the bit group 'FixedTo0' of register 'SDIO1_BlkSizeNorIntStaEnReg'. */
  1126. U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_FixedTo0(void);
  1127. #else /* GH_INLINE_LEVEL == 0 */
  1128. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg(U32 data)
  1129. {
  1130. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = data;
  1131. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1132. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg] <-- 0x%08x\n",
  1133. REG_SDIO1_BLKSIZENORINTSTAENREG,data,data);
  1134. #endif
  1135. }
  1136. GH_INLINE U32 GH_SDIO1_get_BlkSizeNorIntStaEnReg(void)
  1137. {
  1138. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1139. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1140. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg] --> 0x%08x\n",
  1141. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1142. #endif
  1143. return value;
  1144. }
  1145. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraBlkSize(U16 data)
  1146. {
  1147. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1148. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1149. d.bitc.trablksize = data;
  1150. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1151. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1152. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraBlkSize] <-- 0x%08x\n",
  1153. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1154. #endif
  1155. }
  1156. GH_INLINE U16 GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraBlkSize(void)
  1157. {
  1158. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1159. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1160. tmp_value.all = value;
  1161. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1162. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraBlkSize] --> 0x%08x\n",
  1163. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1164. #endif
  1165. return tmp_value.bitc.trablksize;
  1166. }
  1167. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_HostSdmaBufSize(U8 data)
  1168. {
  1169. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1170. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1171. d.bitc.hostsdmabufsize = data;
  1172. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1173. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1174. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_HostSdmaBufSize] <-- 0x%08x\n",
  1175. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1176. #endif
  1177. }
  1178. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_HostSdmaBufSize(void)
  1179. {
  1180. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1181. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1182. tmp_value.all = value;
  1183. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1184. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_HostSdmaBufSize] --> 0x%08x\n",
  1185. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1186. #endif
  1187. return tmp_value.bitc.hostsdmabufsize;
  1188. }
  1189. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn(U8 data)
  1190. {
  1191. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1192. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1193. d.bitc.cmdcompletestatusen = data;
  1194. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1195. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1196. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn] <-- 0x%08x\n",
  1197. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1198. #endif
  1199. }
  1200. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn(void)
  1201. {
  1202. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1203. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1204. tmp_value.all = value;
  1205. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1206. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_CmdCompleteStatusEn] --> 0x%08x\n",
  1207. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1208. #endif
  1209. return tmp_value.bitc.cmdcompletestatusen;
  1210. }
  1211. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraCompleteStatusEn(U8 data)
  1212. {
  1213. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1214. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1215. d.bitc.tracompletestatusen = data;
  1216. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1217. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1218. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_TraCompleteStatusEn] <-- 0x%08x\n",
  1219. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1220. #endif
  1221. }
  1222. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraCompleteStatusEn(void)
  1223. {
  1224. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1225. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1226. tmp_value.all = value;
  1227. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1228. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_TraCompleteStatusEn] --> 0x%08x\n",
  1229. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1230. #endif
  1231. return tmp_value.bitc.tracompletestatusen;
  1232. }
  1233. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn(U8 data)
  1234. {
  1235. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1236. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1237. d.bitc.blkgapevestatusen = data;
  1238. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1239. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1240. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn] <-- 0x%08x\n",
  1241. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1242. #endif
  1243. }
  1244. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn(void)
  1245. {
  1246. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1247. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1248. tmp_value.all = value;
  1249. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1250. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_BlkGapEveStatusEn] --> 0x%08x\n",
  1251. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1252. #endif
  1253. return tmp_value.bitc.blkgapevestatusen;
  1254. }
  1255. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_DmaIntStatusEn(U8 data)
  1256. {
  1257. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1258. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1259. d.bitc.dmaintstatusen = data;
  1260. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1261. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1262. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_DmaIntStatusEn] <-- 0x%08x\n",
  1263. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1264. #endif
  1265. }
  1266. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_DmaIntStatusEn(void)
  1267. {
  1268. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1269. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1270. tmp_value.all = value;
  1271. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1272. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_DmaIntStatusEn] --> 0x%08x\n",
  1273. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1274. #endif
  1275. return tmp_value.bitc.dmaintstatusen;
  1276. }
  1277. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufWReadyStatusEn(U8 data)
  1278. {
  1279. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1280. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1281. d.bitc.bufwreadystatusen = data;
  1282. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1283. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1284. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufWReadyStatusEn] <-- 0x%08x\n",
  1285. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1286. #endif
  1287. }
  1288. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufWReadyStatusEn(void)
  1289. {
  1290. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1291. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1292. tmp_value.all = value;
  1293. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1294. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufWReadyStatusEn] --> 0x%08x\n",
  1295. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1296. #endif
  1297. return tmp_value.bitc.bufwreadystatusen;
  1298. }
  1299. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufRReadyStatusEn(U8 data)
  1300. {
  1301. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1302. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1303. d.bitc.bufrreadystatusen = data;
  1304. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1305. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1306. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_BufRReadyStatusEn] <-- 0x%08x\n",
  1307. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1308. #endif
  1309. }
  1310. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufRReadyStatusEn(void)
  1311. {
  1312. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1313. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1314. tmp_value.all = value;
  1315. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1316. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_BufRReadyStatusEn] --> 0x%08x\n",
  1317. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1318. #endif
  1319. return tmp_value.bitc.bufrreadystatusen;
  1320. }
  1321. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardInsertionStatusEn(U8 data)
  1322. {
  1323. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1324. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1325. d.bitc.cardinsertionstatusen = data;
  1326. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1327. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1328. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardInsertionStatusEn] <-- 0x%08x\n",
  1329. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1330. #endif
  1331. }
  1332. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardInsertionStatusEn(void)
  1333. {
  1334. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1335. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1336. tmp_value.all = value;
  1337. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1338. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardInsertionStatusEn] --> 0x%08x\n",
  1339. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1340. #endif
  1341. return tmp_value.bitc.cardinsertionstatusen;
  1342. }
  1343. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardRemStatusEn(U8 data)
  1344. {
  1345. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1346. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1347. d.bitc.cardremstatusen = data;
  1348. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1349. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1350. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardRemStatusEn] <-- 0x%08x\n",
  1351. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1352. #endif
  1353. }
  1354. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardRemStatusEn(void)
  1355. {
  1356. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1357. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1358. tmp_value.all = value;
  1359. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1360. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardRemStatusEn] --> 0x%08x\n",
  1361. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1362. #endif
  1363. return tmp_value.bitc.cardremstatusen;
  1364. }
  1365. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardIntStatusEn(U8 data)
  1366. {
  1367. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1368. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1369. d.bitc.cardintstatusen = data;
  1370. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1371. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1372. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_CardIntStatusEn] <-- 0x%08x\n",
  1373. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1374. #endif
  1375. }
  1376. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardIntStatusEn(void)
  1377. {
  1378. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1379. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1380. tmp_value.all = value;
  1381. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1382. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_CardIntStatusEn] --> 0x%08x\n",
  1383. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1384. #endif
  1385. return tmp_value.bitc.cardintstatusen;
  1386. }
  1387. GH_INLINE void GH_SDIO1_set_BlkSizeNorIntStaEnReg_FixedTo0(U8 data)
  1388. {
  1389. GH_SDIO1_BLKSIZENORINTSTAENREG_S d;
  1390. d.all = *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG;
  1391. d.bitc.fixedto0 = data;
  1392. *(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG = d.all;
  1393. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1394. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BlkSizeNorIntStaEnReg_FixedTo0] <-- 0x%08x\n",
  1395. REG_SDIO1_BLKSIZENORINTSTAENREG,d.all,d.all);
  1396. #endif
  1397. }
  1398. GH_INLINE U8 GH_SDIO1_get_BlkSizeNorIntStaEnReg_FixedTo0(void)
  1399. {
  1400. GH_SDIO1_BLKSIZENORINTSTAENREG_S tmp_value;
  1401. U32 value = (*(volatile U32 *)REG_SDIO1_BLKSIZENORINTSTAENREG);
  1402. tmp_value.all = value;
  1403. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1404. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BlkSizeNorIntStaEnReg_FixedTo0] --> 0x%08x\n",
  1405. REG_SDIO1_BLKSIZENORINTSTAENREG,value);
  1406. #endif
  1407. return tmp_value.bitc.fixedto0;
  1408. }
  1409. #endif /* GH_INLINE_LEVEL == 0 */
  1410. /*----------------------------------------------------------------------------*/
  1411. /* register SDIO1_ErrIntStaEnNorIntStaReg (read/write) */
  1412. /*----------------------------------------------------------------------------*/
  1413. #if GH_INLINE_LEVEL == 0
  1414. /*! \brief Writes the register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1415. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg(U32 data);
  1416. /*! \brief Reads the register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1417. U32 GH_SDIO1_get_ErrIntStaEnNorIntStaReg(void);
  1418. /*! \brief Writes the bit group 'CmdTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1419. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn(U8 data);
  1420. /*! \brief Reads the bit group 'CmdTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1421. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn(void);
  1422. /*! \brief Writes the bit group 'CmdEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1423. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn(U8 data);
  1424. /*! \brief Reads the bit group 'CmdEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1425. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn(void);
  1426. /*! \brief Writes the bit group 'CmdCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1427. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn(U8 data);
  1428. /*! \brief Reads the bit group 'CmdCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1429. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn(void);
  1430. /*! \brief Writes the bit group 'CmdIndexErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1431. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn(U8 data);
  1432. /*! \brief Reads the bit group 'CmdIndexErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1433. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn(void);
  1434. /*! \brief Writes the bit group 'DataCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1435. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn(U8 data);
  1436. /*! \brief Reads the bit group 'DataCrcErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1437. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn(void);
  1438. /*! \brief Writes the bit group 'DataTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1439. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn(U8 data);
  1440. /*! \brief Reads the bit group 'DataTimeoutErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1441. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn(void);
  1442. /*! \brief Writes the bit group 'DataEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1443. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn(U8 data);
  1444. /*! \brief Reads the bit group 'DataEndBitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1445. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn(void);
  1446. /*! \brief Writes the bit group 'CurLimitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1447. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn(U8 data);
  1448. /*! \brief Reads the bit group 'CurLimitErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1449. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn(void);
  1450. /*! \brief Writes the bit group 'AutoCmd12ErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1451. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn(U8 data);
  1452. /*! \brief Reads the bit group 'AutoCmd12ErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1453. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn(void);
  1454. /*! \brief Writes the bit group 'VendorSpecificErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1455. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn(U8 data);
  1456. /*! \brief Reads the bit group 'VendorSpecificErrStatusEn' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1457. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn(void);
  1458. /*! \brief Writes the bit group 'CmdComplete' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1459. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdComplete(U8 data);
  1460. /*! \brief Reads the bit group 'CmdComplete' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1461. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdComplete(void);
  1462. /*! \brief Writes the bit group 'BlkGapEvent' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1463. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BlkGapEvent(U8 data);
  1464. /*! \brief Reads the bit group 'BlkGapEvent' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1465. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BlkGapEvent(void);
  1466. /*! \brief Writes the bit group 'DmaInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1467. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DmaInt(U8 data);
  1468. /*! \brief Reads the bit group 'DmaInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1469. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DmaInt(void);
  1470. /*! \brief Writes the bit group 'TraComplete' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1471. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_TraComplete(U8 data);
  1472. /*! \brief Reads the bit group 'TraComplete' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1473. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_TraComplete(void);
  1474. /*! \brief Writes the bit group 'BufWReady' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1475. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufWReady(U8 data);
  1476. /*! \brief Reads the bit group 'BufWReady' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1477. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufWReady(void);
  1478. /*! \brief Writes the bit group 'CardInsertion' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1479. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInsertion(U8 data);
  1480. /*! \brief Reads the bit group 'CardInsertion' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1481. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInsertion(void);
  1482. /*! \brief Writes the bit group 'BufRReady' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1483. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufRReady(U8 data);
  1484. /*! \brief Reads the bit group 'BufRReady' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1485. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufRReady(void);
  1486. /*! \brief Writes the bit group 'CardRemoval' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1487. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardRemoval(U8 data);
  1488. /*! \brief Reads the bit group 'CardRemoval' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1489. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardRemoval(void);
  1490. /*! \brief Writes the bit group 'CardInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1491. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInt(U8 data);
  1492. /*! \brief Reads the bit group 'CardInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1493. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInt(void);
  1494. /*! \brief Writes the bit group 'BootAckRcv' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1495. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BootAckRcv(U8 data);
  1496. /*! \brief Reads the bit group 'BootAckRcv' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1497. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BootAckRcv(void);
  1498. /*! \brief Writes the bit group 'ErrInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1499. void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_ErrInt(U8 data);
  1500. /*! \brief Reads the bit group 'ErrInt' of register 'SDIO1_ErrIntStaEnNorIntStaReg'. */
  1501. U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_ErrInt(void);
  1502. #else /* GH_INLINE_LEVEL == 0 */
  1503. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg(U32 data)
  1504. {
  1505. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = data;
  1506. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1507. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg] <-- 0x%08x\n",
  1508. REG_SDIO1_ERRINTSTAENNORINTSTAREG,data,data);
  1509. #endif
  1510. }
  1511. GH_INLINE U32 GH_SDIO1_get_ErrIntStaEnNorIntStaReg(void)
  1512. {
  1513. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1514. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1515. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg] --> 0x%08x\n",
  1516. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1517. #endif
  1518. return value;
  1519. }
  1520. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn(U8 data)
  1521. {
  1522. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1523. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1524. d.bitc.cmdtimeouterrstatusen = data;
  1525. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1526. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1527. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn] <-- 0x%08x\n",
  1528. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1529. #endif
  1530. }
  1531. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn(void)
  1532. {
  1533. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1534. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1535. tmp_value.all = value;
  1536. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1537. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdTimeoutErrStatusEn] --> 0x%08x\n",
  1538. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1539. #endif
  1540. return tmp_value.bitc.cmdtimeouterrstatusen;
  1541. }
  1542. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn(U8 data)
  1543. {
  1544. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1545. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1546. d.bitc.cmdendbiterrstatusen = data;
  1547. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1548. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1549. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn] <-- 0x%08x\n",
  1550. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1551. #endif
  1552. }
  1553. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn(void)
  1554. {
  1555. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1556. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1557. tmp_value.all = value;
  1558. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1559. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdEndBitErrStatusEn] --> 0x%08x\n",
  1560. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1561. #endif
  1562. return tmp_value.bitc.cmdendbiterrstatusen;
  1563. }
  1564. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn(U8 data)
  1565. {
  1566. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1567. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1568. d.bitc.cmdcrcerrstatusen = data;
  1569. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1570. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1571. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn] <-- 0x%08x\n",
  1572. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1573. #endif
  1574. }
  1575. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn(void)
  1576. {
  1577. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1578. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1579. tmp_value.all = value;
  1580. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1581. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdCrcErrStatusEn] --> 0x%08x\n",
  1582. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1583. #endif
  1584. return tmp_value.bitc.cmdcrcerrstatusen;
  1585. }
  1586. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn(U8 data)
  1587. {
  1588. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1589. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1590. d.bitc.cmdindexerrstatusen = data;
  1591. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1592. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1593. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn] <-- 0x%08x\n",
  1594. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1595. #endif
  1596. }
  1597. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn(void)
  1598. {
  1599. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1600. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1601. tmp_value.all = value;
  1602. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1603. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdIndexErrStatusEn] --> 0x%08x\n",
  1604. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1605. #endif
  1606. return tmp_value.bitc.cmdindexerrstatusen;
  1607. }
  1608. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn(U8 data)
  1609. {
  1610. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1611. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1612. d.bitc.datacrcerrstatusen = data;
  1613. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1614. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1615. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn] <-- 0x%08x\n",
  1616. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1617. #endif
  1618. }
  1619. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn(void)
  1620. {
  1621. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1622. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1623. tmp_value.all = value;
  1624. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1625. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataCrcErrStatusEn] --> 0x%08x\n",
  1626. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1627. #endif
  1628. return tmp_value.bitc.datacrcerrstatusen;
  1629. }
  1630. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn(U8 data)
  1631. {
  1632. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1633. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1634. d.bitc.datatimeouterrstatusen = data;
  1635. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1636. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1637. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn] <-- 0x%08x\n",
  1638. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1639. #endif
  1640. }
  1641. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn(void)
  1642. {
  1643. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1644. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1645. tmp_value.all = value;
  1646. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1647. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataTimeoutErrStatusEn] --> 0x%08x\n",
  1648. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1649. #endif
  1650. return tmp_value.bitc.datatimeouterrstatusen;
  1651. }
  1652. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn(U8 data)
  1653. {
  1654. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1655. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1656. d.bitc.dataendbiterrstatusen = data;
  1657. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1658. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1659. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn] <-- 0x%08x\n",
  1660. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1661. #endif
  1662. }
  1663. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn(void)
  1664. {
  1665. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1666. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1667. tmp_value.all = value;
  1668. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1669. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DataEndBitErrStatusEn] --> 0x%08x\n",
  1670. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1671. #endif
  1672. return tmp_value.bitc.dataendbiterrstatusen;
  1673. }
  1674. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn(U8 data)
  1675. {
  1676. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1677. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1678. d.bitc.curlimiterrstatusen = data;
  1679. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1680. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1681. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn] <-- 0x%08x\n",
  1682. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1683. #endif
  1684. }
  1685. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn(void)
  1686. {
  1687. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1688. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1689. tmp_value.all = value;
  1690. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1691. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CurLimitErrStatusEn] --> 0x%08x\n",
  1692. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1693. #endif
  1694. return tmp_value.bitc.curlimiterrstatusen;
  1695. }
  1696. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn(U8 data)
  1697. {
  1698. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1699. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1700. d.bitc.autocmd12errstatusen = data;
  1701. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1702. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1703. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn] <-- 0x%08x\n",
  1704. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1705. #endif
  1706. }
  1707. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn(void)
  1708. {
  1709. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1710. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1711. tmp_value.all = value;
  1712. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1713. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_AutoCmd12ErrStatusEn] --> 0x%08x\n",
  1714. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1715. #endif
  1716. return tmp_value.bitc.autocmd12errstatusen;
  1717. }
  1718. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn(U8 data)
  1719. {
  1720. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1721. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1722. d.bitc.vendorspecificerrstatusen = data;
  1723. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1724. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1725. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn] <-- 0x%08x\n",
  1726. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1727. #endif
  1728. }
  1729. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn(void)
  1730. {
  1731. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1732. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1733. tmp_value.all = value;
  1734. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1735. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_VendorSpecificErrStatusEn] --> 0x%08x\n",
  1736. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1737. #endif
  1738. return tmp_value.bitc.vendorspecificerrstatusen;
  1739. }
  1740. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdComplete(U8 data)
  1741. {
  1742. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1743. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1744. d.bitc.cmdcomplete = data;
  1745. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1746. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1747. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CmdComplete] <-- 0x%08x\n",
  1748. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1749. #endif
  1750. }
  1751. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdComplete(void)
  1752. {
  1753. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1754. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1755. tmp_value.all = value;
  1756. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1757. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CmdComplete] --> 0x%08x\n",
  1758. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1759. #endif
  1760. return tmp_value.bitc.cmdcomplete;
  1761. }
  1762. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BlkGapEvent(U8 data)
  1763. {
  1764. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1765. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1766. d.bitc.blkgapevent = data;
  1767. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1768. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1769. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BlkGapEvent] <-- 0x%08x\n",
  1770. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1771. #endif
  1772. }
  1773. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BlkGapEvent(void)
  1774. {
  1775. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1776. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1777. tmp_value.all = value;
  1778. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1779. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BlkGapEvent] --> 0x%08x\n",
  1780. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1781. #endif
  1782. return tmp_value.bitc.blkgapevent;
  1783. }
  1784. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DmaInt(U8 data)
  1785. {
  1786. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1787. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1788. d.bitc.dmaint = data;
  1789. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1790. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1791. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_DmaInt] <-- 0x%08x\n",
  1792. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1793. #endif
  1794. }
  1795. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DmaInt(void)
  1796. {
  1797. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1798. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1799. tmp_value.all = value;
  1800. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1801. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_DmaInt] --> 0x%08x\n",
  1802. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1803. #endif
  1804. return tmp_value.bitc.dmaint;
  1805. }
  1806. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_TraComplete(U8 data)
  1807. {
  1808. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1809. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1810. d.bitc.tracomplete = data;
  1811. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1812. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1813. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_TraComplete] <-- 0x%08x\n",
  1814. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1815. #endif
  1816. }
  1817. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_TraComplete(void)
  1818. {
  1819. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1820. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1821. tmp_value.all = value;
  1822. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1823. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_TraComplete] --> 0x%08x\n",
  1824. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1825. #endif
  1826. return tmp_value.bitc.tracomplete;
  1827. }
  1828. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufWReady(U8 data)
  1829. {
  1830. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1831. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1832. d.bitc.bufwready = data;
  1833. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1834. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1835. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufWReady] <-- 0x%08x\n",
  1836. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1837. #endif
  1838. }
  1839. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufWReady(void)
  1840. {
  1841. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1842. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1843. tmp_value.all = value;
  1844. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1845. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufWReady] --> 0x%08x\n",
  1846. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1847. #endif
  1848. return tmp_value.bitc.bufwready;
  1849. }
  1850. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInsertion(U8 data)
  1851. {
  1852. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1853. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1854. d.bitc.cardinsertion = data;
  1855. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1856. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1857. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInsertion] <-- 0x%08x\n",
  1858. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1859. #endif
  1860. }
  1861. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInsertion(void)
  1862. {
  1863. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1864. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1865. tmp_value.all = value;
  1866. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1867. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInsertion] --> 0x%08x\n",
  1868. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1869. #endif
  1870. return tmp_value.bitc.cardinsertion;
  1871. }
  1872. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufRReady(U8 data)
  1873. {
  1874. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1875. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1876. d.bitc.bufrready = data;
  1877. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1878. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1879. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BufRReady] <-- 0x%08x\n",
  1880. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1881. #endif
  1882. }
  1883. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufRReady(void)
  1884. {
  1885. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1886. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1887. tmp_value.all = value;
  1888. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1889. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BufRReady] --> 0x%08x\n",
  1890. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1891. #endif
  1892. return tmp_value.bitc.bufrready;
  1893. }
  1894. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardRemoval(U8 data)
  1895. {
  1896. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1897. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1898. d.bitc.cardremoval = data;
  1899. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1900. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1901. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardRemoval] <-- 0x%08x\n",
  1902. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1903. #endif
  1904. }
  1905. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardRemoval(void)
  1906. {
  1907. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1908. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1909. tmp_value.all = value;
  1910. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1911. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardRemoval] --> 0x%08x\n",
  1912. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1913. #endif
  1914. return tmp_value.bitc.cardremoval;
  1915. }
  1916. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInt(U8 data)
  1917. {
  1918. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1919. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1920. d.bitc.cardint = data;
  1921. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1922. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1923. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_CardInt] <-- 0x%08x\n",
  1924. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1925. #endif
  1926. }
  1927. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInt(void)
  1928. {
  1929. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1930. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1931. tmp_value.all = value;
  1932. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1933. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_CardInt] --> 0x%08x\n",
  1934. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1935. #endif
  1936. return tmp_value.bitc.cardint;
  1937. }
  1938. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BootAckRcv(U8 data)
  1939. {
  1940. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1941. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1942. d.bitc.bootackrcv = data;
  1943. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1944. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1945. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_BootAckRcv] <-- 0x%08x\n",
  1946. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1947. #endif
  1948. }
  1949. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BootAckRcv(void)
  1950. {
  1951. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1952. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1953. tmp_value.all = value;
  1954. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1955. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_BootAckRcv] --> 0x%08x\n",
  1956. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1957. #endif
  1958. return tmp_value.bitc.bootackrcv;
  1959. }
  1960. GH_INLINE void GH_SDIO1_set_ErrIntStaEnNorIntStaReg_ErrInt(U8 data)
  1961. {
  1962. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S d;
  1963. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG;
  1964. d.bitc.errint = data;
  1965. *(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG = d.all;
  1966. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1967. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStaEnNorIntStaReg_ErrInt] <-- 0x%08x\n",
  1968. REG_SDIO1_ERRINTSTAENNORINTSTAREG,d.all,d.all);
  1969. #endif
  1970. }
  1971. GH_INLINE U8 GH_SDIO1_get_ErrIntStaEnNorIntStaReg_ErrInt(void)
  1972. {
  1973. GH_SDIO1_ERRINTSTAENNORINTSTAREG_S tmp_value;
  1974. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTAENNORINTSTAREG);
  1975. tmp_value.all = value;
  1976. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  1977. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStaEnNorIntStaReg_ErrInt] --> 0x%08x\n",
  1978. REG_SDIO1_ERRINTSTAENNORINTSTAREG,value);
  1979. #endif
  1980. return tmp_value.bitc.errint;
  1981. }
  1982. #endif /* GH_INLINE_LEVEL == 0 */
  1983. /*----------------------------------------------------------------------------*/
  1984. /* register SDIO1_ErrIntStatusCommondReg (read/write) */
  1985. /*----------------------------------------------------------------------------*/
  1986. #if GH_INLINE_LEVEL == 0
  1987. /*! \brief Writes the register 'SDIO1_ErrIntStatusCommondReg'. */
  1988. void GH_SDIO1_set_ErrIntStatusCommondReg(U32 data);
  1989. /*! \brief Reads the register 'SDIO1_ErrIntStatusCommondReg'. */
  1990. U32 GH_SDIO1_get_ErrIntStatusCommondReg(void);
  1991. /*! \brief Writes the bit group 'CmdTimeoutErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  1992. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdTimeoutErr(U8 data);
  1993. /*! \brief Reads the bit group 'CmdTimeoutErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  1994. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdTimeoutErr(void);
  1995. /*! \brief Writes the bit group 'CmdCrcErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  1996. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcErr(U8 data);
  1997. /*! \brief Reads the bit group 'CmdCrcErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  1998. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcErr(void);
  1999. /*! \brief Writes the bit group 'CmdEndBitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2000. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdEndBitErr(U8 data);
  2001. /*! \brief Reads the bit group 'CmdEndBitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2002. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdEndBitErr(void);
  2003. /*! \brief Writes the bit group 'CmdIndexErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2004. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexErr(U8 data);
  2005. /*! \brief Reads the bit group 'CmdIndexErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2006. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexErr(void);
  2007. /*! \brief Writes the bit group 'DataTimeoutErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2008. void GH_SDIO1_set_ErrIntStatusCommondReg_DataTimeoutErr(U8 data);
  2009. /*! \brief Reads the bit group 'DataTimeoutErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2010. U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataTimeoutErr(void);
  2011. /*! \brief Writes the bit group 'DataCrcErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2012. void GH_SDIO1_set_ErrIntStatusCommondReg_DataCrcErr(U8 data);
  2013. /*! \brief Reads the bit group 'DataCrcErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2014. U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataCrcErr(void);
  2015. /*! \brief Writes the bit group 'DataEndBitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2016. void GH_SDIO1_set_ErrIntStatusCommondReg_DataEndBitErr(U8 data);
  2017. /*! \brief Reads the bit group 'DataEndBitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2018. U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataEndBitErr(void);
  2019. /*! \brief Writes the bit group 'CurLimitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2020. void GH_SDIO1_set_ErrIntStatusCommondReg_CurLimitErr(U8 data);
  2021. /*! \brief Reads the bit group 'CurLimitErr' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2022. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CurLimitErr(void);
  2023. /*! \brief Writes the bit group 'AutoCmd12Err' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2024. void GH_SDIO1_set_ErrIntStatusCommondReg_AutoCmd12Err(U8 data);
  2025. /*! \brief Reads the bit group 'AutoCmd12Err' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2026. U8 GH_SDIO1_get_ErrIntStatusCommondReg_AutoCmd12Err(void);
  2027. /*! \brief Writes the bit group 'VendorSpecificErrStatus' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2028. void GH_SDIO1_set_ErrIntStatusCommondReg_VendorSpecificErrStatus(U8 data);
  2029. /*! \brief Reads the bit group 'VendorSpecificErrStatus' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2030. U8 GH_SDIO1_get_ErrIntStatusCommondReg_VendorSpecificErrStatus(void);
  2031. /*! \brief Writes the bit group 'RepTypeSelect' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2032. void GH_SDIO1_set_ErrIntStatusCommondReg_RepTypeSelect(U8 data);
  2033. /*! \brief Reads the bit group 'RepTypeSelect' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2034. U8 GH_SDIO1_get_ErrIntStatusCommondReg_RepTypeSelect(void);
  2035. /*! \brief Writes the bit group 'CmdCrcCheckEn' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2036. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcCheckEn(U8 data);
  2037. /*! \brief Reads the bit group 'CmdCrcCheckEn' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2038. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcCheckEn(void);
  2039. /*! \brief Writes the bit group 'DataPreSelect' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2040. void GH_SDIO1_set_ErrIntStatusCommondReg_DataPreSelect(U8 data);
  2041. /*! \brief Reads the bit group 'DataPreSelect' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2042. U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataPreSelect(void);
  2043. /*! \brief Writes the bit group 'CmdIndexCheckEn' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2044. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexCheckEn(U8 data);
  2045. /*! \brief Reads the bit group 'CmdIndexCheckEn' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2046. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexCheckEn(void);
  2047. /*! \brief Writes the bit group 'CmdType' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2048. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdType(U8 data);
  2049. /*! \brief Reads the bit group 'CmdType' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2050. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdType(void);
  2051. /*! \brief Writes the bit group 'CmdIndex' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2052. void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndex(U8 data);
  2053. /*! \brief Reads the bit group 'CmdIndex' of register 'SDIO1_ErrIntStatusCommondReg'. */
  2054. U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndex(void);
  2055. #else /* GH_INLINE_LEVEL == 0 */
  2056. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg(U32 data)
  2057. {
  2058. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = data;
  2059. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2060. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg] <-- 0x%08x\n",
  2061. REG_SDIO1_ERRINTSTATUSCOMMONDREG,data,data);
  2062. #endif
  2063. }
  2064. GH_INLINE U32 GH_SDIO1_get_ErrIntStatusCommondReg(void)
  2065. {
  2066. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2067. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2068. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg] --> 0x%08x\n",
  2069. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2070. #endif
  2071. return value;
  2072. }
  2073. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdTimeoutErr(U8 data)
  2074. {
  2075. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2076. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2077. d.bitc.cmdtimeouterr = data;
  2078. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2079. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2080. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdTimeoutErr] <-- 0x%08x\n",
  2081. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2082. #endif
  2083. }
  2084. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdTimeoutErr(void)
  2085. {
  2086. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2087. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2088. tmp_value.all = value;
  2089. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2090. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdTimeoutErr] --> 0x%08x\n",
  2091. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2092. #endif
  2093. return tmp_value.bitc.cmdtimeouterr;
  2094. }
  2095. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcErr(U8 data)
  2096. {
  2097. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2098. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2099. d.bitc.cmdcrcerr = data;
  2100. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2101. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2102. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcErr] <-- 0x%08x\n",
  2103. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2104. #endif
  2105. }
  2106. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcErr(void)
  2107. {
  2108. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2109. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2110. tmp_value.all = value;
  2111. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2112. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcErr] --> 0x%08x\n",
  2113. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2114. #endif
  2115. return tmp_value.bitc.cmdcrcerr;
  2116. }
  2117. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdEndBitErr(U8 data)
  2118. {
  2119. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2120. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2121. d.bitc.cmdendbiterr = data;
  2122. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2123. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2124. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdEndBitErr] <-- 0x%08x\n",
  2125. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2126. #endif
  2127. }
  2128. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdEndBitErr(void)
  2129. {
  2130. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2131. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2132. tmp_value.all = value;
  2133. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2134. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdEndBitErr] --> 0x%08x\n",
  2135. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2136. #endif
  2137. return tmp_value.bitc.cmdendbiterr;
  2138. }
  2139. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexErr(U8 data)
  2140. {
  2141. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2142. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2143. d.bitc.cmdindexerr = data;
  2144. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2145. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2146. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexErr] <-- 0x%08x\n",
  2147. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2148. #endif
  2149. }
  2150. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexErr(void)
  2151. {
  2152. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2153. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2154. tmp_value.all = value;
  2155. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2156. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexErr] --> 0x%08x\n",
  2157. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2158. #endif
  2159. return tmp_value.bitc.cmdindexerr;
  2160. }
  2161. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_DataTimeoutErr(U8 data)
  2162. {
  2163. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2164. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2165. d.bitc.datatimeouterr = data;
  2166. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2167. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2168. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_DataTimeoutErr] <-- 0x%08x\n",
  2169. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2170. #endif
  2171. }
  2172. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataTimeoutErr(void)
  2173. {
  2174. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2175. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2176. tmp_value.all = value;
  2177. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2178. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_DataTimeoutErr] --> 0x%08x\n",
  2179. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2180. #endif
  2181. return tmp_value.bitc.datatimeouterr;
  2182. }
  2183. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_DataCrcErr(U8 data)
  2184. {
  2185. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2186. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2187. d.bitc.datacrcerr = data;
  2188. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2189. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2190. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_DataCrcErr] <-- 0x%08x\n",
  2191. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2192. #endif
  2193. }
  2194. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataCrcErr(void)
  2195. {
  2196. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2197. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2198. tmp_value.all = value;
  2199. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2200. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_DataCrcErr] --> 0x%08x\n",
  2201. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2202. #endif
  2203. return tmp_value.bitc.datacrcerr;
  2204. }
  2205. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_DataEndBitErr(U8 data)
  2206. {
  2207. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2208. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2209. d.bitc.dataendbiterr = data;
  2210. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2211. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2212. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_DataEndBitErr] <-- 0x%08x\n",
  2213. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2214. #endif
  2215. }
  2216. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataEndBitErr(void)
  2217. {
  2218. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2219. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2220. tmp_value.all = value;
  2221. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2222. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_DataEndBitErr] --> 0x%08x\n",
  2223. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2224. #endif
  2225. return tmp_value.bitc.dataendbiterr;
  2226. }
  2227. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CurLimitErr(U8 data)
  2228. {
  2229. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2230. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2231. d.bitc.curlimiterr = data;
  2232. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2233. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2234. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CurLimitErr] <-- 0x%08x\n",
  2235. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2236. #endif
  2237. }
  2238. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CurLimitErr(void)
  2239. {
  2240. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2241. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2242. tmp_value.all = value;
  2243. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2244. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CurLimitErr] --> 0x%08x\n",
  2245. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2246. #endif
  2247. return tmp_value.bitc.curlimiterr;
  2248. }
  2249. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_AutoCmd12Err(U8 data)
  2250. {
  2251. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2252. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2253. d.bitc.autocmd12err = data;
  2254. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2255. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2256. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_AutoCmd12Err] <-- 0x%08x\n",
  2257. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2258. #endif
  2259. }
  2260. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_AutoCmd12Err(void)
  2261. {
  2262. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2263. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2264. tmp_value.all = value;
  2265. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2266. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_AutoCmd12Err] --> 0x%08x\n",
  2267. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2268. #endif
  2269. return tmp_value.bitc.autocmd12err;
  2270. }
  2271. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_VendorSpecificErrStatus(U8 data)
  2272. {
  2273. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2274. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2275. d.bitc.vendorspecificerrstatus = data;
  2276. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2277. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2278. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_VendorSpecificErrStatus] <-- 0x%08x\n",
  2279. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2280. #endif
  2281. }
  2282. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_VendorSpecificErrStatus(void)
  2283. {
  2284. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2285. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2286. tmp_value.all = value;
  2287. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2288. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_VendorSpecificErrStatus] --> 0x%08x\n",
  2289. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2290. #endif
  2291. return tmp_value.bitc.vendorspecificerrstatus;
  2292. }
  2293. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_RepTypeSelect(U8 data)
  2294. {
  2295. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2296. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2297. d.bitc.reptypeselect = data;
  2298. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2299. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2300. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_RepTypeSelect] <-- 0x%08x\n",
  2301. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2302. #endif
  2303. }
  2304. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_RepTypeSelect(void)
  2305. {
  2306. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2307. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2308. tmp_value.all = value;
  2309. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2310. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_RepTypeSelect] --> 0x%08x\n",
  2311. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2312. #endif
  2313. return tmp_value.bitc.reptypeselect;
  2314. }
  2315. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcCheckEn(U8 data)
  2316. {
  2317. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2318. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2319. d.bitc.cmdcrcchecken = data;
  2320. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2321. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2322. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdCrcCheckEn] <-- 0x%08x\n",
  2323. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2324. #endif
  2325. }
  2326. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcCheckEn(void)
  2327. {
  2328. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2329. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2330. tmp_value.all = value;
  2331. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2332. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdCrcCheckEn] --> 0x%08x\n",
  2333. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2334. #endif
  2335. return tmp_value.bitc.cmdcrcchecken;
  2336. }
  2337. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_DataPreSelect(U8 data)
  2338. {
  2339. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2340. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2341. d.bitc.datapreselect = data;
  2342. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2343. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2344. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_DataPreSelect] <-- 0x%08x\n",
  2345. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2346. #endif
  2347. }
  2348. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_DataPreSelect(void)
  2349. {
  2350. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2351. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2352. tmp_value.all = value;
  2353. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2354. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_DataPreSelect] --> 0x%08x\n",
  2355. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2356. #endif
  2357. return tmp_value.bitc.datapreselect;
  2358. }
  2359. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexCheckEn(U8 data)
  2360. {
  2361. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2362. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2363. d.bitc.cmdindexchecken = data;
  2364. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2365. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2366. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndexCheckEn] <-- 0x%08x\n",
  2367. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2368. #endif
  2369. }
  2370. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexCheckEn(void)
  2371. {
  2372. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2373. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2374. tmp_value.all = value;
  2375. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2376. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndexCheckEn] --> 0x%08x\n",
  2377. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2378. #endif
  2379. return tmp_value.bitc.cmdindexchecken;
  2380. }
  2381. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdType(U8 data)
  2382. {
  2383. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2384. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2385. d.bitc.cmdtype = data;
  2386. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2387. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2388. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdType] <-- 0x%08x\n",
  2389. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2390. #endif
  2391. }
  2392. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdType(void)
  2393. {
  2394. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2395. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2396. tmp_value.all = value;
  2397. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2398. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdType] --> 0x%08x\n",
  2399. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2400. #endif
  2401. return tmp_value.bitc.cmdtype;
  2402. }
  2403. GH_INLINE void GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndex(U8 data)
  2404. {
  2405. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S d;
  2406. d.all = *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG;
  2407. d.bitc.cmdindex = data;
  2408. *(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG = d.all;
  2409. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2410. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ErrIntStatusCommondReg_CmdIndex] <-- 0x%08x\n",
  2411. REG_SDIO1_ERRINTSTATUSCOMMONDREG,d.all,d.all);
  2412. #endif
  2413. }
  2414. GH_INLINE U8 GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndex(void)
  2415. {
  2416. GH_SDIO1_ERRINTSTATUSCOMMONDREG_S tmp_value;
  2417. U32 value = (*(volatile U32 *)REG_SDIO1_ERRINTSTATUSCOMMONDREG);
  2418. tmp_value.all = value;
  2419. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2420. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ErrIntStatusCommondReg_CmdIndex] --> 0x%08x\n",
  2421. REG_SDIO1_ERRINTSTATUSCOMMONDREG,value);
  2422. #endif
  2423. return tmp_value.bitc.cmdindex;
  2424. }
  2425. #endif /* GH_INLINE_LEVEL == 0 */
  2426. /*----------------------------------------------------------------------------*/
  2427. /* register SDIO1_Control01Reg (read/write) */
  2428. /*----------------------------------------------------------------------------*/
  2429. #if GH_INLINE_LEVEL == 0
  2430. /*! \brief Writes the register 'SDIO1_Control01Reg'. */
  2431. void GH_SDIO1_set_Control01Reg(U32 data);
  2432. /*! \brief Reads the register 'SDIO1_Control01Reg'. */
  2433. U32 GH_SDIO1_get_Control01Reg(void);
  2434. /*! \brief Writes the bit group 'DataTimeoutCounterValue' of register 'SDIO1_Control01Reg'. */
  2435. void GH_SDIO1_set_Control01Reg_DataTimeoutCounterValue(U8 data);
  2436. /*! \brief Reads the bit group 'DataTimeoutCounterValue' of register 'SDIO1_Control01Reg'. */
  2437. U8 GH_SDIO1_get_Control01Reg_DataTimeoutCounterValue(void);
  2438. /*! \brief Writes the bit group 'SoftwareResetCmdLine' of register 'SDIO1_Control01Reg'. */
  2439. void GH_SDIO1_set_Control01Reg_SoftwareResetCmdLine(U8 data);
  2440. /*! \brief Reads the bit group 'SoftwareResetCmdLine' of register 'SDIO1_Control01Reg'. */
  2441. U8 GH_SDIO1_get_Control01Reg_SoftwareResetCmdLine(void);
  2442. /*! \brief Writes the bit group 'SoftwareResetAll' of register 'SDIO1_Control01Reg'. */
  2443. void GH_SDIO1_set_Control01Reg_SoftwareResetAll(U8 data);
  2444. /*! \brief Reads the bit group 'SoftwareResetAll' of register 'SDIO1_Control01Reg'. */
  2445. U8 GH_SDIO1_get_Control01Reg_SoftwareResetAll(void);
  2446. /*! \brief Writes the bit group 'SoftwareResetDatLine' of register 'SDIO1_Control01Reg'. */
  2447. void GH_SDIO1_set_Control01Reg_SoftwareResetDatLine(U8 data);
  2448. /*! \brief Reads the bit group 'SoftwareResetDatLine' of register 'SDIO1_Control01Reg'. */
  2449. U8 GH_SDIO1_get_Control01Reg_SoftwareResetDatLine(void);
  2450. /*! \brief Writes the bit group 'InternalClkEn' of register 'SDIO1_Control01Reg'. */
  2451. void GH_SDIO1_set_Control01Reg_InternalClkEn(U8 data);
  2452. /*! \brief Reads the bit group 'InternalClkEn' of register 'SDIO1_Control01Reg'. */
  2453. U8 GH_SDIO1_get_Control01Reg_InternalClkEn(void);
  2454. /*! \brief Writes the bit group 'InternalClkStable' of register 'SDIO1_Control01Reg'. */
  2455. void GH_SDIO1_set_Control01Reg_InternalClkStable(U8 data);
  2456. /*! \brief Reads the bit group 'InternalClkStable' of register 'SDIO1_Control01Reg'. */
  2457. U8 GH_SDIO1_get_Control01Reg_InternalClkStable(void);
  2458. /*! \brief Writes the bit group 'SdClkEn' of register 'SDIO1_Control01Reg'. */
  2459. void GH_SDIO1_set_Control01Reg_SdClkEn(U8 data);
  2460. /*! \brief Reads the bit group 'SdClkEn' of register 'SDIO1_Control01Reg'. */
  2461. U8 GH_SDIO1_get_Control01Reg_SdClkEn(void);
  2462. /*! \brief Writes the bit group 'SdclkFreSelect' of register 'SDIO1_Control01Reg'. */
  2463. void GH_SDIO1_set_Control01Reg_SdclkFreSelect(U8 data);
  2464. /*! \brief Reads the bit group 'SdclkFreSelect' of register 'SDIO1_Control01Reg'. */
  2465. U8 GH_SDIO1_get_Control01Reg_SdclkFreSelect(void);
  2466. #else /* GH_INLINE_LEVEL == 0 */
  2467. GH_INLINE void GH_SDIO1_set_Control01Reg(U32 data)
  2468. {
  2469. *(volatile U32 *)REG_SDIO1_CONTROL01REG = data;
  2470. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2471. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg] <-- 0x%08x\n",
  2472. REG_SDIO1_CONTROL01REG,data,data);
  2473. #endif
  2474. }
  2475. GH_INLINE U32 GH_SDIO1_get_Control01Reg(void)
  2476. {
  2477. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2478. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2479. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg] --> 0x%08x\n",
  2480. REG_SDIO1_CONTROL01REG,value);
  2481. #endif
  2482. return value;
  2483. }
  2484. GH_INLINE void GH_SDIO1_set_Control01Reg_DataTimeoutCounterValue(U8 data)
  2485. {
  2486. GH_SDIO1_CONTROL01REG_S d;
  2487. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2488. d.bitc.datatimeoutcountervalue = data;
  2489. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2490. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2491. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_DataTimeoutCounterValue] <-- 0x%08x\n",
  2492. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2493. #endif
  2494. }
  2495. GH_INLINE U8 GH_SDIO1_get_Control01Reg_DataTimeoutCounterValue(void)
  2496. {
  2497. GH_SDIO1_CONTROL01REG_S tmp_value;
  2498. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2499. tmp_value.all = value;
  2500. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2501. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_DataTimeoutCounterValue] --> 0x%08x\n",
  2502. REG_SDIO1_CONTROL01REG,value);
  2503. #endif
  2504. return tmp_value.bitc.datatimeoutcountervalue;
  2505. }
  2506. GH_INLINE void GH_SDIO1_set_Control01Reg_SoftwareResetCmdLine(U8 data)
  2507. {
  2508. GH_SDIO1_CONTROL01REG_S d;
  2509. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2510. d.bitc.softwareresetcmdline = data;
  2511. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2512. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2513. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_SoftwareResetCmdLine] <-- 0x%08x\n",
  2514. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2515. #endif
  2516. }
  2517. GH_INLINE U8 GH_SDIO1_get_Control01Reg_SoftwareResetCmdLine(void)
  2518. {
  2519. GH_SDIO1_CONTROL01REG_S tmp_value;
  2520. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2521. tmp_value.all = value;
  2522. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2523. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_SoftwareResetCmdLine] --> 0x%08x\n",
  2524. REG_SDIO1_CONTROL01REG,value);
  2525. #endif
  2526. return tmp_value.bitc.softwareresetcmdline;
  2527. }
  2528. GH_INLINE void GH_SDIO1_set_Control01Reg_SoftwareResetAll(U8 data)
  2529. {
  2530. GH_SDIO1_CONTROL01REG_S d;
  2531. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2532. d.bitc.softwareresetall = data;
  2533. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2534. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2535. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_SoftwareResetAll] <-- 0x%08x\n",
  2536. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2537. #endif
  2538. }
  2539. GH_INLINE U8 GH_SDIO1_get_Control01Reg_SoftwareResetAll(void)
  2540. {
  2541. GH_SDIO1_CONTROL01REG_S tmp_value;
  2542. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2543. tmp_value.all = value;
  2544. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2545. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_SoftwareResetAll] --> 0x%08x\n",
  2546. REG_SDIO1_CONTROL01REG,value);
  2547. #endif
  2548. return tmp_value.bitc.softwareresetall;
  2549. }
  2550. GH_INLINE void GH_SDIO1_set_Control01Reg_SoftwareResetDatLine(U8 data)
  2551. {
  2552. GH_SDIO1_CONTROL01REG_S d;
  2553. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2554. d.bitc.softwareresetdatline = data;
  2555. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2556. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2557. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_SoftwareResetDatLine] <-- 0x%08x\n",
  2558. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2559. #endif
  2560. }
  2561. GH_INLINE U8 GH_SDIO1_get_Control01Reg_SoftwareResetDatLine(void)
  2562. {
  2563. GH_SDIO1_CONTROL01REG_S tmp_value;
  2564. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2565. tmp_value.all = value;
  2566. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2567. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_SoftwareResetDatLine] --> 0x%08x\n",
  2568. REG_SDIO1_CONTROL01REG,value);
  2569. #endif
  2570. return tmp_value.bitc.softwareresetdatline;
  2571. }
  2572. GH_INLINE void GH_SDIO1_set_Control01Reg_InternalClkEn(U8 data)
  2573. {
  2574. GH_SDIO1_CONTROL01REG_S d;
  2575. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2576. d.bitc.internalclken = data;
  2577. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2578. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2579. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_InternalClkEn] <-- 0x%08x\n",
  2580. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2581. #endif
  2582. }
  2583. GH_INLINE U8 GH_SDIO1_get_Control01Reg_InternalClkEn(void)
  2584. {
  2585. GH_SDIO1_CONTROL01REG_S tmp_value;
  2586. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2587. tmp_value.all = value;
  2588. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2589. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_InternalClkEn] --> 0x%08x\n",
  2590. REG_SDIO1_CONTROL01REG,value);
  2591. #endif
  2592. return tmp_value.bitc.internalclken;
  2593. }
  2594. GH_INLINE void GH_SDIO1_set_Control01Reg_InternalClkStable(U8 data)
  2595. {
  2596. GH_SDIO1_CONTROL01REG_S d;
  2597. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2598. d.bitc.internalclkstable = data;
  2599. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2600. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2601. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_InternalClkStable] <-- 0x%08x\n",
  2602. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2603. #endif
  2604. }
  2605. GH_INLINE U8 GH_SDIO1_get_Control01Reg_InternalClkStable(void)
  2606. {
  2607. GH_SDIO1_CONTROL01REG_S tmp_value;
  2608. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2609. tmp_value.all = value;
  2610. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2611. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_InternalClkStable] --> 0x%08x\n",
  2612. REG_SDIO1_CONTROL01REG,value);
  2613. #endif
  2614. return tmp_value.bitc.internalclkstable;
  2615. }
  2616. GH_INLINE void GH_SDIO1_set_Control01Reg_SdClkEn(U8 data)
  2617. {
  2618. GH_SDIO1_CONTROL01REG_S d;
  2619. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2620. d.bitc.sdclken = data;
  2621. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2622. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2623. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_SdClkEn] <-- 0x%08x\n",
  2624. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2625. #endif
  2626. }
  2627. GH_INLINE U8 GH_SDIO1_get_Control01Reg_SdClkEn(void)
  2628. {
  2629. GH_SDIO1_CONTROL01REG_S tmp_value;
  2630. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2631. tmp_value.all = value;
  2632. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2633. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_SdClkEn] --> 0x%08x\n",
  2634. REG_SDIO1_CONTROL01REG,value);
  2635. #endif
  2636. return tmp_value.bitc.sdclken;
  2637. }
  2638. GH_INLINE void GH_SDIO1_set_Control01Reg_SdclkFreSelect(U8 data)
  2639. {
  2640. GH_SDIO1_CONTROL01REG_S d;
  2641. d.all = *(volatile U32 *)REG_SDIO1_CONTROL01REG;
  2642. d.bitc.sdclkfreselect = data;
  2643. *(volatile U32 *)REG_SDIO1_CONTROL01REG = d.all;
  2644. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2645. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control01Reg_SdclkFreSelect] <-- 0x%08x\n",
  2646. REG_SDIO1_CONTROL01REG,d.all,d.all);
  2647. #endif
  2648. }
  2649. GH_INLINE U8 GH_SDIO1_get_Control01Reg_SdclkFreSelect(void)
  2650. {
  2651. GH_SDIO1_CONTROL01REG_S tmp_value;
  2652. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL01REG);
  2653. tmp_value.all = value;
  2654. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2655. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control01Reg_SdclkFreSelect] --> 0x%08x\n",
  2656. REG_SDIO1_CONTROL01REG,value);
  2657. #endif
  2658. return tmp_value.bitc.sdclkfreselect;
  2659. }
  2660. #endif /* GH_INLINE_LEVEL == 0 */
  2661. /*----------------------------------------------------------------------------*/
  2662. /* register SDIO1_Resp0Reg (read) */
  2663. /*----------------------------------------------------------------------------*/
  2664. #if GH_INLINE_LEVEL == 0
  2665. /*! \brief Reads the register 'SDIO1_Resp0Reg'. */
  2666. U32 GH_SDIO1_get_Resp0Reg(void);
  2667. #else /* GH_INLINE_LEVEL == 0 */
  2668. GH_INLINE U32 GH_SDIO1_get_Resp0Reg(void)
  2669. {
  2670. U32 value = (*(volatile U32 *)REG_SDIO1_RESP0REG);
  2671. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2672. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp0Reg] --> 0x%08x\n",
  2673. REG_SDIO1_RESP0REG,value);
  2674. #endif
  2675. return value;
  2676. }
  2677. #endif /* GH_INLINE_LEVEL == 0 */
  2678. /*----------------------------------------------------------------------------*/
  2679. /* register SDIO1_Resp1Reg (read) */
  2680. /*----------------------------------------------------------------------------*/
  2681. #if GH_INLINE_LEVEL == 0
  2682. /*! \brief Reads the register 'SDIO1_Resp1Reg'. */
  2683. U32 GH_SDIO1_get_Resp1Reg(void);
  2684. #else /* GH_INLINE_LEVEL == 0 */
  2685. GH_INLINE U32 GH_SDIO1_get_Resp1Reg(void)
  2686. {
  2687. U32 value = (*(volatile U32 *)REG_SDIO1_RESP1REG);
  2688. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2689. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp1Reg] --> 0x%08x\n",
  2690. REG_SDIO1_RESP1REG,value);
  2691. #endif
  2692. return value;
  2693. }
  2694. #endif /* GH_INLINE_LEVEL == 0 */
  2695. /*----------------------------------------------------------------------------*/
  2696. /* register SDIO1_Resp2Reg (read) */
  2697. /*----------------------------------------------------------------------------*/
  2698. #if GH_INLINE_LEVEL == 0
  2699. /*! \brief Reads the register 'SDIO1_Resp2Reg'. */
  2700. U32 GH_SDIO1_get_Resp2Reg(void);
  2701. #else /* GH_INLINE_LEVEL == 0 */
  2702. GH_INLINE U32 GH_SDIO1_get_Resp2Reg(void)
  2703. {
  2704. U32 value = (*(volatile U32 *)REG_SDIO1_RESP2REG);
  2705. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2706. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp2Reg] --> 0x%08x\n",
  2707. REG_SDIO1_RESP2REG,value);
  2708. #endif
  2709. return value;
  2710. }
  2711. #endif /* GH_INLINE_LEVEL == 0 */
  2712. /*----------------------------------------------------------------------------*/
  2713. /* register SDIO1_Resp3Reg (read) */
  2714. /*----------------------------------------------------------------------------*/
  2715. #if GH_INLINE_LEVEL == 0
  2716. /*! \brief Reads the register 'SDIO1_Resp3Reg'. */
  2717. U32 GH_SDIO1_get_Resp3Reg(void);
  2718. #else /* GH_INLINE_LEVEL == 0 */
  2719. GH_INLINE U32 GH_SDIO1_get_Resp3Reg(void)
  2720. {
  2721. U32 value = (*(volatile U32 *)REG_SDIO1_RESP3REG);
  2722. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2723. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Resp3Reg] --> 0x%08x\n",
  2724. REG_SDIO1_RESP3REG,value);
  2725. #endif
  2726. return value;
  2727. }
  2728. #endif /* GH_INLINE_LEVEL == 0 */
  2729. /*----------------------------------------------------------------------------*/
  2730. /* register SDIO1_Control00Reg (read/write) */
  2731. /*----------------------------------------------------------------------------*/
  2732. #if GH_INLINE_LEVEL == 0
  2733. /*! \brief Writes the register 'SDIO1_Control00Reg'. */
  2734. void GH_SDIO1_set_Control00Reg(U32 data);
  2735. /*! \brief Reads the register 'SDIO1_Control00Reg'. */
  2736. U32 GH_SDIO1_get_Control00Reg(void);
  2737. /*! \brief Writes the bit group 'LedControl' of register 'SDIO1_Control00Reg'. */
  2738. void GH_SDIO1_set_Control00Reg_LedControl(U8 data);
  2739. /*! \brief Reads the bit group 'LedControl' of register 'SDIO1_Control00Reg'. */
  2740. U8 GH_SDIO1_get_Control00Reg_LedControl(void);
  2741. /*! \brief Writes the bit group 'DataTraWidth' of register 'SDIO1_Control00Reg'. */
  2742. void GH_SDIO1_set_Control00Reg_DataTraWidth(U8 data);
  2743. /*! \brief Reads the bit group 'DataTraWidth' of register 'SDIO1_Control00Reg'. */
  2744. U8 GH_SDIO1_get_Control00Reg_DataTraWidth(void);
  2745. /*! \brief Writes the bit group 'Sd8BitMode' of register 'SDIO1_Control00Reg'. */
  2746. void GH_SDIO1_set_Control00Reg_Sd8BitMode(U8 data);
  2747. /*! \brief Reads the bit group 'Sd8BitMode' of register 'SDIO1_Control00Reg'. */
  2748. U8 GH_SDIO1_get_Control00Reg_Sd8BitMode(void);
  2749. /*! \brief Writes the bit group 'HostSpeedEn' of register 'SDIO1_Control00Reg'. */
  2750. void GH_SDIO1_set_Control00Reg_HostSpeedEn(U8 data);
  2751. /*! \brief Reads the bit group 'HostSpeedEn' of register 'SDIO1_Control00Reg'. */
  2752. U8 GH_SDIO1_get_Control00Reg_HostSpeedEn(void);
  2753. /*! \brief Writes the bit group 'CardDetectTestLevel' of register 'SDIO1_Control00Reg'. */
  2754. void GH_SDIO1_set_Control00Reg_CardDetectTestLevel(U8 data);
  2755. /*! \brief Reads the bit group 'CardDetectTestLevel' of register 'SDIO1_Control00Reg'. */
  2756. U8 GH_SDIO1_get_Control00Reg_CardDetectTestLevel(void);
  2757. /*! \brief Writes the bit group 'CardDetectSigDet' of register 'SDIO1_Control00Reg'. */
  2758. void GH_SDIO1_set_Control00Reg_CardDetectSigDet(U8 data);
  2759. /*! \brief Reads the bit group 'CardDetectSigDet' of register 'SDIO1_Control00Reg'. */
  2760. U8 GH_SDIO1_get_Control00Reg_CardDetectSigDet(void);
  2761. /*! \brief Writes the bit group 'SdBusPower' of register 'SDIO1_Control00Reg'. */
  2762. void GH_SDIO1_set_Control00Reg_SdBusPower(U8 data);
  2763. /*! \brief Reads the bit group 'SdBusPower' of register 'SDIO1_Control00Reg'. */
  2764. U8 GH_SDIO1_get_Control00Reg_SdBusPower(void);
  2765. /*! \brief Writes the bit group 'SdBusVoltageSelect' of register 'SDIO1_Control00Reg'. */
  2766. void GH_SDIO1_set_Control00Reg_SdBusVoltageSelect(U8 data);
  2767. /*! \brief Reads the bit group 'SdBusVoltageSelect' of register 'SDIO1_Control00Reg'. */
  2768. U8 GH_SDIO1_get_Control00Reg_SdBusVoltageSelect(void);
  2769. /*! \brief Writes the bit group 'StopAtBlkGapReq' of register 'SDIO1_Control00Reg'. */
  2770. void GH_SDIO1_set_Control00Reg_StopAtBlkGapReq(U8 data);
  2771. /*! \brief Reads the bit group 'StopAtBlkGapReq' of register 'SDIO1_Control00Reg'. */
  2772. U8 GH_SDIO1_get_Control00Reg_StopAtBlkGapReq(void);
  2773. /*! \brief Writes the bit group 'RWaitControl' of register 'SDIO1_Control00Reg'. */
  2774. void GH_SDIO1_set_Control00Reg_RWaitControl(U8 data);
  2775. /*! \brief Reads the bit group 'RWaitControl' of register 'SDIO1_Control00Reg'. */
  2776. U8 GH_SDIO1_get_Control00Reg_RWaitControl(void);
  2777. /*! \brief Writes the bit group 'ContinueReq' of register 'SDIO1_Control00Reg'. */
  2778. void GH_SDIO1_set_Control00Reg_ContinueReq(U8 data);
  2779. /*! \brief Reads the bit group 'ContinueReq' of register 'SDIO1_Control00Reg'. */
  2780. U8 GH_SDIO1_get_Control00Reg_ContinueReq(void);
  2781. /*! \brief Writes the bit group 'IntAtBlkGap' of register 'SDIO1_Control00Reg'. */
  2782. void GH_SDIO1_set_Control00Reg_IntAtBlkGap(U8 data);
  2783. /*! \brief Reads the bit group 'IntAtBlkGap' of register 'SDIO1_Control00Reg'. */
  2784. U8 GH_SDIO1_get_Control00Reg_IntAtBlkGap(void);
  2785. /*! \brief Writes the bit group 'DriveCcsd' of register 'SDIO1_Control00Reg'. */
  2786. void GH_SDIO1_set_Control00Reg_DriveCcsd(U8 data);
  2787. /*! \brief Reads the bit group 'DriveCcsd' of register 'SDIO1_Control00Reg'. */
  2788. U8 GH_SDIO1_get_Control00Reg_DriveCcsd(void);
  2789. /*! \brief Writes the bit group 'SpiMode' of register 'SDIO1_Control00Reg'. */
  2790. void GH_SDIO1_set_Control00Reg_SpiMode(U8 data);
  2791. /*! \brief Reads the bit group 'SpiMode' of register 'SDIO1_Control00Reg'. */
  2792. U8 GH_SDIO1_get_Control00Reg_SpiMode(void);
  2793. /*! \brief Writes the bit group 'BootEn' of register 'SDIO1_Control00Reg'. */
  2794. void GH_SDIO1_set_Control00Reg_BootEn(U8 data);
  2795. /*! \brief Reads the bit group 'BootEn' of register 'SDIO1_Control00Reg'. */
  2796. U8 GH_SDIO1_get_Control00Reg_BootEn(void);
  2797. /*! \brief Writes the bit group 'AltBootEn' of register 'SDIO1_Control00Reg'. */
  2798. void GH_SDIO1_set_Control00Reg_AltBootEn(U8 data);
  2799. /*! \brief Reads the bit group 'AltBootEn' of register 'SDIO1_Control00Reg'. */
  2800. U8 GH_SDIO1_get_Control00Reg_AltBootEn(void);
  2801. /*! \brief Writes the bit group 'WakeupEvetEnOnCardIns' of register 'SDIO1_Control00Reg'. */
  2802. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns(U8 data);
  2803. /*! \brief Reads the bit group 'WakeupEvetEnOnCardIns' of register 'SDIO1_Control00Reg'. */
  2804. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns(void);
  2805. /*! \brief Writes the bit group 'WakeupEvetEnOnCardInt' of register 'SDIO1_Control00Reg'. */
  2806. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt(U8 data);
  2807. /*! \brief Reads the bit group 'WakeupEvetEnOnCardInt' of register 'SDIO1_Control00Reg'. */
  2808. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt(void);
  2809. /*! \brief Writes the bit group 'WakeupEvetEnOnCardRem' of register 'SDIO1_Control00Reg'. */
  2810. void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem(U8 data);
  2811. /*! \brief Reads the bit group 'WakeupEvetEnOnCardRem' of register 'SDIO1_Control00Reg'. */
  2812. U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem(void);
  2813. #else /* GH_INLINE_LEVEL == 0 */
  2814. GH_INLINE void GH_SDIO1_set_Control00Reg(U32 data)
  2815. {
  2816. *(volatile U32 *)REG_SDIO1_CONTROL00REG = data;
  2817. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2818. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg] <-- 0x%08x\n",
  2819. REG_SDIO1_CONTROL00REG,data,data);
  2820. #endif
  2821. }
  2822. GH_INLINE U32 GH_SDIO1_get_Control00Reg(void)
  2823. {
  2824. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2825. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2826. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg] --> 0x%08x\n",
  2827. REG_SDIO1_CONTROL00REG,value);
  2828. #endif
  2829. return value;
  2830. }
  2831. GH_INLINE void GH_SDIO1_set_Control00Reg_LedControl(U8 data)
  2832. {
  2833. GH_SDIO1_CONTROL00REG_S d;
  2834. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2835. d.bitc.ledcontrol = data;
  2836. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2837. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2838. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_LedControl] <-- 0x%08x\n",
  2839. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2840. #endif
  2841. }
  2842. GH_INLINE U8 GH_SDIO1_get_Control00Reg_LedControl(void)
  2843. {
  2844. GH_SDIO1_CONTROL00REG_S tmp_value;
  2845. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2846. tmp_value.all = value;
  2847. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2848. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_LedControl] --> 0x%08x\n",
  2849. REG_SDIO1_CONTROL00REG,value);
  2850. #endif
  2851. return tmp_value.bitc.ledcontrol;
  2852. }
  2853. GH_INLINE void GH_SDIO1_set_Control00Reg_DataTraWidth(U8 data)
  2854. {
  2855. GH_SDIO1_CONTROL00REG_S d;
  2856. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2857. d.bitc.datatrawidth = data;
  2858. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2859. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2860. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_DataTraWidth] <-- 0x%08x\n",
  2861. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2862. #endif
  2863. }
  2864. GH_INLINE U8 GH_SDIO1_get_Control00Reg_DataTraWidth(void)
  2865. {
  2866. GH_SDIO1_CONTROL00REG_S tmp_value;
  2867. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2868. tmp_value.all = value;
  2869. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2870. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_DataTraWidth] --> 0x%08x\n",
  2871. REG_SDIO1_CONTROL00REG,value);
  2872. #endif
  2873. return tmp_value.bitc.datatrawidth;
  2874. }
  2875. GH_INLINE void GH_SDIO1_set_Control00Reg_Sd8BitMode(U8 data)
  2876. {
  2877. GH_SDIO1_CONTROL00REG_S d;
  2878. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2879. d.bitc.sd8bitmode = data;
  2880. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2881. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2882. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_Sd8BitMode] <-- 0x%08x\n",
  2883. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2884. #endif
  2885. }
  2886. GH_INLINE U8 GH_SDIO1_get_Control00Reg_Sd8BitMode(void)
  2887. {
  2888. GH_SDIO1_CONTROL00REG_S tmp_value;
  2889. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2890. tmp_value.all = value;
  2891. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2892. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_Sd8BitMode] --> 0x%08x\n",
  2893. REG_SDIO1_CONTROL00REG,value);
  2894. #endif
  2895. return tmp_value.bitc.sd8bitmode;
  2896. }
  2897. GH_INLINE void GH_SDIO1_set_Control00Reg_HostSpeedEn(U8 data)
  2898. {
  2899. GH_SDIO1_CONTROL00REG_S d;
  2900. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2901. d.bitc.hostspeeden = data;
  2902. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2903. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2904. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_HostSpeedEn] <-- 0x%08x\n",
  2905. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2906. #endif
  2907. }
  2908. GH_INLINE U8 GH_SDIO1_get_Control00Reg_HostSpeedEn(void)
  2909. {
  2910. GH_SDIO1_CONTROL00REG_S tmp_value;
  2911. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2912. tmp_value.all = value;
  2913. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2914. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_HostSpeedEn] --> 0x%08x\n",
  2915. REG_SDIO1_CONTROL00REG,value);
  2916. #endif
  2917. return tmp_value.bitc.hostspeeden;
  2918. }
  2919. GH_INLINE void GH_SDIO1_set_Control00Reg_CardDetectTestLevel(U8 data)
  2920. {
  2921. GH_SDIO1_CONTROL00REG_S d;
  2922. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2923. d.bitc.carddetecttestlevel = data;
  2924. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2925. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2926. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_CardDetectTestLevel] <-- 0x%08x\n",
  2927. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2928. #endif
  2929. }
  2930. GH_INLINE U8 GH_SDIO1_get_Control00Reg_CardDetectTestLevel(void)
  2931. {
  2932. GH_SDIO1_CONTROL00REG_S tmp_value;
  2933. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2934. tmp_value.all = value;
  2935. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2936. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_CardDetectTestLevel] --> 0x%08x\n",
  2937. REG_SDIO1_CONTROL00REG,value);
  2938. #endif
  2939. return tmp_value.bitc.carddetecttestlevel;
  2940. }
  2941. GH_INLINE void GH_SDIO1_set_Control00Reg_CardDetectSigDet(U8 data)
  2942. {
  2943. GH_SDIO1_CONTROL00REG_S d;
  2944. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2945. d.bitc.carddetectsigdet = data;
  2946. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2947. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2948. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_CardDetectSigDet] <-- 0x%08x\n",
  2949. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2950. #endif
  2951. }
  2952. GH_INLINE U8 GH_SDIO1_get_Control00Reg_CardDetectSigDet(void)
  2953. {
  2954. GH_SDIO1_CONTROL00REG_S tmp_value;
  2955. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2956. tmp_value.all = value;
  2957. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2958. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_CardDetectSigDet] --> 0x%08x\n",
  2959. REG_SDIO1_CONTROL00REG,value);
  2960. #endif
  2961. return tmp_value.bitc.carddetectsigdet;
  2962. }
  2963. GH_INLINE void GH_SDIO1_set_Control00Reg_SdBusPower(U8 data)
  2964. {
  2965. GH_SDIO1_CONTROL00REG_S d;
  2966. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2967. d.bitc.sdbuspower = data;
  2968. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2969. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2970. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SdBusPower] <-- 0x%08x\n",
  2971. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2972. #endif
  2973. }
  2974. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SdBusPower(void)
  2975. {
  2976. GH_SDIO1_CONTROL00REG_S tmp_value;
  2977. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  2978. tmp_value.all = value;
  2979. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2980. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SdBusPower] --> 0x%08x\n",
  2981. REG_SDIO1_CONTROL00REG,value);
  2982. #endif
  2983. return tmp_value.bitc.sdbuspower;
  2984. }
  2985. GH_INLINE void GH_SDIO1_set_Control00Reg_SdBusVoltageSelect(U8 data)
  2986. {
  2987. GH_SDIO1_CONTROL00REG_S d;
  2988. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  2989. d.bitc.sdbusvoltageselect = data;
  2990. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  2991. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  2992. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SdBusVoltageSelect] <-- 0x%08x\n",
  2993. REG_SDIO1_CONTROL00REG,d.all,d.all);
  2994. #endif
  2995. }
  2996. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SdBusVoltageSelect(void)
  2997. {
  2998. GH_SDIO1_CONTROL00REG_S tmp_value;
  2999. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3000. tmp_value.all = value;
  3001. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3002. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SdBusVoltageSelect] --> 0x%08x\n",
  3003. REG_SDIO1_CONTROL00REG,value);
  3004. #endif
  3005. return tmp_value.bitc.sdbusvoltageselect;
  3006. }
  3007. GH_INLINE void GH_SDIO1_set_Control00Reg_StopAtBlkGapReq(U8 data)
  3008. {
  3009. GH_SDIO1_CONTROL00REG_S d;
  3010. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3011. d.bitc.stopatblkgapreq = data;
  3012. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3013. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3014. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_StopAtBlkGapReq] <-- 0x%08x\n",
  3015. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3016. #endif
  3017. }
  3018. GH_INLINE U8 GH_SDIO1_get_Control00Reg_StopAtBlkGapReq(void)
  3019. {
  3020. GH_SDIO1_CONTROL00REG_S tmp_value;
  3021. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3022. tmp_value.all = value;
  3023. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3024. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_StopAtBlkGapReq] --> 0x%08x\n",
  3025. REG_SDIO1_CONTROL00REG,value);
  3026. #endif
  3027. return tmp_value.bitc.stopatblkgapreq;
  3028. }
  3029. GH_INLINE void GH_SDIO1_set_Control00Reg_RWaitControl(U8 data)
  3030. {
  3031. GH_SDIO1_CONTROL00REG_S d;
  3032. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3033. d.bitc.rwaitcontrol = data;
  3034. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3035. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3036. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_RWaitControl] <-- 0x%08x\n",
  3037. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3038. #endif
  3039. }
  3040. GH_INLINE U8 GH_SDIO1_get_Control00Reg_RWaitControl(void)
  3041. {
  3042. GH_SDIO1_CONTROL00REG_S tmp_value;
  3043. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3044. tmp_value.all = value;
  3045. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3046. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_RWaitControl] --> 0x%08x\n",
  3047. REG_SDIO1_CONTROL00REG,value);
  3048. #endif
  3049. return tmp_value.bitc.rwaitcontrol;
  3050. }
  3051. GH_INLINE void GH_SDIO1_set_Control00Reg_ContinueReq(U8 data)
  3052. {
  3053. GH_SDIO1_CONTROL00REG_S d;
  3054. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3055. d.bitc.continuereq = data;
  3056. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3057. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3058. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_ContinueReq] <-- 0x%08x\n",
  3059. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3060. #endif
  3061. }
  3062. GH_INLINE U8 GH_SDIO1_get_Control00Reg_ContinueReq(void)
  3063. {
  3064. GH_SDIO1_CONTROL00REG_S tmp_value;
  3065. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3066. tmp_value.all = value;
  3067. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3068. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_ContinueReq] --> 0x%08x\n",
  3069. REG_SDIO1_CONTROL00REG,value);
  3070. #endif
  3071. return tmp_value.bitc.continuereq;
  3072. }
  3073. GH_INLINE void GH_SDIO1_set_Control00Reg_IntAtBlkGap(U8 data)
  3074. {
  3075. GH_SDIO1_CONTROL00REG_S d;
  3076. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3077. d.bitc.intatblkgap = data;
  3078. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3079. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3080. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_IntAtBlkGap] <-- 0x%08x\n",
  3081. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3082. #endif
  3083. }
  3084. GH_INLINE U8 GH_SDIO1_get_Control00Reg_IntAtBlkGap(void)
  3085. {
  3086. GH_SDIO1_CONTROL00REG_S tmp_value;
  3087. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3088. tmp_value.all = value;
  3089. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3090. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_IntAtBlkGap] --> 0x%08x\n",
  3091. REG_SDIO1_CONTROL00REG,value);
  3092. #endif
  3093. return tmp_value.bitc.intatblkgap;
  3094. }
  3095. GH_INLINE void GH_SDIO1_set_Control00Reg_DriveCcsd(U8 data)
  3096. {
  3097. GH_SDIO1_CONTROL00REG_S d;
  3098. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3099. d.bitc.driveccsd = data;
  3100. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3101. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3102. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_DriveCcsd] <-- 0x%08x\n",
  3103. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3104. #endif
  3105. }
  3106. GH_INLINE U8 GH_SDIO1_get_Control00Reg_DriveCcsd(void)
  3107. {
  3108. GH_SDIO1_CONTROL00REG_S tmp_value;
  3109. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3110. tmp_value.all = value;
  3111. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3112. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_DriveCcsd] --> 0x%08x\n",
  3113. REG_SDIO1_CONTROL00REG,value);
  3114. #endif
  3115. return tmp_value.bitc.driveccsd;
  3116. }
  3117. GH_INLINE void GH_SDIO1_set_Control00Reg_SpiMode(U8 data)
  3118. {
  3119. GH_SDIO1_CONTROL00REG_S d;
  3120. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3121. d.bitc.spimode = data;
  3122. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3123. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3124. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_SpiMode] <-- 0x%08x\n",
  3125. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3126. #endif
  3127. }
  3128. GH_INLINE U8 GH_SDIO1_get_Control00Reg_SpiMode(void)
  3129. {
  3130. GH_SDIO1_CONTROL00REG_S tmp_value;
  3131. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3132. tmp_value.all = value;
  3133. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3134. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_SpiMode] --> 0x%08x\n",
  3135. REG_SDIO1_CONTROL00REG,value);
  3136. #endif
  3137. return tmp_value.bitc.spimode;
  3138. }
  3139. GH_INLINE void GH_SDIO1_set_Control00Reg_BootEn(U8 data)
  3140. {
  3141. GH_SDIO1_CONTROL00REG_S d;
  3142. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3143. d.bitc.booten = data;
  3144. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3145. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3146. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_BootEn] <-- 0x%08x\n",
  3147. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3148. #endif
  3149. }
  3150. GH_INLINE U8 GH_SDIO1_get_Control00Reg_BootEn(void)
  3151. {
  3152. GH_SDIO1_CONTROL00REG_S tmp_value;
  3153. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3154. tmp_value.all = value;
  3155. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3156. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_BootEn] --> 0x%08x\n",
  3157. REG_SDIO1_CONTROL00REG,value);
  3158. #endif
  3159. return tmp_value.bitc.booten;
  3160. }
  3161. GH_INLINE void GH_SDIO1_set_Control00Reg_AltBootEn(U8 data)
  3162. {
  3163. GH_SDIO1_CONTROL00REG_S d;
  3164. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3165. d.bitc.altbooten = data;
  3166. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3167. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3168. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_AltBootEn] <-- 0x%08x\n",
  3169. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3170. #endif
  3171. }
  3172. GH_INLINE U8 GH_SDIO1_get_Control00Reg_AltBootEn(void)
  3173. {
  3174. GH_SDIO1_CONTROL00REG_S tmp_value;
  3175. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3176. tmp_value.all = value;
  3177. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3178. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_AltBootEn] --> 0x%08x\n",
  3179. REG_SDIO1_CONTROL00REG,value);
  3180. #endif
  3181. return tmp_value.bitc.altbooten;
  3182. }
  3183. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns(U8 data)
  3184. {
  3185. GH_SDIO1_CONTROL00REG_S d;
  3186. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3187. d.bitc.wakeupevetenoncardins = data;
  3188. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3189. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3190. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardIns] <-- 0x%08x\n",
  3191. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3192. #endif
  3193. }
  3194. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns(void)
  3195. {
  3196. GH_SDIO1_CONTROL00REG_S tmp_value;
  3197. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3198. tmp_value.all = value;
  3199. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3200. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardIns] --> 0x%08x\n",
  3201. REG_SDIO1_CONTROL00REG,value);
  3202. #endif
  3203. return tmp_value.bitc.wakeupevetenoncardins;
  3204. }
  3205. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt(U8 data)
  3206. {
  3207. GH_SDIO1_CONTROL00REG_S d;
  3208. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3209. d.bitc.wakeupevetenoncardint = data;
  3210. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3211. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3212. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardInt] <-- 0x%08x\n",
  3213. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3214. #endif
  3215. }
  3216. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt(void)
  3217. {
  3218. GH_SDIO1_CONTROL00REG_S tmp_value;
  3219. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3220. tmp_value.all = value;
  3221. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3222. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardInt] --> 0x%08x\n",
  3223. REG_SDIO1_CONTROL00REG,value);
  3224. #endif
  3225. return tmp_value.bitc.wakeupevetenoncardint;
  3226. }
  3227. GH_INLINE void GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem(U8 data)
  3228. {
  3229. GH_SDIO1_CONTROL00REG_S d;
  3230. d.all = *(volatile U32 *)REG_SDIO1_CONTROL00REG;
  3231. d.bitc.wakeupevetenoncardrem = data;
  3232. *(volatile U32 *)REG_SDIO1_CONTROL00REG = d.all;
  3233. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3234. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_Control00Reg_WakeupEvetEnOnCardRem] <-- 0x%08x\n",
  3235. REG_SDIO1_CONTROL00REG,d.all,d.all);
  3236. #endif
  3237. }
  3238. GH_INLINE U8 GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem(void)
  3239. {
  3240. GH_SDIO1_CONTROL00REG_S tmp_value;
  3241. U32 value = (*(volatile U32 *)REG_SDIO1_CONTROL00REG);
  3242. tmp_value.all = value;
  3243. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3244. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_Control00Reg_WakeupEvetEnOnCardRem] --> 0x%08x\n",
  3245. REG_SDIO1_CONTROL00REG,value);
  3246. #endif
  3247. return tmp_value.bitc.wakeupevetenoncardrem;
  3248. }
  3249. #endif /* GH_INLINE_LEVEL == 0 */
  3250. /*----------------------------------------------------------------------------*/
  3251. /* register SDIO1_PresentStateReg (read) */
  3252. /*----------------------------------------------------------------------------*/
  3253. #if GH_INLINE_LEVEL == 0
  3254. /*! \brief Reads the register 'SDIO1_PresentStateReg'. */
  3255. U32 GH_SDIO1_get_PresentStateReg(void);
  3256. /*! \brief Reads the bit group 'CmdInhibitCmd' of register 'SDIO1_PresentStateReg'. */
  3257. U8 GH_SDIO1_get_PresentStateReg_CmdInhibitCmd(void);
  3258. /*! \brief Reads the bit group 'DataLineActive' of register 'SDIO1_PresentStateReg'. */
  3259. U8 GH_SDIO1_get_PresentStateReg_DataLineActive(void);
  3260. /*! \brief Reads the bit group 'CmdInhibitData' of register 'SDIO1_PresentStateReg'. */
  3261. U8 GH_SDIO1_get_PresentStateReg_CmdInhibitData(void);
  3262. /*! \brief Reads the bit group 'RTraActive' of register 'SDIO1_PresentStateReg'. */
  3263. U8 GH_SDIO1_get_PresentStateReg_RTraActive(void);
  3264. /*! \brief Reads the bit group 'BufWEn' of register 'SDIO1_PresentStateReg'. */
  3265. U8 GH_SDIO1_get_PresentStateReg_BufWEn(void);
  3266. /*! \brief Reads the bit group 'WTraActive' of register 'SDIO1_PresentStateReg'. */
  3267. U8 GH_SDIO1_get_PresentStateReg_WTraActive(void);
  3268. /*! \brief Reads the bit group 'BufREn' of register 'SDIO1_PresentStateReg'. */
  3269. U8 GH_SDIO1_get_PresentStateReg_BufREn(void);
  3270. /*! \brief Reads the bit group 'CardInserted' of register 'SDIO1_PresentStateReg'. */
  3271. U8 GH_SDIO1_get_PresentStateReg_CardInserted(void);
  3272. /*! \brief Reads the bit group 'CardDetectPinLevel' of register 'SDIO1_PresentStateReg'. */
  3273. U8 GH_SDIO1_get_PresentStateReg_CardDetectPinLevel(void);
  3274. /*! \brief Reads the bit group 'CardStateStable' of register 'SDIO1_PresentStateReg'. */
  3275. U8 GH_SDIO1_get_PresentStateReg_CardStateStable(void);
  3276. /*! \brief Reads the bit group 'WProSwiPinLevel' of register 'SDIO1_PresentStateReg'. */
  3277. U8 GH_SDIO1_get_PresentStateReg_WProSwiPinLevel(void);
  3278. /*! \brief Reads the bit group 'Data03LineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3279. U8 GH_SDIO1_get_PresentStateReg_Data03LineSigLevel(void);
  3280. /*! \brief Reads the bit group 'CmdLineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3281. U8 GH_SDIO1_get_PresentStateReg_CmdLineSigLevel(void);
  3282. /*! \brief Reads the bit group 'Data47LineSigLevel' of register 'SDIO1_PresentStateReg'. */
  3283. U8 GH_SDIO1_get_PresentStateReg_Data47LineSigLevel(void);
  3284. #else /* GH_INLINE_LEVEL == 0 */
  3285. GH_INLINE U32 GH_SDIO1_get_PresentStateReg(void)
  3286. {
  3287. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3288. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3289. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg] --> 0x%08x\n",
  3290. REG_SDIO1_PRESENTSTATEREG,value);
  3291. #endif
  3292. return value;
  3293. }
  3294. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdInhibitCmd(void)
  3295. {
  3296. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3297. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3298. tmp_value.all = value;
  3299. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3300. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdInhibitCmd] --> 0x%08x\n",
  3301. REG_SDIO1_PRESENTSTATEREG,value);
  3302. #endif
  3303. return tmp_value.bitc.cmdinhibitcmd;
  3304. }
  3305. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_DataLineActive(void)
  3306. {
  3307. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3308. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3309. tmp_value.all = value;
  3310. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3311. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_DataLineActive] --> 0x%08x\n",
  3312. REG_SDIO1_PRESENTSTATEREG,value);
  3313. #endif
  3314. return tmp_value.bitc.datalineactive;
  3315. }
  3316. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdInhibitData(void)
  3317. {
  3318. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3319. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3320. tmp_value.all = value;
  3321. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3322. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdInhibitData] --> 0x%08x\n",
  3323. REG_SDIO1_PRESENTSTATEREG,value);
  3324. #endif
  3325. return tmp_value.bitc.cmdinhibitdata;
  3326. }
  3327. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_RTraActive(void)
  3328. {
  3329. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3330. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3331. tmp_value.all = value;
  3332. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3333. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_RTraActive] --> 0x%08x\n",
  3334. REG_SDIO1_PRESENTSTATEREG,value);
  3335. #endif
  3336. return tmp_value.bitc.rtraactive;
  3337. }
  3338. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_BufWEn(void)
  3339. {
  3340. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3341. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3342. tmp_value.all = value;
  3343. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3344. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_BufWEn] --> 0x%08x\n",
  3345. REG_SDIO1_PRESENTSTATEREG,value);
  3346. #endif
  3347. return tmp_value.bitc.bufwen;
  3348. }
  3349. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_WTraActive(void)
  3350. {
  3351. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3352. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3353. tmp_value.all = value;
  3354. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3355. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_WTraActive] --> 0x%08x\n",
  3356. REG_SDIO1_PRESENTSTATEREG,value);
  3357. #endif
  3358. return tmp_value.bitc.wtraactive;
  3359. }
  3360. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_BufREn(void)
  3361. {
  3362. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3363. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3364. tmp_value.all = value;
  3365. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3366. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_BufREn] --> 0x%08x\n",
  3367. REG_SDIO1_PRESENTSTATEREG,value);
  3368. #endif
  3369. return tmp_value.bitc.bufren;
  3370. }
  3371. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardInserted(void)
  3372. {
  3373. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3374. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3375. tmp_value.all = value;
  3376. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3377. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardInserted] --> 0x%08x\n",
  3378. REG_SDIO1_PRESENTSTATEREG,value);
  3379. #endif
  3380. return tmp_value.bitc.cardinserted;
  3381. }
  3382. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardDetectPinLevel(void)
  3383. {
  3384. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3385. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3386. tmp_value.all = value;
  3387. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3388. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardDetectPinLevel] --> 0x%08x\n",
  3389. REG_SDIO1_PRESENTSTATEREG,value);
  3390. #endif
  3391. return tmp_value.bitc.carddetectpinlevel;
  3392. }
  3393. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CardStateStable(void)
  3394. {
  3395. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3396. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3397. tmp_value.all = value;
  3398. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3399. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CardStateStable] --> 0x%08x\n",
  3400. REG_SDIO1_PRESENTSTATEREG,value);
  3401. #endif
  3402. return tmp_value.bitc.cardstatestable;
  3403. }
  3404. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_WProSwiPinLevel(void)
  3405. {
  3406. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3407. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3408. tmp_value.all = value;
  3409. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3410. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_WProSwiPinLevel] --> 0x%08x\n",
  3411. REG_SDIO1_PRESENTSTATEREG,value);
  3412. #endif
  3413. return tmp_value.bitc.wproswipinlevel;
  3414. }
  3415. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_Data03LineSigLevel(void)
  3416. {
  3417. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3418. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3419. tmp_value.all = value;
  3420. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3421. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_Data03LineSigLevel] --> 0x%08x\n",
  3422. REG_SDIO1_PRESENTSTATEREG,value);
  3423. #endif
  3424. return tmp_value.bitc.data03linesiglevel;
  3425. }
  3426. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_CmdLineSigLevel(void)
  3427. {
  3428. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3429. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3430. tmp_value.all = value;
  3431. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3432. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_CmdLineSigLevel] --> 0x%08x\n",
  3433. REG_SDIO1_PRESENTSTATEREG,value);
  3434. #endif
  3435. return tmp_value.bitc.cmdlinesiglevel;
  3436. }
  3437. GH_INLINE U8 GH_SDIO1_get_PresentStateReg_Data47LineSigLevel(void)
  3438. {
  3439. GH_SDIO1_PRESENTSTATEREG_S tmp_value;
  3440. U32 value = (*(volatile U32 *)REG_SDIO1_PRESENTSTATEREG);
  3441. tmp_value.all = value;
  3442. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3443. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_PresentStateReg_Data47LineSigLevel] --> 0x%08x\n",
  3444. REG_SDIO1_PRESENTSTATEREG,value);
  3445. #endif
  3446. return tmp_value.bitc.data47linesiglevel;
  3447. }
  3448. #endif /* GH_INLINE_LEVEL == 0 */
  3449. /*----------------------------------------------------------------------------*/
  3450. /* register SDIO1_ArgReg (read/write) */
  3451. /*----------------------------------------------------------------------------*/
  3452. #if GH_INLINE_LEVEL == 0
  3453. /*! \brief Writes the register 'SDIO1_ArgReg'. */
  3454. void GH_SDIO1_set_ArgReg(U32 data);
  3455. /*! \brief Reads the register 'SDIO1_ArgReg'. */
  3456. U32 GH_SDIO1_get_ArgReg(void);
  3457. #else /* GH_INLINE_LEVEL == 0 */
  3458. GH_INLINE void GH_SDIO1_set_ArgReg(U32 data)
  3459. {
  3460. *(volatile U32 *)REG_SDIO1_ARGREG = data;
  3461. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3462. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_ArgReg] <-- 0x%08x\n",
  3463. REG_SDIO1_ARGREG,data,data);
  3464. #endif
  3465. }
  3466. GH_INLINE U32 GH_SDIO1_get_ArgReg(void)
  3467. {
  3468. U32 value = (*(volatile U32 *)REG_SDIO1_ARGREG);
  3469. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3470. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_ArgReg] --> 0x%08x\n",
  3471. REG_SDIO1_ARGREG,value);
  3472. #endif
  3473. return value;
  3474. }
  3475. #endif /* GH_INLINE_LEVEL == 0 */
  3476. /*----------------------------------------------------------------------------*/
  3477. /* register SDIO1_CapReg (read) */
  3478. /*----------------------------------------------------------------------------*/
  3479. #if GH_INLINE_LEVEL == 0
  3480. /*! \brief Reads the register 'SDIO1_CapReg'. */
  3481. U32 GH_SDIO1_get_CapReg(void);
  3482. /*! \brief Reads the bit group 'TimeoutClkFre' of register 'SDIO1_CapReg'. */
  3483. U8 GH_SDIO1_get_CapReg_TimeoutClkFre(void);
  3484. /*! \brief Reads the bit group 'TimeoutClkUnit' of register 'SDIO1_CapReg'. */
  3485. U8 GH_SDIO1_get_CapReg_TimeoutClkUnit(void);
  3486. /*! \brief Reads the bit group 'BaseClkFreForSdClk' of register 'SDIO1_CapReg'. */
  3487. U8 GH_SDIO1_get_CapReg_BaseClkFreForSdClk(void);
  3488. /*! \brief Reads the bit group 'MaxBlkLen' of register 'SDIO1_CapReg'. */
  3489. U8 GH_SDIO1_get_CapReg_MaxBlkLen(void);
  3490. /*! \brief Reads the bit group 'ExtendedMediaBusSup' of register 'SDIO1_CapReg'. */
  3491. U8 GH_SDIO1_get_CapReg_ExtendedMediaBusSup(void);
  3492. /*! \brief Reads the bit group 'HighSpeedSup' of register 'SDIO1_CapReg'. */
  3493. U8 GH_SDIO1_get_CapReg_HighSpeedSup(void);
  3494. /*! \brief Reads the bit group 'SusResSup' of register 'SDIO1_CapReg'. */
  3495. U8 GH_SDIO1_get_CapReg_SusResSup(void);
  3496. /*! \brief Reads the bit group 'SdmaSup' of register 'SDIO1_CapReg'. */
  3497. U8 GH_SDIO1_get_CapReg_SdmaSup(void);
  3498. /*! \brief Reads the bit group 'VoltageSup33v' of register 'SDIO1_CapReg'. */
  3499. U8 GH_SDIO1_get_CapReg_VoltageSup33v(void);
  3500. /*! \brief Reads the bit group 'VoltageSup30v' of register 'SDIO1_CapReg'. */
  3501. U8 GH_SDIO1_get_CapReg_VoltageSup30v(void);
  3502. /*! \brief Reads the bit group 'VoltageSup18v' of register 'SDIO1_CapReg'. */
  3503. U8 GH_SDIO1_get_CapReg_VoltageSup18v(void);
  3504. /*! \brief Reads the bit group 'IntMode' of register 'SDIO1_CapReg'. */
  3505. U8 GH_SDIO1_get_CapReg_IntMode(void);
  3506. #else /* GH_INLINE_LEVEL == 0 */
  3507. GH_INLINE U32 GH_SDIO1_get_CapReg(void)
  3508. {
  3509. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3510. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3511. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg] --> 0x%08x\n",
  3512. REG_SDIO1_CAPREG,value);
  3513. #endif
  3514. return value;
  3515. }
  3516. GH_INLINE U8 GH_SDIO1_get_CapReg_TimeoutClkFre(void)
  3517. {
  3518. GH_SDIO1_CAPREG_S tmp_value;
  3519. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3520. tmp_value.all = value;
  3521. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3522. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_TimeoutClkFre] --> 0x%08x\n",
  3523. REG_SDIO1_CAPREG,value);
  3524. #endif
  3525. return tmp_value.bitc.timeoutclkfre;
  3526. }
  3527. GH_INLINE U8 GH_SDIO1_get_CapReg_TimeoutClkUnit(void)
  3528. {
  3529. GH_SDIO1_CAPREG_S tmp_value;
  3530. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3531. tmp_value.all = value;
  3532. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3533. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_TimeoutClkUnit] --> 0x%08x\n",
  3534. REG_SDIO1_CAPREG,value);
  3535. #endif
  3536. return tmp_value.bitc.timeoutclkunit;
  3537. }
  3538. GH_INLINE U8 GH_SDIO1_get_CapReg_BaseClkFreForSdClk(void)
  3539. {
  3540. GH_SDIO1_CAPREG_S tmp_value;
  3541. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3542. tmp_value.all = value;
  3543. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3544. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_BaseClkFreForSdClk] --> 0x%08x\n",
  3545. REG_SDIO1_CAPREG,value);
  3546. #endif
  3547. return tmp_value.bitc.baseclkfreforsdclk;
  3548. }
  3549. GH_INLINE U8 GH_SDIO1_get_CapReg_MaxBlkLen(void)
  3550. {
  3551. GH_SDIO1_CAPREG_S tmp_value;
  3552. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3553. tmp_value.all = value;
  3554. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3555. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_MaxBlkLen] --> 0x%08x\n",
  3556. REG_SDIO1_CAPREG,value);
  3557. #endif
  3558. return tmp_value.bitc.maxblklen;
  3559. }
  3560. GH_INLINE U8 GH_SDIO1_get_CapReg_ExtendedMediaBusSup(void)
  3561. {
  3562. GH_SDIO1_CAPREG_S tmp_value;
  3563. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3564. tmp_value.all = value;
  3565. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3566. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_ExtendedMediaBusSup] --> 0x%08x\n",
  3567. REG_SDIO1_CAPREG,value);
  3568. #endif
  3569. return tmp_value.bitc.extendedmediabussup;
  3570. }
  3571. GH_INLINE U8 GH_SDIO1_get_CapReg_HighSpeedSup(void)
  3572. {
  3573. GH_SDIO1_CAPREG_S tmp_value;
  3574. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3575. tmp_value.all = value;
  3576. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3577. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_HighSpeedSup] --> 0x%08x\n",
  3578. REG_SDIO1_CAPREG,value);
  3579. #endif
  3580. return tmp_value.bitc.highspeedsup;
  3581. }
  3582. GH_INLINE U8 GH_SDIO1_get_CapReg_SusResSup(void)
  3583. {
  3584. GH_SDIO1_CAPREG_S tmp_value;
  3585. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3586. tmp_value.all = value;
  3587. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3588. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_SusResSup] --> 0x%08x\n",
  3589. REG_SDIO1_CAPREG,value);
  3590. #endif
  3591. return tmp_value.bitc.susressup;
  3592. }
  3593. GH_INLINE U8 GH_SDIO1_get_CapReg_SdmaSup(void)
  3594. {
  3595. GH_SDIO1_CAPREG_S tmp_value;
  3596. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3597. tmp_value.all = value;
  3598. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3599. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_SdmaSup] --> 0x%08x\n",
  3600. REG_SDIO1_CAPREG,value);
  3601. #endif
  3602. return tmp_value.bitc.sdmasup;
  3603. }
  3604. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup33v(void)
  3605. {
  3606. GH_SDIO1_CAPREG_S tmp_value;
  3607. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3608. tmp_value.all = value;
  3609. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3610. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup33v] --> 0x%08x\n",
  3611. REG_SDIO1_CAPREG,value);
  3612. #endif
  3613. return tmp_value.bitc.voltagesup33v;
  3614. }
  3615. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup30v(void)
  3616. {
  3617. GH_SDIO1_CAPREG_S tmp_value;
  3618. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3619. tmp_value.all = value;
  3620. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3621. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup30v] --> 0x%08x\n",
  3622. REG_SDIO1_CAPREG,value);
  3623. #endif
  3624. return tmp_value.bitc.voltagesup30v;
  3625. }
  3626. GH_INLINE U8 GH_SDIO1_get_CapReg_VoltageSup18v(void)
  3627. {
  3628. GH_SDIO1_CAPREG_S tmp_value;
  3629. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3630. tmp_value.all = value;
  3631. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3632. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_VoltageSup18v] --> 0x%08x\n",
  3633. REG_SDIO1_CAPREG,value);
  3634. #endif
  3635. return tmp_value.bitc.voltagesup18v;
  3636. }
  3637. GH_INLINE U8 GH_SDIO1_get_CapReg_IntMode(void)
  3638. {
  3639. GH_SDIO1_CAPREG_S tmp_value;
  3640. U32 value = (*(volatile U32 *)REG_SDIO1_CAPREG);
  3641. tmp_value.all = value;
  3642. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3643. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_CapReg_IntMode] --> 0x%08x\n",
  3644. REG_SDIO1_CAPREG,value);
  3645. #endif
  3646. return tmp_value.bitc.intmode;
  3647. }
  3648. #endif /* GH_INLINE_LEVEL == 0 */
  3649. /*----------------------------------------------------------------------------*/
  3650. /* register SDIO1_AutoCmd12ErrStatusReg (read) */
  3651. /*----------------------------------------------------------------------------*/
  3652. #if GH_INLINE_LEVEL == 0
  3653. /*! \brief Reads the register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3654. U32 GH_SDIO1_get_AutoCmd12ErrStatusReg(void);
  3655. /*! \brief Reads the bit group 'AutoCmd12TimeoutErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3656. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr(void);
  3657. /*! \brief Reads the bit group 'AutoCmd12CrcErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3658. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr(void);
  3659. /*! \brief Reads the bit group 'AutoCmd12EndBitErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3660. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr(void);
  3661. /*! \brief Reads the bit group 'AutoCmd12NotExe' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3662. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe(void);
  3663. /*! \brief Reads the bit group 'AutoCmd12IndexErr' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3664. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr(void);
  3665. /*! \brief Reads the bit group 'CmdNotIssuedByAutoCmd12Err' of register 'SDIO1_AutoCmd12ErrStatusReg'. */
  3666. U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err(void);
  3667. #else /* GH_INLINE_LEVEL == 0 */
  3668. GH_INLINE U32 GH_SDIO1_get_AutoCmd12ErrStatusReg(void)
  3669. {
  3670. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3671. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3672. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg] --> 0x%08x\n",
  3673. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3674. #endif
  3675. return value;
  3676. }
  3677. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr(void)
  3678. {
  3679. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3680. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3681. tmp_value.all = value;
  3682. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3683. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12TimeoutErr] --> 0x%08x\n",
  3684. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3685. #endif
  3686. return tmp_value.bitc.autocmd12timeouterr;
  3687. }
  3688. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr(void)
  3689. {
  3690. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3691. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3692. tmp_value.all = value;
  3693. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3694. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12CrcErr] --> 0x%08x\n",
  3695. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3696. #endif
  3697. return tmp_value.bitc.autocmd12crcerr;
  3698. }
  3699. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr(void)
  3700. {
  3701. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3702. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3703. tmp_value.all = value;
  3704. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3705. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12EndBitErr] --> 0x%08x\n",
  3706. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3707. #endif
  3708. return tmp_value.bitc.autocmd12endbiterr;
  3709. }
  3710. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe(void)
  3711. {
  3712. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3713. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3714. tmp_value.all = value;
  3715. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3716. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12NotExe] --> 0x%08x\n",
  3717. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3718. #endif
  3719. return tmp_value.bitc.autocmd12notexe;
  3720. }
  3721. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr(void)
  3722. {
  3723. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3724. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3725. tmp_value.all = value;
  3726. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3727. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_AutoCmd12IndexErr] --> 0x%08x\n",
  3728. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3729. #endif
  3730. return tmp_value.bitc.autocmd12indexerr;
  3731. }
  3732. GH_INLINE U8 GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err(void)
  3733. {
  3734. GH_SDIO1_AUTOCMD12ERRSTATUSREG_S tmp_value;
  3735. U32 value = (*(volatile U32 *)REG_SDIO1_AUTOCMD12ERRSTATUSREG);
  3736. tmp_value.all = value;
  3737. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3738. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_AutoCmd12ErrStatusReg_CmdNotIssuedByAutoCmd12Err] --> 0x%08x\n",
  3739. REG_SDIO1_AUTOCMD12ERRSTATUSREG,value);
  3740. #endif
  3741. return tmp_value.bitc.cmdnotissuedbyautocmd12err;
  3742. }
  3743. #endif /* GH_INLINE_LEVEL == 0 */
  3744. /*----------------------------------------------------------------------------*/
  3745. /* register SDIO1_BufferDataPortReg (read/write) */
  3746. /*----------------------------------------------------------------------------*/
  3747. #if GH_INLINE_LEVEL == 0
  3748. /*! \brief Writes the register 'SDIO1_BufferDataPortReg'. */
  3749. void GH_SDIO1_set_BufferDataPortReg(U32 data);
  3750. /*! \brief Reads the register 'SDIO1_BufferDataPortReg'. */
  3751. U32 GH_SDIO1_get_BufferDataPortReg(void);
  3752. #else /* GH_INLINE_LEVEL == 0 */
  3753. GH_INLINE void GH_SDIO1_set_BufferDataPortReg(U32 data)
  3754. {
  3755. *(volatile U32 *)REG_SDIO1_BUFFERDATAPORTREG = data;
  3756. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3757. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_BufferDataPortReg] <-- 0x%08x\n",
  3758. REG_SDIO1_BUFFERDATAPORTREG,data,data);
  3759. #endif
  3760. }
  3761. GH_INLINE U32 GH_SDIO1_get_BufferDataPortReg(void)
  3762. {
  3763. U32 value = (*(volatile U32 *)REG_SDIO1_BUFFERDATAPORTREG);
  3764. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3765. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_BufferDataPortReg] --> 0x%08x\n",
  3766. REG_SDIO1_BUFFERDATAPORTREG,value);
  3767. #endif
  3768. return value;
  3769. }
  3770. #endif /* GH_INLINE_LEVEL == 0 */
  3771. /*----------------------------------------------------------------------------*/
  3772. /* register SDIO1_MaxCurCapReg (read/write) */
  3773. /*----------------------------------------------------------------------------*/
  3774. #if GH_INLINE_LEVEL == 0
  3775. /*! \brief Writes the register 'SDIO1_MaxCurCapReg'. */
  3776. void GH_SDIO1_set_MaxCurCapReg(U32 data);
  3777. /*! \brief Reads the register 'SDIO1_MaxCurCapReg'. */
  3778. U32 GH_SDIO1_get_MaxCurCapReg(void);
  3779. /*! \brief Writes the bit group 'MaxCurFor33v' of register 'SDIO1_MaxCurCapReg'. */
  3780. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v(U8 data);
  3781. /*! \brief Reads the bit group 'MaxCurFor33v' of register 'SDIO1_MaxCurCapReg'. */
  3782. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v(void);
  3783. /*! \brief Writes the bit group 'MaxCurFor30v' of register 'SDIO1_MaxCurCapReg'. */
  3784. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v(U8 data);
  3785. /*! \brief Reads the bit group 'MaxCurFor30v' of register 'SDIO1_MaxCurCapReg'. */
  3786. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v(void);
  3787. /*! \brief Writes the bit group 'MaxCurFor18v' of register 'SDIO1_MaxCurCapReg'. */
  3788. void GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v(U8 data);
  3789. /*! \brief Reads the bit group 'MaxCurFor18v' of register 'SDIO1_MaxCurCapReg'. */
  3790. U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v(void);
  3791. #else /* GH_INLINE_LEVEL == 0 */
  3792. GH_INLINE void GH_SDIO1_set_MaxCurCapReg(U32 data)
  3793. {
  3794. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = data;
  3795. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3796. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg] <-- 0x%08x\n",
  3797. REG_SDIO1_MAXCURCAPREG,data,data);
  3798. #endif
  3799. }
  3800. GH_INLINE U32 GH_SDIO1_get_MaxCurCapReg(void)
  3801. {
  3802. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  3803. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3804. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg] --> 0x%08x\n",
  3805. REG_SDIO1_MAXCURCAPREG,value);
  3806. #endif
  3807. return value;
  3808. }
  3809. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v(U8 data)
  3810. {
  3811. GH_SDIO1_MAXCURCAPREG_S d;
  3812. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  3813. d.bitc.maxcurfor33v = data;
  3814. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  3815. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3816. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor33v] <-- 0x%08x\n",
  3817. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  3818. #endif
  3819. }
  3820. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v(void)
  3821. {
  3822. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  3823. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  3824. tmp_value.all = value;
  3825. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3826. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor33v] --> 0x%08x\n",
  3827. REG_SDIO1_MAXCURCAPREG,value);
  3828. #endif
  3829. return tmp_value.bitc.maxcurfor33v;
  3830. }
  3831. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v(U8 data)
  3832. {
  3833. GH_SDIO1_MAXCURCAPREG_S d;
  3834. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  3835. d.bitc.maxcurfor30v = data;
  3836. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  3837. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3838. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor30v] <-- 0x%08x\n",
  3839. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  3840. #endif
  3841. }
  3842. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v(void)
  3843. {
  3844. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  3845. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  3846. tmp_value.all = value;
  3847. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3848. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor30v] --> 0x%08x\n",
  3849. REG_SDIO1_MAXCURCAPREG,value);
  3850. #endif
  3851. return tmp_value.bitc.maxcurfor30v;
  3852. }
  3853. GH_INLINE void GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v(U8 data)
  3854. {
  3855. GH_SDIO1_MAXCURCAPREG_S d;
  3856. d.all = *(volatile U32 *)REG_SDIO1_MAXCURCAPREG;
  3857. d.bitc.maxcurfor18v = data;
  3858. *(volatile U32 *)REG_SDIO1_MAXCURCAPREG = d.all;
  3859. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3860. GH_SDIO1_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_SDIO1_set_MaxCurCapReg_MaxCurFor18v] <-- 0x%08x\n",
  3861. REG_SDIO1_MAXCURCAPREG,d.all,d.all);
  3862. #endif
  3863. }
  3864. GH_INLINE U8 GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v(void)
  3865. {
  3866. GH_SDIO1_MAXCURCAPREG_S tmp_value;
  3867. U32 value = (*(volatile U32 *)REG_SDIO1_MAXCURCAPREG);
  3868. tmp_value.all = value;
  3869. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3870. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_MaxCurCapReg_MaxCurFor18v] --> 0x%08x\n",
  3871. REG_SDIO1_MAXCURCAPREG,value);
  3872. #endif
  3873. return tmp_value.bitc.maxcurfor18v;
  3874. }
  3875. #endif /* GH_INLINE_LEVEL == 0 */
  3876. /*----------------------------------------------------------------------------*/
  3877. /* register SDIO1_SlotIntStatusReg (read) */
  3878. /*----------------------------------------------------------------------------*/
  3879. #if GH_INLINE_LEVEL == 0
  3880. /*! \brief Reads the register 'SDIO1_SlotIntStatusReg'. */
  3881. U32 GH_SDIO1_get_SlotIntStatusReg(void);
  3882. /*! \brief Reads the bit group 'IntSigForEachSlot' of register 'SDIO1_SlotIntStatusReg'. */
  3883. U8 GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot(void);
  3884. /*! \brief Reads the bit group 'SpecifiVerNum' of register 'SDIO1_SlotIntStatusReg'. */
  3885. U8 GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum(void);
  3886. /*! \brief Reads the bit group 'VendorVerNum' of register 'SDIO1_SlotIntStatusReg'. */
  3887. U8 GH_SDIO1_get_SlotIntStatusReg_VendorVerNum(void);
  3888. #else /* GH_INLINE_LEVEL == 0 */
  3889. GH_INLINE U32 GH_SDIO1_get_SlotIntStatusReg(void)
  3890. {
  3891. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  3892. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3893. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg] --> 0x%08x\n",
  3894. REG_SDIO1_SLOTINTSTATUSREG,value);
  3895. #endif
  3896. return value;
  3897. }
  3898. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot(void)
  3899. {
  3900. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  3901. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  3902. tmp_value.all = value;
  3903. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3904. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_IntSigForEachSlot] --> 0x%08x\n",
  3905. REG_SDIO1_SLOTINTSTATUSREG,value);
  3906. #endif
  3907. return tmp_value.bitc.intsigforeachslot;
  3908. }
  3909. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum(void)
  3910. {
  3911. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  3912. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  3913. tmp_value.all = value;
  3914. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3915. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_SpecifiVerNum] --> 0x%08x\n",
  3916. REG_SDIO1_SLOTINTSTATUSREG,value);
  3917. #endif
  3918. return tmp_value.bitc.specifivernum;
  3919. }
  3920. GH_INLINE U8 GH_SDIO1_get_SlotIntStatusReg_VendorVerNum(void)
  3921. {
  3922. GH_SDIO1_SLOTINTSTATUSREG_S tmp_value;
  3923. U32 value = (*(volatile U32 *)REG_SDIO1_SLOTINTSTATUSREG);
  3924. tmp_value.all = value;
  3925. #if GH_SDIO1_ENABLE_DEBUG_PRINT
  3926. GH_SDIO1_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_SDIO1_get_SlotIntStatusReg_VendorVerNum] --> 0x%08x\n",
  3927. REG_SDIO1_SLOTINTSTATUSREG,value);
  3928. #endif
  3929. return tmp_value.bitc.vendorvernum;
  3930. }
  3931. #endif /* GH_INLINE_LEVEL == 0 */
  3932. /*----------------------------------------------------------------------------*/
  3933. /* init function */
  3934. /*----------------------------------------------------------------------------*/
  3935. /*! \brief Initialises the registers and mirror variables. */
  3936. void GH_SDIO1_init(void);
  3937. #ifdef __cplusplus
  3938. }
  3939. #endif
  3940. #endif /* _GH_SDIO1_H */
  3941. /*----------------------------------------------------------------------------*/
  3942. /* end of file */
  3943. /*----------------------------------------------------------------------------*/