ecspi1_iomux_config.c 22 KB

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  1. /*
  2. * Copyright (c) 2012, Freescale Semiconductor, Inc.
  3. * All rights reserved.
  4. *
  5. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  6. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  7. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  8. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  9. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  10. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  11. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  12. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  13. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  14. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  15. */
  16. // File: ecspi1_iomux_config.c
  17. /* ------------------------------------------------------------------------------
  18. * <auto-generated>
  19. * This code was generated by a tool.
  20. * Runtime Version:3.4.0.0
  21. *
  22. * Changes to this file may cause incorrect behavior and will be lost if
  23. * the code is regenerated.
  24. * </auto-generated>
  25. * ------------------------------------------------------------------------------
  26. */
  27. #include "iomux_config.h"
  28. #include "registers/regsiomuxc.h"
  29. // Function to configure IOMUXC for ecspi1 module.
  30. void ecspi1_iomux_config(void)
  31. {
  32. // Config ecspi1.ECSPI1_MISO to pad EIM_DATA17(F21)
  33. // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_WR(0x00000001);
  34. // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_WR(0x0001B0B0);
  35. // HW_IOMUXC_ECSPI1_MISO_SELECT_INPUT_WR(0x00000002);
  36. // Mux Register:
  37. // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17(0x020E0148)
  38. // SION [4] - Software Input On Field Reset: DISABLED
  39. // Force the selected mux mode Input path no matter of MUX_MODE functionality.
  40. // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
  41. // ENABLED (1) - Force input path of pad.
  42. // MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
  43. // Select iomux modes to be used for pad.
  44. // ALT0 (0) - Select instance: eim signal: EIM_DATA17
  45. // ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_MISO
  46. // ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN06
  47. // ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_PIXCLK
  48. // ALT4 (4) - Select instance: dcic1 signal: DCIC1_OUT
  49. // ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO17
  50. // ALT6 (6) - Select instance: i2c3 signal: I2C3_SCL
  51. // ALT8 (8) - Select instance: epdc signal: EPDC_VCOM0
  52. HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_WR(
  53. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_SION_V(DISABLED) |
  54. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA17_MUX_MODE_V(ALT1));
  55. // Pad Control Register:
  56. // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17(0x020E0518)
  57. // HYS [16] - Hysteresis Enable Field Reset: ENABLED
  58. // DISABLED (0) - CMOS input
  59. // ENABLED (1) - Schmitt trigger input
  60. // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
  61. // 100K_OHM_PD (0) - 100K Ohm Pull Down
  62. // 47K_OHM_PU (1) - 47K Ohm Pull Up
  63. // 100K_OHM_PU (2) - 100K Ohm Pull Up
  64. // 22K_OHM_PU (3) - 22K Ohm Pull Up
  65. // PUE [13] - Pull / Keep Select Field Reset: PULL
  66. // KEEP (0) - Keeper Enabled
  67. // PULL (1) - Pull Enabled
  68. // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
  69. // DISABLED (0) - Pull/Keeper Disabled
  70. // ENABLED (1) - Pull/Keeper Enabled
  71. // ODE [11] - Open Drain Enable Field Reset: DISABLED
  72. // Enables open drain of the pin.
  73. // DISABLED (0) - Output is CMOS.
  74. // ENABLED (1) - Output is Open Drain.
  75. // SPEED [7:6] - Speed Field Reset: 100MHZ
  76. // RESERVED0 (0) - Reserved
  77. // 50MHZ (1) - Low (50 MHz)
  78. // 100MHZ (2) - Medium (100 MHz)
  79. // 200MHZ (3) - Maximum (200 MHz)
  80. // DSE [5:3] - Drive Strength Field Reset: 40_OHM
  81. // HIZ (0) - HI-Z
  82. // 240_OHM (1) - 240 Ohm
  83. // 120_OHM (2) - 120 Ohm
  84. // 80_OHM (3) - 80 Ohm
  85. // 60_OHM (4) - 60 Ohm
  86. // 48_OHM (5) - 48 Ohm
  87. // 40_OHM (6) - 40 Ohm
  88. // 34_OHM (7) - 34 Ohm
  89. // SRE [0] - Slew Rate Field Reset: SLOW
  90. // Slew rate control.
  91. // SLOW (0) - Slow Slew Rate
  92. // FAST (1) - Fast Slew Rate
  93. HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_WR(
  94. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_HYS_V(ENABLED) |
  95. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PUS_V(100K_OHM_PU) |
  96. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PUE_V(PULL) |
  97. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_PKE_V(ENABLED) |
  98. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_ODE_V(DISABLED) |
  99. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_SPEED_V(100MHZ) |
  100. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_DSE_V(40_OHM) |
  101. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA17_SRE_V(SLOW));
  102. // Pad EIM_DATA17 is involved in Daisy Chain.
  103. // Input Select Register:
  104. // IOMUXC_ECSPI1_MISO_SELECT_INPUT(0x020E07DC)
  105. // DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA06_ALT2
  106. // Selecting Pads Involved in Daisy Chain.
  107. // CSI0_DATA06_ALT2 (0) - Select signal ecspi1 ECSPI1_MISO as input from pad CSI0_DATA06(ALT2).
  108. // DISP0_DATA22_ALT2 (1) - Select signal ecspi1 ECSPI1_MISO as input from pad DISP0_DATA22(ALT2).
  109. // EIM_DATA17_ALT1 (2) - Select signal ecspi1 ECSPI1_MISO as input from pad EIM_DATA17(ALT1).
  110. // KEY_COL1_ALT0 (3) - Select signal ecspi1 ECSPI1_MISO as input from pad KEY_COL1(ALT0).
  111. HW_IOMUXC_ECSPI1_MISO_SELECT_INPUT_WR(
  112. BF_IOMUXC_ECSPI1_MISO_SELECT_INPUT_DAISY_V(EIM_DATA17_ALT1));
  113. // Config ecspi1.ECSPI1_MOSI to pad EIM_DATA18(D24)
  114. // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(0x00000001);
  115. // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(0x0001B0B0);
  116. // HW_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_WR(0x00000002);
  117. // Mux Register:
  118. // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18(0x020E014C)
  119. // SION [4] - Software Input On Field Reset: DISABLED
  120. // Force the selected mux mode Input path no matter of MUX_MODE functionality.
  121. // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
  122. // ENABLED (1) - Force input path of pad.
  123. // MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
  124. // Select iomux modes to be used for pad.
  125. // ALT0 (0) - Select instance: eim signal: EIM_DATA18
  126. // ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_MOSI
  127. // ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN07
  128. // ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA17
  129. // ALT4 (4) - Select instance: ipu1 signal: IPU1_DI1_D0_CS
  130. // ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO18
  131. // ALT6 (6) - Select instance: i2c3 signal: I2C3_SDA
  132. // ALT8 (8) - Select instance: epdc signal: EPDC_VCOM1
  133. HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_WR(
  134. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_SION_V(DISABLED) |
  135. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA18_MUX_MODE_V(ALT1));
  136. // Pad Control Register:
  137. // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18(0x020E051C)
  138. // HYS [16] - Hysteresis Enable Field Reset: ENABLED
  139. // DISABLED (0) - CMOS input
  140. // ENABLED (1) - Schmitt trigger input
  141. // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
  142. // 100K_OHM_PD (0) - 100K Ohm Pull Down
  143. // 47K_OHM_PU (1) - 47K Ohm Pull Up
  144. // 100K_OHM_PU (2) - 100K Ohm Pull Up
  145. // 22K_OHM_PU (3) - 22K Ohm Pull Up
  146. // PUE [13] - Pull / Keep Select Field Reset: PULL
  147. // KEEP (0) - Keeper Enabled
  148. // PULL (1) - Pull Enabled
  149. // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
  150. // DISABLED (0) - Pull/Keeper Disabled
  151. // ENABLED (1) - Pull/Keeper Enabled
  152. // ODE [11] - Open Drain Enable Field Reset: DISABLED
  153. // Enables open drain of the pin.
  154. // DISABLED (0) - Output is CMOS.
  155. // ENABLED (1) - Output is Open Drain.
  156. // SPEED [7:6] - Speed Field Reset: 100MHZ
  157. // RESERVED0 (0) - Reserved
  158. // 50MHZ (1) - Low (50 MHz)
  159. // 100MHZ (2) - Medium (100 MHz)
  160. // 200MHZ (3) - Maximum (200 MHz)
  161. // DSE [5:3] - Drive Strength Field Reset: 40_OHM
  162. // HIZ (0) - HI-Z
  163. // 240_OHM (1) - 240 Ohm
  164. // 120_OHM (2) - 120 Ohm
  165. // 80_OHM (3) - 80 Ohm
  166. // 60_OHM (4) - 60 Ohm
  167. // 48_OHM (5) - 48 Ohm
  168. // 40_OHM (6) - 40 Ohm
  169. // 34_OHM (7) - 34 Ohm
  170. // SRE [0] - Slew Rate Field Reset: SLOW
  171. // Slew rate control.
  172. // SLOW (0) - Slow Slew Rate
  173. // FAST (1) - Fast Slew Rate
  174. HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_WR(
  175. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_HYS_V(ENABLED) |
  176. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUS_V(100K_OHM_PU) |
  177. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PUE_V(PULL) |
  178. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_PKE_V(ENABLED) |
  179. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_ODE_V(DISABLED) |
  180. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SPEED_V(100MHZ) |
  181. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_DSE_V(40_OHM) |
  182. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA18_SRE_V(SLOW));
  183. // Pad EIM_DATA18 is involved in Daisy Chain.
  184. // Input Select Register:
  185. // IOMUXC_ECSPI1_MOSI_SELECT_INPUT(0x020E07E0)
  186. // DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA05_ALT2
  187. // Selecting Pads Involved in Daisy Chain.
  188. // CSI0_DATA05_ALT2 (0) - Select signal ecspi1 ECSPI1_MOSI as input from pad CSI0_DATA05(ALT2).
  189. // DISP0_DATA21_ALT2 (1) - Select signal ecspi1 ECSPI1_MOSI as input from pad DISP0_DATA21(ALT2).
  190. // EIM_DATA18_ALT1 (2) - Select signal ecspi1 ECSPI1_MOSI as input from pad EIM_DATA18(ALT1).
  191. // KEY_ROW0_ALT0 (3) - Select signal ecspi1 ECSPI1_MOSI as input from pad KEY_ROW0(ALT0).
  192. HW_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_WR(
  193. BF_IOMUXC_ECSPI1_MOSI_SELECT_INPUT_DAISY_V(EIM_DATA18_ALT1));
  194. // Config ecspi1.ECSPI1_RDY to pad GPIO19(P5)
  195. // HW_IOMUXC_SW_MUX_CTL_PAD_GPIO19_WR(0x00000004);
  196. // HW_IOMUXC_SW_PAD_CTL_PAD_GPIO19_WR(0x0001B0B0);
  197. // Mux Register:
  198. // IOMUXC_SW_MUX_CTL_PAD_GPIO19(0x020E0220)
  199. // SION [4] - Software Input On Field Reset: DISABLED
  200. // Force the selected mux mode Input path no matter of MUX_MODE functionality.
  201. // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
  202. // ENABLED (1) - Force input path of pad.
  203. // MUX_MODE [2:0] - MUX Mode Select Field Reset: ALT5
  204. // Select iomux modes to be used for pad.
  205. // ALT0 (0) - Select instance: kpp signal: KEY_COL5
  206. // ALT1 (1) - Select instance: enet signal: ENET_1588_EVENT0_OUT
  207. // ALT2 (2) - Select instance: spdif signal: SPDIF_OUT
  208. // ALT3 (3) - Select instance: ccm signal: CCM_CLKO1
  209. // ALT4 (4) - Select instance: ecspi1 signal: ECSPI1_RDY
  210. // ALT5 (5) - Select instance: gpio4 signal: GPIO4_IO05
  211. // ALT6 (6) - Select instance: enet signal: ENET_TX_ER
  212. HW_IOMUXC_SW_MUX_CTL_PAD_GPIO19_WR(
  213. BF_IOMUXC_SW_MUX_CTL_PAD_GPIO19_SION_V(DISABLED) |
  214. BF_IOMUXC_SW_MUX_CTL_PAD_GPIO19_MUX_MODE_V(ALT4));
  215. // Pad Control Register:
  216. // IOMUXC_SW_PAD_CTL_PAD_GPIO19(0x020E05F0)
  217. // HYS [16] - Hysteresis Enable Field Reset: ENABLED
  218. // DISABLED (0) - CMOS input
  219. // ENABLED (1) - Schmitt trigger input
  220. // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
  221. // 100K_OHM_PD (0) - 100K Ohm Pull Down
  222. // 47K_OHM_PU (1) - 47K Ohm Pull Up
  223. // 100K_OHM_PU (2) - 100K Ohm Pull Up
  224. // 22K_OHM_PU (3) - 22K Ohm Pull Up
  225. // PUE [13] - Pull / Keep Select Field Reset: PULL
  226. // KEEP (0) - Keeper Enabled
  227. // PULL (1) - Pull Enabled
  228. // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
  229. // DISABLED (0) - Pull/Keeper Disabled
  230. // ENABLED (1) - Pull/Keeper Enabled
  231. // ODE [11] - Open Drain Enable Field Reset: DISABLED
  232. // Enables open drain of the pin.
  233. // DISABLED (0) - Output is CMOS.
  234. // ENABLED (1) - Output is Open Drain.
  235. // SPEED [7:6] - Speed Field Reset: 100MHZ
  236. // RESERVED0 (0) - Reserved
  237. // 50MHZ (1) - Low (50 MHz)
  238. // 100MHZ (2) - Medium (100 MHz)
  239. // 200MHZ (3) - Maximum (200 MHz)
  240. // DSE [5:3] - Drive Strength Field Reset: 40_OHM
  241. // HIZ (0) - HI-Z
  242. // 240_OHM (1) - 240 Ohm
  243. // 120_OHM (2) - 120 Ohm
  244. // 80_OHM (3) - 80 Ohm
  245. // 60_OHM (4) - 60 Ohm
  246. // 48_OHM (5) - 48 Ohm
  247. // 40_OHM (6) - 40 Ohm
  248. // 34_OHM (7) - 34 Ohm
  249. // SRE [0] - Slew Rate Field Reset: SLOW
  250. // Slew rate control.
  251. // SLOW (0) - Slow Slew Rate
  252. // FAST (1) - Fast Slew Rate
  253. HW_IOMUXC_SW_PAD_CTL_PAD_GPIO19_WR(
  254. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_HYS_V(ENABLED) |
  255. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PUS_V(100K_OHM_PU) |
  256. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PUE_V(PULL) |
  257. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_PKE_V(ENABLED) |
  258. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_ODE_V(DISABLED) |
  259. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_SPEED_V(100MHZ) |
  260. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_DSE_V(40_OHM) |
  261. BF_IOMUXC_SW_PAD_CTL_PAD_GPIO19_SRE_V(SLOW));
  262. // Config ecspi1.ECSPI1_SCLK to pad EIM_DATA16(C25)
  263. // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_WR(0x00000001);
  264. // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_WR(0x0001B0B0);
  265. // HW_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_WR(0x00000002);
  266. // Mux Register:
  267. // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16(0x020E0144)
  268. // SION [4] - Software Input On Field Reset: DISABLED
  269. // Force the selected mux mode Input path no matter of MUX_MODE functionality.
  270. // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
  271. // ENABLED (1) - Force input path of pad.
  272. // MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
  273. // Select iomux modes to be used for pad.
  274. // ALT0 (0) - Select instance: eim signal: EIM_DATA16
  275. // ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_SCLK
  276. // ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN05
  277. // ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA18
  278. // ALT4 (4) - Select instance: hdmi signal: HDMI_TX_DDC_SDA
  279. // ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO16
  280. // ALT6 (6) - Select instance: i2c2 signal: I2C2_SDA
  281. // ALT8 (8) - Select instance: epdc signal: EPDC_DATA10
  282. HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_WR(
  283. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_SION_V(DISABLED) |
  284. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA16_MUX_MODE_V(ALT1));
  285. // Pad Control Register:
  286. // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16(0x020E0514)
  287. // HYS [16] - Hysteresis Enable Field Reset: ENABLED
  288. // DISABLED (0) - CMOS input
  289. // ENABLED (1) - Schmitt trigger input
  290. // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
  291. // 100K_OHM_PD (0) - 100K Ohm Pull Down
  292. // 47K_OHM_PU (1) - 47K Ohm Pull Up
  293. // 100K_OHM_PU (2) - 100K Ohm Pull Up
  294. // 22K_OHM_PU (3) - 22K Ohm Pull Up
  295. // PUE [13] - Pull / Keep Select Field Reset: PULL
  296. // KEEP (0) - Keeper Enabled
  297. // PULL (1) - Pull Enabled
  298. // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
  299. // DISABLED (0) - Pull/Keeper Disabled
  300. // ENABLED (1) - Pull/Keeper Enabled
  301. // ODE [11] - Open Drain Enable Field Reset: DISABLED
  302. // Enables open drain of the pin.
  303. // DISABLED (0) - Output is CMOS.
  304. // ENABLED (1) - Output is Open Drain.
  305. // SPEED [7:6] - Speed Field Reset: 100MHZ
  306. // RESERVED0 (0) - Reserved
  307. // 50MHZ (1) - Low (50 MHz)
  308. // 100MHZ (2) - Medium (100 MHz)
  309. // 200MHZ (3) - Maximum (200 MHz)
  310. // DSE [5:3] - Drive Strength Field Reset: 40_OHM
  311. // HIZ (0) - HI-Z
  312. // 240_OHM (1) - 240 Ohm
  313. // 120_OHM (2) - 120 Ohm
  314. // 80_OHM (3) - 80 Ohm
  315. // 60_OHM (4) - 60 Ohm
  316. // 48_OHM (5) - 48 Ohm
  317. // 40_OHM (6) - 40 Ohm
  318. // 34_OHM (7) - 34 Ohm
  319. // SRE [0] - Slew Rate Field Reset: SLOW
  320. // Slew rate control.
  321. // SLOW (0) - Slow Slew Rate
  322. // FAST (1) - Fast Slew Rate
  323. HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_WR(
  324. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_HYS_V(ENABLED) |
  325. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PUS_V(100K_OHM_PU) |
  326. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PUE_V(PULL) |
  327. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_PKE_V(ENABLED) |
  328. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_ODE_V(DISABLED) |
  329. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_SPEED_V(100MHZ) |
  330. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_DSE_V(40_OHM) |
  331. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA16_SRE_V(SLOW));
  332. // Pad EIM_DATA16 is involved in Daisy Chain.
  333. // Input Select Register:
  334. // IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT(0x020E07D8)
  335. // DAISY [1:0] - MUX Mode Select Field Reset: CSI0_DATA04_ALT2
  336. // Selecting Pads Involved in Daisy Chain.
  337. // CSI0_DATA04_ALT2 (0) - Select signal ecspi1 ECSPI1_SCLK as input from pad CSI0_DATA04(ALT2).
  338. // DISP0_DATA20_ALT2 (1) - Select signal ecspi1 ECSPI1_SCLK as input from pad DISP0_DATA20(ALT2).
  339. // EIM_DATA16_ALT1 (2) - Select signal ecspi1 ECSPI1_SCLK as input from pad EIM_DATA16(ALT1).
  340. // KEY_COL0_ALT0 (3) - Select signal ecspi1 ECSPI1_SCLK as input from pad KEY_COL0(ALT0).
  341. HW_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_WR(
  342. BF_IOMUXC_ECSPI1_CSPI_CLK_IN_SELECT_INPUT_DAISY_V(EIM_DATA16_ALT1));
  343. // Config ecspi1.ECSPI1_SS1 to pad EIM_DATA19(G21)
  344. // HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_WR(0x00000001);
  345. // HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_WR(0x0001B0B0);
  346. // HW_IOMUXC_ECSPI1_SS1_SELECT_INPUT_WR(0x00000001);
  347. // Mux Register:
  348. // IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19(0x020E0150)
  349. // SION [4] - Software Input On Field Reset: DISABLED
  350. // Force the selected mux mode Input path no matter of MUX_MODE functionality.
  351. // DISABLED (0) - Input Path is determined by functionality of the selected mux mode (regular).
  352. // ENABLED (1) - Force input path of pad.
  353. // MUX_MODE [3:0] - MUX Mode Select Field Reset: ALT5
  354. // Select iomux modes to be used for pad.
  355. // ALT0 (0) - Select instance: eim signal: EIM_DATA19
  356. // ALT1 (1) - Select instance: ecspi1 signal: ECSPI1_SS1
  357. // ALT2 (2) - Select instance: ipu1 signal: IPU1_DI0_PIN08
  358. // ALT3 (3) - Select instance: ipu1 signal: IPU1_CSI1_DATA16
  359. // ALT4 (4) - Select instance: uart1 signal: UART1_CTS_B
  360. // ALT5 (5) - Select instance: gpio3 signal: GPIO3_IO19
  361. // ALT6 (6) - Select instance: epit1 signal: EPIT1_OUT
  362. // ALT8 (8) - Select instance: epdc signal: EPDC_DATA12
  363. HW_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_WR(
  364. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_SION_V(DISABLED) |
  365. BF_IOMUXC_SW_MUX_CTL_PAD_EIM_DATA19_MUX_MODE_V(ALT1));
  366. // Pad Control Register:
  367. // IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19(0x020E0520)
  368. // HYS [16] - Hysteresis Enable Field Reset: ENABLED
  369. // DISABLED (0) - CMOS input
  370. // ENABLED (1) - Schmitt trigger input
  371. // PUS [15:14] - Pull Up / Down Config. Field Reset: 100K_OHM_PU
  372. // 100K_OHM_PD (0) - 100K Ohm Pull Down
  373. // 47K_OHM_PU (1) - 47K Ohm Pull Up
  374. // 100K_OHM_PU (2) - 100K Ohm Pull Up
  375. // 22K_OHM_PU (3) - 22K Ohm Pull Up
  376. // PUE [13] - Pull / Keep Select Field Reset: PULL
  377. // KEEP (0) - Keeper Enabled
  378. // PULL (1) - Pull Enabled
  379. // PKE [12] - Pull / Keep Enable Field Reset: ENABLED
  380. // DISABLED (0) - Pull/Keeper Disabled
  381. // ENABLED (1) - Pull/Keeper Enabled
  382. // ODE [11] - Open Drain Enable Field Reset: DISABLED
  383. // Enables open drain of the pin.
  384. // DISABLED (0) - Output is CMOS.
  385. // ENABLED (1) - Output is Open Drain.
  386. // SPEED [7:6] - Speed Field Reset: 100MHZ
  387. // RESERVED0 (0) - Reserved
  388. // 50MHZ (1) - Low (50 MHz)
  389. // 100MHZ (2) - Medium (100 MHz)
  390. // 200MHZ (3) - Maximum (200 MHz)
  391. // DSE [5:3] - Drive Strength Field Reset: 40_OHM
  392. // HIZ (0) - HI-Z
  393. // 240_OHM (1) - 240 Ohm
  394. // 120_OHM (2) - 120 Ohm
  395. // 80_OHM (3) - 80 Ohm
  396. // 60_OHM (4) - 60 Ohm
  397. // 48_OHM (5) - 48 Ohm
  398. // 40_OHM (6) - 40 Ohm
  399. // 34_OHM (7) - 34 Ohm
  400. // SRE [0] - Slew Rate Field Reset: SLOW
  401. // Slew rate control.
  402. // SLOW (0) - Slow Slew Rate
  403. // FAST (1) - Fast Slew Rate
  404. HW_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_WR(
  405. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_HYS_V(ENABLED) |
  406. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PUS_V(100K_OHM_PU) |
  407. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PUE_V(PULL) |
  408. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_PKE_V(ENABLED) |
  409. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_ODE_V(DISABLED) |
  410. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_SPEED_V(100MHZ) |
  411. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_DSE_V(40_OHM) |
  412. BF_IOMUXC_SW_PAD_CTL_PAD_EIM_DATA19_SRE_V(SLOW));
  413. // Pad EIM_DATA19 is involved in Daisy Chain.
  414. // Input Select Register:
  415. // IOMUXC_ECSPI1_SS1_SELECT_INPUT(0x020E07E8)
  416. // DAISY [1:0] - MUX Mode Select Field Reset: DISP0_DATA15_ALT2
  417. // Selecting Pads Involved in Daisy Chain.
  418. // DISP0_DATA15_ALT2 (0) - Select signal ecspi1 ECSPI1_SS1 as input from pad DISP0_DATA15(ALT2).
  419. // EIM_DATA19_ALT1 (1) - Select signal ecspi1 ECSPI1_SS1 as input from pad EIM_DATA19(ALT1).
  420. // KEY_COL2_ALT0 (2) - Select signal ecspi1 ECSPI1_SS1 as input from pad KEY_COL2(ALT0).
  421. HW_IOMUXC_ECSPI1_SS1_SELECT_INPUT_WR(
  422. BF_IOMUXC_ECSPI1_SS1_SELECT_INPUT_DAISY_V(EIM_DATA19_ALT1));
  423. }