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- /*
- * Copyright (c) 2010-2012, Freescale Semiconductor, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without modification,
- * are permitted provided that the following conditions are met:
- *
- * o Redistributions of source code must retain the above copyright notice, this list
- * of conditions and the following disclaimer.
- *
- * o Redistributions in binary form must reproduce the above copyright notice, this
- * list of conditions and the following disclaimer in the documentation and/or
- * other materials provided with the distribution.
- *
- * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
- * contributors may be used to endorse or promote products derived from this
- * software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
- * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
- void StartPerfCounter(void)
- {
- asm("mov r1, #12"); /* divider enable (64 cycles/count), cycle counter reset */
- asm("mcr p15, 0, r1, c9, c12, 0");
- asm("ldr r1,=0x80000000");
- asm("mcr p15, 0, r1, c9, c12, 1"); /*enable C bit of c9,Count Enable Set register */
- asm("mov r1, #9"); /* Counter enable */
- asm("mcr p15, 0, r1, c9, c12, 0");
- }
- unsigned int StopPerfCounter(void)
- {
- unsigned int counter = 0;
- asm volatile ("mrc p15, 0, %0, c9, c13, 0":"=r" (counter):);
- asm("ldr r1,=0x80000000");
- asm("mcr p15, 0, r1, c9, c12, 2 "); /*disable C bit of c9,Count Clear register */
- return counter * 64;
- }
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