fsl_lpspi_edma.c 35 KB

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  1. /*
  2. * The Clear BSD License
  3. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  4. * Copyright 2016-2017 NXP
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without modification,
  8. * are permitted (subject to the limitations in the disclaimer below) provided
  9. * that the following conditions are met:
  10. *
  11. * o Redistributions of source code must retain the above copyright notice, this list
  12. * of conditions and the following disclaimer.
  13. *
  14. * o Redistributions in binary form must reproduce the above copyright notice, this
  15. * list of conditions and the following disclaimer in the documentation and/or
  16. * other materials provided with the distribution.
  17. *
  18. * o Neither the name of the copyright holder nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  27. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #include "fsl_lpspi_edma.h"
  35. /***********************************************************************************************************************
  36. * Definitions
  37. ***********************************************************************************************************************/
  38. /* Component ID definition, used by tools. */
  39. #ifndef FSL_COMPONENT_ID
  40. #define FSL_COMPONENT_ID "platform.drivers.lpspi_edma"
  41. #endif
  42. /*!
  43. * @brief Structure definition for dspi_master_edma_private_handle_t. The structure is private.
  44. */
  45. typedef struct _lpspi_master_edma_private_handle
  46. {
  47. LPSPI_Type *base; /*!< LPSPI peripheral base address. */
  48. lpspi_master_edma_handle_t *handle; /*!< lpspi_master_edma_handle_t handle */
  49. } lpspi_master_edma_private_handle_t;
  50. /*!
  51. * @brief Structure definition for dspi_slave_edma_private_handle_t. The structure is private.
  52. */
  53. typedef struct _lpspi_slave_edma_private_handle
  54. {
  55. LPSPI_Type *base; /*!< LPSPI peripheral base address. */
  56. lpspi_slave_edma_handle_t *handle; /*!< lpspi_slave_edma_handle_t handle */
  57. } lpspi_slave_edma_private_handle_t;
  58. /***********************************************************************************************************************
  59. * Prototypes
  60. ***********************************************************************************************************************/
  61. /*!
  62. * @brief EDMA_LpspiMasterCallback after the LPSPI master transfer completed by using EDMA.
  63. * This is not a public API.
  64. */
  65. static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
  66. void *g_lpspiEdmaPrivateHandle,
  67. bool transferDone,
  68. uint32_t tcds);
  69. /*!
  70. * @brief EDMA_LpspiSlaveCallback after the LPSPI slave transfer completed by using EDMA.
  71. * This is not a public API.
  72. */
  73. static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
  74. void *g_lpspiEdmaPrivateHandle,
  75. bool transferDone,
  76. uint32_t tcds);
  77. static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap);
  78. /***********************************************************************************************************************
  79. * Variables
  80. ***********************************************************************************************************************/
  81. /*! @brief Pointers to lpspi edma handles for each instance. */
  82. static lpspi_master_edma_private_handle_t s_lpspiMasterEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
  83. static lpspi_slave_edma_private_handle_t s_lpspiSlaveEdmaPrivateHandle[FSL_FEATURE_SOC_LPSPI_COUNT];
  84. /***********************************************************************************************************************
  85. * Code
  86. ***********************************************************************************************************************/
  87. static void LPSPI_SeparateEdmaReadData(uint8_t *rxData, uint32_t readData, uint32_t bytesEachRead, bool isByteSwap)
  88. {
  89. assert(rxData);
  90. switch (bytesEachRead)
  91. {
  92. case 1:
  93. if (!isByteSwap)
  94. {
  95. *rxData = readData;
  96. ++rxData;
  97. }
  98. else
  99. {
  100. *rxData = readData >> 24;
  101. ++rxData;
  102. }
  103. break;
  104. case 2:
  105. if (!isByteSwap)
  106. {
  107. *rxData = readData;
  108. ++rxData;
  109. *rxData = readData >> 8;
  110. ++rxData;
  111. }
  112. else
  113. {
  114. *rxData = readData >> 16;
  115. ++rxData;
  116. *rxData = readData >> 24;
  117. ++rxData;
  118. }
  119. break;
  120. case 4:
  121. *rxData = readData;
  122. ++rxData;
  123. *rxData = readData >> 8;
  124. ++rxData;
  125. *rxData = readData >> 16;
  126. ++rxData;
  127. *rxData = readData >> 24;
  128. ++rxData;
  129. break;
  130. default:
  131. assert(false);
  132. break;
  133. }
  134. }
  135. void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base,
  136. lpspi_master_edma_handle_t *handle,
  137. lpspi_master_edma_transfer_callback_t callback,
  138. void *userData,
  139. edma_handle_t *edmaRxRegToRxDataHandle,
  140. edma_handle_t *edmaTxDataToTxRegHandle)
  141. {
  142. assert(handle);
  143. assert(edmaRxRegToRxDataHandle);
  144. assert(edmaTxDataToTxRegHandle);
  145. /* Zero the handle. */
  146. memset(handle, 0, sizeof(*handle));
  147. uint32_t instance = LPSPI_GetInstance(base);
  148. s_lpspiMasterEdmaPrivateHandle[instance].base = base;
  149. s_lpspiMasterEdmaPrivateHandle[instance].handle = handle;
  150. handle->callback = callback;
  151. handle->userData = userData;
  152. handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
  153. handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
  154. }
  155. status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)
  156. {
  157. assert(handle);
  158. assert(transfer);
  159. uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
  160. uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
  161. uint32_t temp = 0U;
  162. if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
  163. {
  164. return kStatus_InvalidArgument;
  165. }
  166. /*And since the dma transfer can not support 3 bytes .*/
  167. if ((bytesPerFrame % 4U) == 3)
  168. {
  169. return kStatus_InvalidArgument;
  170. }
  171. /* Check that we're not busy.*/
  172. if (handle->state == kLPSPI_Busy)
  173. {
  174. return kStatus_LPSPI_Busy;
  175. }
  176. handle->state = kLPSPI_Busy;
  177. uint32_t instance = LPSPI_GetInstance(base);
  178. uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
  179. uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
  180. uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
  181. /*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
  182. uint8_t txWatermark = 0;
  183. uint8_t rxWatermark = 0;
  184. /*Used for byte swap*/
  185. uint32_t dif = 0;
  186. uint8_t bytesLastWrite = 0;
  187. bool isThereExtraTxBytes = false;
  188. uint8_t dummyData = g_lpspiDummyData[instance];
  189. edma_transfer_config_t transferConfigRx;
  190. edma_transfer_config_t transferConfigTx;
  191. edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
  192. edma_tcd_t *softwareTCD_pcsContinuous = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[2]) & (~0x1FU));
  193. handle->txData = transfer->txData;
  194. handle->rxData = transfer->rxData;
  195. handle->txRemainingByteCount = transfer->dataSize;
  196. handle->rxRemainingByteCount = transfer->dataSize;
  197. handle->totalByteCount = transfer->dataSize;
  198. handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
  199. handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
  200. handle->txBuffIfNull =
  201. ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
  202. /*The TX and RX FIFO sizes are always the same*/
  203. handle->fifoSize = LPSPI_GetRxFifoSize(base);
  204. handle->isPcsContinuous = (bool)(transfer->configFlags & kLPSPI_MasterPcsContinuous);
  205. handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
  206. LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
  207. /*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
  208. LPSPI_Enable(base, false);
  209. base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
  210. /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
  211. temp = base->CFGR1;
  212. temp &= LPSPI_CFGR1_PINCFG_MASK;
  213. if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
  214. {
  215. if (!handle->txData)
  216. {
  217. base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
  218. }
  219. /* The 3-wire mode can't send and receive data at the same time. */
  220. if ((handle->txData) && (handle->rxData))
  221. {
  222. return kStatus_InvalidArgument;
  223. }
  224. }
  225. /*Flush FIFO , clear status , disable all the inerrupts.*/
  226. LPSPI_FlushFifo(base, true, true);
  227. LPSPI_ClearStatusFlags(base, kLPSPI_AllStatusFlag);
  228. LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
  229. /* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
  230. * hard to controlled by software.
  231. */
  232. base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK | LPSPI_TCR_PCS_MASK)) |
  233. LPSPI_TCR_CONT(handle->isPcsContinuous) | LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) |
  234. LPSPI_TCR_PCS(whichPcs);
  235. isThereExtraTxBytes = false;
  236. handle->isThereExtraRxBytes = false;
  237. /*Calculate the bytes for write/read the TX/RX register each time*/
  238. if (bytesPerFrame <= 4)
  239. {
  240. handle->bytesEachWrite = bytesPerFrame;
  241. handle->bytesEachRead = bytesPerFrame;
  242. handle->bytesLastRead = bytesPerFrame;
  243. }
  244. else
  245. {
  246. handle->bytesEachWrite = 4;
  247. handle->bytesEachRead = 4;
  248. handle->bytesLastRead = 4;
  249. if ((transfer->dataSize % 4) != 0)
  250. {
  251. bytesLastWrite = transfer->dataSize % 4;
  252. handle->bytesLastRead = bytesLastWrite;
  253. isThereExtraTxBytes = true;
  254. --handle->writeRegRemainingTimes;
  255. --handle->readRegRemainingTimes;
  256. handle->isThereExtraRxBytes = true;
  257. }
  258. }
  259. LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  260. EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiMasterCallback,
  261. &s_lpspiMasterEdmaPrivateHandle[instance]);
  262. /*Rx*/
  263. EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
  264. if (handle->rxData)
  265. {
  266. transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
  267. transferConfigRx.destOffset = 1;
  268. }
  269. else
  270. {
  271. transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
  272. transferConfigRx.destOffset = 0;
  273. }
  274. transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
  275. dif = 0;
  276. switch (handle->bytesEachRead)
  277. {
  278. case (1U):
  279. transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
  280. transferConfigRx.minorLoopBytes = 1;
  281. if (handle->isByteSwap)
  282. {
  283. dif = 3;
  284. }
  285. break;
  286. case (2U):
  287. transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
  288. transferConfigRx.minorLoopBytes = 2;
  289. if (handle->isByteSwap)
  290. {
  291. dif = 2;
  292. }
  293. break;
  294. case (4U):
  295. transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
  296. transferConfigRx.minorLoopBytes = 4;
  297. break;
  298. default:
  299. transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
  300. transferConfigRx.minorLoopBytes = 1;
  301. assert(false);
  302. break;
  303. }
  304. transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
  305. transferConfigRx.srcOffset = 0;
  306. transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
  307. /* Store the initially configured eDMA minor byte transfer count into the LPSPI handle */
  308. handle->nbytes = transferConfigRx.minorLoopBytes;
  309. EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
  310. &transferConfigRx, NULL);
  311. EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
  312. kEDMA_MajorInterruptEnable);
  313. /*Tx*/
  314. EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
  315. if (isThereExtraTxBytes)
  316. {
  317. if (handle->txData)
  318. {
  319. transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
  320. transferConfigTx.srcOffset = 1;
  321. }
  322. else
  323. {
  324. transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
  325. transferConfigTx.srcOffset = 0;
  326. }
  327. transferConfigTx.destOffset = 0;
  328. transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
  329. dif = 0;
  330. switch (bytesLastWrite)
  331. {
  332. case (1U):
  333. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  334. transferConfigTx.minorLoopBytes = 1;
  335. if (handle->isByteSwap)
  336. {
  337. dif = 3;
  338. }
  339. break;
  340. case (2U):
  341. transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
  342. transferConfigTx.minorLoopBytes = 2;
  343. if (handle->isByteSwap)
  344. {
  345. dif = 2;
  346. }
  347. break;
  348. default:
  349. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  350. transferConfigTx.minorLoopBytes = 1;
  351. assert(false);
  352. break;
  353. }
  354. transferConfigTx.destAddr = (uint32_t)txAddr + dif;
  355. transferConfigTx.majorLoopCounts = 1;
  356. EDMA_TcdReset(softwareTCD_extraBytes);
  357. if (handle->isPcsContinuous)
  358. {
  359. EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, softwareTCD_pcsContinuous);
  360. }
  361. else
  362. {
  363. EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
  364. }
  365. }
  366. if (handle->isPcsContinuous)
  367. {
  368. handle->transmitCommand = base->TCR & ~(LPSPI_TCR_CONTC_MASK | LPSPI_TCR_CONT_MASK);
  369. transferConfigTx.srcAddr = (uint32_t) & (handle->transmitCommand);
  370. transferConfigTx.srcOffset = 0;
  371. transferConfigTx.destAddr = (uint32_t) & (base->TCR);
  372. transferConfigTx.destOffset = 0;
  373. transferConfigTx.srcTransferSize = kEDMA_TransferSize4Bytes;
  374. transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
  375. transferConfigTx.minorLoopBytes = 4;
  376. transferConfigTx.majorLoopCounts = 1;
  377. EDMA_TcdReset(softwareTCD_pcsContinuous);
  378. EDMA_TcdSetTransferConfig(softwareTCD_pcsContinuous, &transferConfigTx, NULL);
  379. }
  380. if (handle->txData)
  381. {
  382. transferConfigTx.srcAddr = (uint32_t)(handle->txData);
  383. transferConfigTx.srcOffset = 1;
  384. }
  385. else
  386. {
  387. transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
  388. transferConfigTx.srcOffset = 0;
  389. }
  390. transferConfigTx.destOffset = 0;
  391. transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
  392. dif = 0;
  393. switch (handle->bytesEachRead)
  394. {
  395. case (1U):
  396. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  397. transferConfigTx.minorLoopBytes = 1;
  398. if (handle->isByteSwap)
  399. {
  400. dif = 3;
  401. }
  402. break;
  403. case (2U):
  404. transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
  405. transferConfigTx.minorLoopBytes = 2;
  406. if (handle->isByteSwap)
  407. {
  408. dif = 2;
  409. }
  410. break;
  411. case (4U):
  412. transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
  413. transferConfigTx.minorLoopBytes = 4;
  414. break;
  415. default:
  416. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  417. transferConfigTx.minorLoopBytes = 1;
  418. assert(false);
  419. break;
  420. }
  421. transferConfigTx.destAddr = (uint32_t)txAddr + dif;
  422. transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
  423. if (isThereExtraTxBytes)
  424. {
  425. EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
  426. &transferConfigTx, softwareTCD_extraBytes);
  427. }
  428. else if (handle->isPcsContinuous)
  429. {
  430. EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
  431. &transferConfigTx, softwareTCD_pcsContinuous);
  432. }
  433. else
  434. {
  435. EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
  436. &transferConfigTx, NULL);
  437. }
  438. EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
  439. EDMA_StartTransfer(handle->edmaRxRegToRxDataHandle);
  440. LPSPI_EnableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  441. LPSPI_Enable(base, true);
  442. return kStatus_Success;
  443. }
  444. static void EDMA_LpspiMasterCallback(edma_handle_t *edmaHandle,
  445. void *g_lpspiEdmaPrivateHandle,
  446. bool transferDone,
  447. uint32_t tcds)
  448. {
  449. assert(edmaHandle);
  450. assert(g_lpspiEdmaPrivateHandle);
  451. uint32_t readData;
  452. lpspi_master_edma_private_handle_t *lpspiEdmaPrivateHandle;
  453. lpspiEdmaPrivateHandle = (lpspi_master_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
  454. LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
  455. if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
  456. {
  457. while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
  458. {
  459. }
  460. readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
  461. if (lpspiEdmaPrivateHandle->handle->rxData)
  462. {
  463. LPSPI_SeparateEdmaReadData(
  464. &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
  465. lpspiEdmaPrivateHandle->handle->bytesLastRead]),
  466. readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
  467. }
  468. }
  469. lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
  470. if (lpspiEdmaPrivateHandle->handle->callback)
  471. {
  472. lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
  473. kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
  474. }
  475. }
  476. void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle)
  477. {
  478. assert(handle);
  479. LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  480. EDMA_AbortTransfer(handle->edmaRxRegToRxDataHandle);
  481. EDMA_AbortTransfer(handle->edmaTxDataToTxRegHandle);
  482. handle->state = kLPSPI_Idle;
  483. }
  484. status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count)
  485. {
  486. assert(handle);
  487. if (!count)
  488. {
  489. return kStatus_InvalidArgument;
  490. }
  491. /* Catch when there is not an active transfer. */
  492. if (handle->state != kLPSPI_Busy)
  493. {
  494. *count = 0;
  495. return kStatus_NoTransferInProgress;
  496. }
  497. size_t remainingByte;
  498. remainingByte =
  499. (uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->edmaRxRegToRxDataHandle->base,
  500. handle->edmaRxRegToRxDataHandle->channel);
  501. *count = handle->totalByteCount - remainingByte;
  502. return kStatus_Success;
  503. }
  504. void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base,
  505. lpspi_slave_edma_handle_t *handle,
  506. lpspi_slave_edma_transfer_callback_t callback,
  507. void *userData,
  508. edma_handle_t *edmaRxRegToRxDataHandle,
  509. edma_handle_t *edmaTxDataToTxRegHandle)
  510. {
  511. assert(handle);
  512. assert(edmaRxRegToRxDataHandle);
  513. assert(edmaTxDataToTxRegHandle);
  514. /* Zero the handle. */
  515. memset(handle, 0, sizeof(*handle));
  516. uint32_t instance = LPSPI_GetInstance(base);
  517. s_lpspiSlaveEdmaPrivateHandle[instance].base = base;
  518. s_lpspiSlaveEdmaPrivateHandle[instance].handle = handle;
  519. handle->callback = callback;
  520. handle->userData = userData;
  521. handle->edmaRxRegToRxDataHandle = edmaRxRegToRxDataHandle;
  522. handle->edmaTxDataToTxRegHandle = edmaTxDataToTxRegHandle;
  523. }
  524. status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer)
  525. {
  526. assert(handle);
  527. assert(transfer);
  528. uint32_t bitsPerFrame = ((base->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT) + 1;
  529. uint32_t bytesPerFrame = (bitsPerFrame + 7) / 8;
  530. uint32_t temp = 0U;
  531. uint8_t dummyData = g_lpspiDummyData[LPSPI_GetInstance(base)];
  532. if (!LPSPI_CheckTransferArgument(transfer, bitsPerFrame, bytesPerFrame))
  533. {
  534. return kStatus_InvalidArgument;
  535. }
  536. /*And since the dma transfer can not support 3 bytes .*/
  537. if ((bytesPerFrame % 4U) == 3)
  538. {
  539. return kStatus_InvalidArgument;
  540. }
  541. /* Check that we're not busy.*/
  542. if (handle->state == kLPSPI_Busy)
  543. {
  544. return kStatus_LPSPI_Busy;
  545. }
  546. handle->state = kLPSPI_Busy;
  547. uint32_t rxAddr = LPSPI_GetRxRegisterAddress(base);
  548. uint32_t txAddr = LPSPI_GetTxRegisterAddress(base);
  549. edma_tcd_t *softwareTCD_extraBytes = (edma_tcd_t *)((uint32_t)(&handle->lpspiSoftwareTCD[1]) & (~0x1FU));
  550. uint32_t whichPcs = (transfer->configFlags & LPSPI_MASTER_PCS_MASK) >> LPSPI_MASTER_PCS_SHIFT;
  551. /*Because DMA is fast enough , so set the RX and TX watermarks to 0 .*/
  552. uint8_t txWatermark = 0;
  553. uint8_t rxWatermark = 0;
  554. /*Used for byte swap*/
  555. uint32_t dif = 0;
  556. uint8_t bytesLastWrite = 0;
  557. uint32_t instance = LPSPI_GetInstance(base);
  558. edma_transfer_config_t transferConfigRx;
  559. edma_transfer_config_t transferConfigTx;
  560. bool isThereExtraTxBytes = false;
  561. handle->txData = transfer->txData;
  562. handle->rxData = transfer->rxData;
  563. handle->txRemainingByteCount = transfer->dataSize;
  564. handle->rxRemainingByteCount = transfer->dataSize;
  565. handle->totalByteCount = transfer->dataSize;
  566. handle->writeRegRemainingTimes = (transfer->dataSize / bytesPerFrame) * ((bytesPerFrame + 3) / 4);
  567. handle->readRegRemainingTimes = handle->writeRegRemainingTimes;
  568. handle->txBuffIfNull =
  569. ((uint32_t)dummyData) | ((uint32_t)dummyData << 8) | ((uint32_t)dummyData << 16) | ((uint32_t)dummyData << 24);
  570. /*The TX and RX FIFO sizes are always the same*/
  571. handle->fifoSize = LPSPI_GetRxFifoSize(base);
  572. handle->isByteSwap = (bool)(transfer->configFlags & kLPSPI_MasterByteSwap);
  573. LPSPI_SetFifoWatermarks(base, txWatermark, rxWatermark);
  574. /*Transfers will stall when transmit FIFO is empty or receive FIFO is full. */
  575. LPSPI_Enable(base, false);
  576. base->CFGR1 &= (~LPSPI_CFGR1_NOSTALL_MASK);
  577. /* Check if using 3-wire mode and the txData is NULL, set the output pin to tristated. */
  578. temp = base->CFGR1;
  579. temp &= LPSPI_CFGR1_PINCFG_MASK;
  580. if ((temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdiInSdiOut)) || (temp == LPSPI_CFGR1_PINCFG(kLPSPI_SdoInSdoOut)))
  581. {
  582. if (!handle->txData)
  583. {
  584. base->CFGR1 |= LPSPI_CFGR1_OUTCFG_MASK;
  585. }
  586. /* The 3-wire mode can't send and receive data at the same time. */
  587. if ((handle->txData) && (handle->rxData))
  588. {
  589. return kStatus_InvalidArgument;
  590. }
  591. }
  592. /*Flush FIFO , clear status , disable all the inerrupts.*/
  593. LPSPI_FlushFifo(base, true, true);
  594. LPSPI_ClearStatusFlags(base, kLPSPI_AllStatusFlag);
  595. LPSPI_DisableInterrupts(base, kLPSPI_AllInterruptEnable);
  596. /* For DMA transfer , we'd better not masked the transmit data and receive data in TCR since the transfer flow is
  597. * hard to controlled by software.
  598. */
  599. base->TCR = (base->TCR & ~(LPSPI_TCR_CONT_MASK | LPSPI_TCR_CONTC_MASK | LPSPI_TCR_BYSW_MASK)) |
  600. LPSPI_TCR_CONTC(0U) | LPSPI_TCR_BYSW(handle->isByteSwap) | LPSPI_TCR_PCS(whichPcs);
  601. isThereExtraTxBytes = false;
  602. handle->isThereExtraRxBytes = false;
  603. /*Calculate the bytes for write/read the TX/RX register each time*/
  604. if (bytesPerFrame <= 4)
  605. {
  606. handle->bytesEachWrite = bytesPerFrame;
  607. handle->bytesEachRead = bytesPerFrame;
  608. handle->bytesLastRead = bytesPerFrame;
  609. }
  610. else
  611. {
  612. handle->bytesEachWrite = 4;
  613. handle->bytesEachRead = 4;
  614. handle->bytesLastRead = 4;
  615. if ((transfer->dataSize % 4) != 0)
  616. {
  617. bytesLastWrite = transfer->dataSize % 4;
  618. handle->bytesLastRead = bytesLastWrite;
  619. isThereExtraTxBytes = true;
  620. --handle->writeRegRemainingTimes;
  621. handle->isThereExtraRxBytes = true;
  622. --handle->readRegRemainingTimes;
  623. }
  624. }
  625. LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  626. EDMA_SetCallback(handle->edmaRxRegToRxDataHandle, EDMA_LpspiSlaveCallback,
  627. &s_lpspiSlaveEdmaPrivateHandle[instance]);
  628. /*Rx*/
  629. if (handle->readRegRemainingTimes > 0)
  630. {
  631. EDMA_ResetChannel(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel);
  632. if (handle->rxData)
  633. {
  634. transferConfigRx.destAddr = (uint32_t) & (handle->rxData[0]);
  635. transferConfigRx.destOffset = 1;
  636. }
  637. else
  638. {
  639. transferConfigRx.destAddr = (uint32_t) & (handle->rxBuffIfNull);
  640. transferConfigRx.destOffset = 0;
  641. }
  642. transferConfigRx.destTransferSize = kEDMA_TransferSize1Bytes;
  643. dif = 0;
  644. switch (handle->bytesEachRead)
  645. {
  646. case (1U):
  647. transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
  648. transferConfigRx.minorLoopBytes = 1;
  649. if (handle->isByteSwap)
  650. {
  651. dif = 3;
  652. }
  653. break;
  654. case (2U):
  655. transferConfigRx.srcTransferSize = kEDMA_TransferSize2Bytes;
  656. transferConfigRx.minorLoopBytes = 2;
  657. if (handle->isByteSwap)
  658. {
  659. dif = 2;
  660. }
  661. break;
  662. case (4U):
  663. transferConfigRx.srcTransferSize = kEDMA_TransferSize4Bytes;
  664. transferConfigRx.minorLoopBytes = 4;
  665. break;
  666. default:
  667. transferConfigRx.srcTransferSize = kEDMA_TransferSize1Bytes;
  668. transferConfigRx.minorLoopBytes = 1;
  669. assert(false);
  670. break;
  671. }
  672. transferConfigRx.srcAddr = (uint32_t)rxAddr + dif;
  673. transferConfigRx.srcOffset = 0;
  674. transferConfigRx.majorLoopCounts = handle->readRegRemainingTimes;
  675. /* Store the initially configured eDMA minor byte transfer count into the DSPI handle */
  676. handle->nbytes = transferConfigRx.minorLoopBytes;
  677. EDMA_SetTransferConfig(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
  678. &transferConfigRx, NULL);
  679. EDMA_EnableChannelInterrupts(handle->edmaRxRegToRxDataHandle->base, handle->edmaRxRegToRxDataHandle->channel,
  680. kEDMA_MajorInterruptEnable);
  681. }
  682. /*Tx*/
  683. EDMA_ResetChannel(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel);
  684. if (isThereExtraTxBytes)
  685. {
  686. if (handle->txData)
  687. {
  688. transferConfigTx.srcAddr = (uint32_t) & (transfer->txData[transfer->dataSize - bytesLastWrite]);
  689. transferConfigTx.srcOffset = 1;
  690. }
  691. else
  692. {
  693. transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
  694. transferConfigTx.srcOffset = 0;
  695. }
  696. transferConfigTx.destOffset = 0;
  697. transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
  698. dif = 0;
  699. switch (bytesLastWrite)
  700. {
  701. case (1U):
  702. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  703. transferConfigTx.minorLoopBytes = 1;
  704. if (handle->isByteSwap)
  705. {
  706. dif = 3;
  707. }
  708. break;
  709. case (2U):
  710. transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
  711. transferConfigTx.minorLoopBytes = 2;
  712. if (handle->isByteSwap)
  713. {
  714. dif = 2;
  715. }
  716. break;
  717. default:
  718. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  719. transferConfigTx.minorLoopBytes = 1;
  720. assert(false);
  721. break;
  722. }
  723. transferConfigTx.destAddr = (uint32_t)txAddr + dif;
  724. transferConfigTx.majorLoopCounts = 1;
  725. EDMA_TcdReset(softwareTCD_extraBytes);
  726. EDMA_TcdSetTransferConfig(softwareTCD_extraBytes, &transferConfigTx, NULL);
  727. }
  728. if (handle->txData)
  729. {
  730. transferConfigTx.srcAddr = (uint32_t)(handle->txData);
  731. transferConfigTx.srcOffset = 1;
  732. }
  733. else
  734. {
  735. transferConfigTx.srcAddr = (uint32_t)(&handle->txBuffIfNull);
  736. transferConfigTx.srcOffset = 0;
  737. }
  738. transferConfigTx.destOffset = 0;
  739. transferConfigTx.srcTransferSize = kEDMA_TransferSize1Bytes;
  740. dif = 0;
  741. switch (handle->bytesEachRead)
  742. {
  743. case (1U):
  744. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  745. transferConfigTx.minorLoopBytes = 1;
  746. if (handle->isByteSwap)
  747. {
  748. dif = 3;
  749. }
  750. break;
  751. case (2U):
  752. transferConfigTx.destTransferSize = kEDMA_TransferSize2Bytes;
  753. transferConfigTx.minorLoopBytes = 2;
  754. if (handle->isByteSwap)
  755. {
  756. dif = 2;
  757. }
  758. break;
  759. case (4U):
  760. transferConfigTx.destTransferSize = kEDMA_TransferSize4Bytes;
  761. transferConfigTx.minorLoopBytes = 4;
  762. break;
  763. default:
  764. transferConfigTx.destTransferSize = kEDMA_TransferSize1Bytes;
  765. transferConfigTx.minorLoopBytes = 1;
  766. assert(false);
  767. break;
  768. }
  769. transferConfigTx.destAddr = (uint32_t)txAddr + dif;
  770. transferConfigTx.majorLoopCounts = handle->writeRegRemainingTimes;
  771. if (isThereExtraTxBytes)
  772. {
  773. EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
  774. &transferConfigTx, softwareTCD_extraBytes);
  775. }
  776. else
  777. {
  778. EDMA_SetTransferConfig(handle->edmaTxDataToTxRegHandle->base, handle->edmaTxDataToTxRegHandle->channel,
  779. &transferConfigTx, NULL);
  780. }
  781. EDMA_StartTransfer(handle->edmaTxDataToTxRegHandle);
  782. EDMA_StartTransfer(handle->edmaRxRegToRxDataHandle);
  783. LPSPI_EnableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  784. LPSPI_Enable(base, true);
  785. return kStatus_Success;
  786. }
  787. static void EDMA_LpspiSlaveCallback(edma_handle_t *edmaHandle,
  788. void *g_lpspiEdmaPrivateHandle,
  789. bool transferDone,
  790. uint32_t tcds)
  791. {
  792. assert(edmaHandle);
  793. assert(g_lpspiEdmaPrivateHandle);
  794. uint32_t readData;
  795. lpspi_slave_edma_private_handle_t *lpspiEdmaPrivateHandle;
  796. lpspiEdmaPrivateHandle = (lpspi_slave_edma_private_handle_t *)g_lpspiEdmaPrivateHandle;
  797. LPSPI_DisableDMA(lpspiEdmaPrivateHandle->base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);
  798. if (lpspiEdmaPrivateHandle->handle->isThereExtraRxBytes)
  799. {
  800. while (LPSPI_GetRxFifoCount(lpspiEdmaPrivateHandle->base) == 0)
  801. {
  802. }
  803. readData = LPSPI_ReadData(lpspiEdmaPrivateHandle->base);
  804. if (lpspiEdmaPrivateHandle->handle->rxData)
  805. {
  806. LPSPI_SeparateEdmaReadData(
  807. &(lpspiEdmaPrivateHandle->handle->rxData[lpspiEdmaPrivateHandle->handle->rxRemainingByteCount -
  808. lpspiEdmaPrivateHandle->handle->bytesLastRead]),
  809. readData, lpspiEdmaPrivateHandle->handle->bytesLastRead, lpspiEdmaPrivateHandle->handle->isByteSwap);
  810. }
  811. }
  812. lpspiEdmaPrivateHandle->handle->state = kLPSPI_Idle;
  813. if (lpspiEdmaPrivateHandle->handle->callback)
  814. {
  815. lpspiEdmaPrivateHandle->handle->callback(lpspiEdmaPrivateHandle->base, lpspiEdmaPrivateHandle->handle,
  816. kStatus_Success, lpspiEdmaPrivateHandle->handle->userData);
  817. }
  818. }
  819. void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle)
  820. {
  821. assert(handle);
  822. LPSPI_DisableDMA(base, kLPSPI_RxDmaEnable | kLPSPI_TxDmaEnable);
  823. EDMA_AbortTransfer(handle->edmaRxRegToRxDataHandle);
  824. EDMA_AbortTransfer(handle->edmaTxDataToTxRegHandle);
  825. handle->state = kLPSPI_Idle;
  826. }
  827. status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count)
  828. {
  829. assert(handle);
  830. if (!count)
  831. {
  832. return kStatus_InvalidArgument;
  833. }
  834. /* Catch when there is not an active transfer. */
  835. if (handle->state != kLPSPI_Busy)
  836. {
  837. *count = 0;
  838. return kStatus_NoTransferInProgress;
  839. }
  840. size_t remainingByte;
  841. remainingByte =
  842. (uint32_t)handle->nbytes * EDMA_GetRemainingMajorLoopCount(handle->edmaRxRegToRxDataHandle->base,
  843. handle->edmaRxRegToRxDataHandle->channel);
  844. *count = handle->totalByteCount - remainingByte;
  845. return kStatus_Success;
  846. }