drv_i2c.c 12 KB

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  1. /*
  2. * File : drv_i2c.c
  3. * COPYRIGHT (C) 2006 - 2017, RT-Thread Development Team
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along
  16. * with this program; if not, write to the Free Software Foundation, Inc.,
  17. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18. *
  19. * Change Logs:
  20. * Date Author Notes
  21. * 2017-08-08 Yang the first version
  22. */
  23. #include <rtthread.h>
  24. #include <rtdevice.h>
  25. #include "board.h"
  26. #include "fsl_iocon.h"
  27. #include "fsl_gpio.h"
  28. #include "fsl_i2c.h"
  29. #ifdef RT_USING_I2C
  30. #ifdef RT_USING_I2C_BITOPS
  31. struct lpc_i2c_bit_data
  32. {
  33. struct
  34. {
  35. GPIO_Type *base;
  36. uint32_t port;
  37. uint32_t pin;
  38. } scl, sda;
  39. };
  40. static void gpio_set_sda(void *data, rt_int32_t state)
  41. {
  42. struct lpc_i2c_bit_data *bd = data;
  43. if (state)
  44. {
  45. //bd->sda.base->B[bd->sda.port][bd->sda.pin] = 1;
  46. GPIO_WritePinOutput(bd->sda.base, bd->sda.port, bd->sda.pin, 1);
  47. }
  48. else
  49. {
  50. GPIO_WritePinOutput(bd->sda.base, bd->sda.port, bd->sda.pin, 0);
  51. }
  52. }
  53. static void gpio_set_scl(void *data, rt_int32_t state)
  54. {
  55. struct lpc_i2c_bit_data *bd = data;
  56. if (state)
  57. {
  58. //bd->scl.base->B[bd->sda.port][bd->sda.pin] = 1;
  59. GPIO_WritePinOutput(bd->scl.base, bd->scl.port, bd->scl.pin, 1);
  60. }
  61. else
  62. {
  63. //bd->scl.base->B[bd->sda.port][bd->sda.pin] = 0;
  64. GPIO_WritePinOutput(bd->scl.base, bd->scl.port, bd->scl.pin, 1);
  65. }
  66. }
  67. static rt_int32_t gpio_get_sda(void *data)
  68. {
  69. struct lpc_i2c_bit_data *bd = data;
  70. return GPIO_ReadPinInput(bd->sda.base, bd->sda.port, bd->sda.pin) & 0x01;
  71. }
  72. static rt_int32_t gpio_get_scl(void *data)
  73. {
  74. struct lpc_i2c_bit_data *bd = data;
  75. return GPIO_ReadPinInput(bd->scl.base, bd->scl.port, bd->scl.pin) & 0x01;
  76. }
  77. static void gpio_udelay(rt_uint32_t us)
  78. {
  79. volatile rt_int32_t i;
  80. for (; us > 0; us--)
  81. {
  82. i = 10;
  83. while (i--);
  84. }
  85. }
  86. #else /* RT_USING_I2C_BITOPS */
  87. #define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */
  88. #define IOCON_PIO_FUNC0 0x00u /*!< Selects pin function 0 */
  89. #define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */
  90. #define IOCON_PIO_FUNC6 0x06u /*!< Selects pin function 6 */
  91. #define IOCON_PIO_I2CDRIVE_HIGH 0x0400u /*!< High drive: 20 mA */
  92. #define IOCON_PIO_I2CFILTER_EN 0x00u /*!< I2C 50 ns glitch filter enabled */
  93. #define IOCON_PIO_I2CSLEW_I2C 0x00u /*!< I2C mode */
  94. #define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */
  95. #define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */
  96. #define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */
  97. #define IOCON_PIO_MODE_PULLUP 0x20u /*!< Selects pull-up function */
  98. #define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */
  99. #define IOCON_PIO_SLEW_FAST 0x0400u /*!< Fast mode, slew rate control is disabled */
  100. #define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */
  101. #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port 3 */
  102. #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port 3 */
  103. #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port 0 */
  104. #define PIN3_IDX 3u /*!< Pin number for pin 3 in a port 0 */
  105. #define PIN4_IDX 4u /*!< Pin number for pin 4 in a port 0 */
  106. #define PIN5_IDX 5u /*!< Pin number for pin 5 in a port 0 */
  107. #define PIN6_IDX 6u /*!< Pin number for pin 6 in a port 0 */
  108. #define PIN7_IDX 7u /*!< Pin number for pin 7 in a port 0 */
  109. #define PIN8_IDX 8u /*!< Pin number for pin 8 in a port 0 */
  110. #define PIN9_IDX 9u /*!< Pin number for pin 9 in a port 0 */
  111. #define PIN10_IDX 10u /*!< Pin number for pin 10 in a port 1 */
  112. #define PIN11_IDX 11u /*!< Pin number for pin 11 in a port 1 */
  113. #define PIN12_IDX 12u /*!< Pin number for pin 12 in a port 1 */
  114. #define PIN13_IDX 13u /*!< Pin number for pin 13 in a port 1 */
  115. #define PIN14_IDX 14u /*!< Pin number for pin 14 in a port 1 */
  116. #define PIN15_IDX 15u /*!< Pin number for pin 15 in a port 0 */
  117. #define PIN16_IDX 16u /*!< Pin number for pin 16 in a port 1 */
  118. #define PIN18_IDX 18u /*!< Pin number for pin 18 in a port 0 */
  119. #define PIN19_IDX 19u /*!< Pin number for pin 19 in a port 0 */
  120. #define PIN20_IDX 20u /*!< Pin number for pin 20 in a port 0 */
  121. #define PIN21_IDX 21u /*!< Pin number for pin 21 in a port 0 */
  122. #define PIN22_IDX 22u /*!< Pin number for pin 22 in a port 2 */
  123. #define PIN23_IDX 23u /*!< Pin number for pin 23 in a port 1 */
  124. #define PIN24_IDX 24u /*!< Pin number for pin 24 in a port 1 */
  125. #define PIN25_IDX 25u /*!< Pin number for pin 25 in a port 1 */
  126. #define PIN26_IDX 26u /*!< Pin number for pin 26 in a port 1 */
  127. #define PIN27_IDX 27u /*!< Pin number for pin 27 in a port 1 */
  128. #define PIN28_IDX 28u /*!< Pin number for pin 28 in a port 1 */
  129. #define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */
  130. #define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */
  131. #define PIN31_IDX 31u /*!< Pin number for pin 31 in a port 1 */
  132. #define PORT0_IDX 0u /*!< Port index */
  133. #define PORT1_IDX 1u /*!< Port index */
  134. #define PORT2_IDX 2u /*!< Port index */
  135. #define PORT3_IDX 3u /*!< Port index */
  136. struct lpc_i2c_bus
  137. {
  138. struct rt_i2c_bus_device parent;
  139. I2C_Type *I2C;
  140. };
  141. static rt_size_t lpc_i2c_xfer(struct rt_i2c_bus_device *bus,
  142. struct rt_i2c_msg msgs[], rt_uint32_t num)
  143. {
  144. struct rt_i2c_msg *msg;
  145. i2c_master_transfer_t xfer = {0};
  146. rt_uint32_t i;
  147. rt_err_t ret = RT_ERROR;
  148. struct lpc_i2c_bus *lpc_i2c = (struct lpc_i2c_bus *)bus;
  149. for (i = 0; i < num; i++)
  150. {
  151. msg = &msgs[i];
  152. if (msg->flags & RT_I2C_RD)
  153. {
  154. xfer.slaveAddress = msg->addr;
  155. xfer.direction = kI2C_Read;
  156. xfer.subaddress = 1;
  157. xfer.subaddressSize = 1;
  158. xfer.data = msg->buf;
  159. xfer.dataSize = msg->len;
  160. xfer.flags = kI2C_TransferDefaultFlag;
  161. if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
  162. {
  163. i2c_dbg("i2c bus write failed,i2c bus stop!\n");
  164. goto out;
  165. }
  166. }
  167. else
  168. {
  169. xfer.slaveAddress = msg->addr;
  170. xfer.direction = kI2C_Write;
  171. xfer.subaddress = 0;
  172. xfer.subaddressSize = 1;
  173. xfer.data = msg->buf;
  174. xfer.dataSize = msg->len;
  175. xfer.flags = kI2C_TransferDefaultFlag;
  176. if (I2C_MasterTransferBlocking(lpc_i2c->I2C, &xfer) != kStatus_Success)
  177. {
  178. i2c_dbg("i2c bus write failed,i2c bus stop!\n");
  179. goto out;
  180. }
  181. }
  182. }
  183. ret = i;
  184. out:
  185. i2c_dbg("send stop condition\n");
  186. return ret;
  187. }
  188. static const struct rt_i2c_bus_device_ops i2c_ops =
  189. {
  190. lpc_i2c_xfer,
  191. RT_NULL,
  192. RT_NULL
  193. };
  194. #endif /* RT_USING_I2C_BITOPS */
  195. int rt_hw_i2c_init(void)
  196. {
  197. #ifdef RT_USING_I2C_BITOPS
  198. /* register I2C1: SCL/P0_20 SDA/P0_19 */
  199. {
  200. static struct rt_i2c_bus_device i2c_device;
  201. static const struct lpc_i2c_bit_data _i2c_bdata =
  202. {
  203. /* SCL */ {GPIO, 3, 24},
  204. /* SDA */ {GPIO, 3, 23},
  205. };
  206. static const struct rt_i2c_bit_ops _i2c_bit_ops =
  207. {
  208. (void*)&_i2c_bdata,
  209. gpio_set_sda,
  210. gpio_set_scl,
  211. gpio_get_sda,
  212. gpio_get_scl,
  213. gpio_udelay,
  214. 5,
  215. 100
  216. };
  217. gpio_pin_config_t pin_config = {
  218. kGPIO_DigitalOutput, 0,
  219. };
  220. CLOCK_EnableClock(kCLOCK_Gpio3);
  221. /* Enable touch panel controller */
  222. GPIO_PinInit(GPIO, _i2c_bdata.sda.port, _i2c_bdata.sda.pin, &pin_config);
  223. GPIO_PinInit(GPIO, _i2c_bdata.scl.port, _i2c_bdata.scl.pin, &pin_config);
  224. i2c_device.priv = (void *)&_i2c_bit_ops;
  225. rt_i2c_bit_add_bus(&i2c_device, "i2c2");
  226. } /* register I2C */
  227. #else /* RT_USING_I2C_BITOPS */
  228. static struct lpc_i2c_bus lpc_i2c2;
  229. /* attach 12 MHz clock to FLEXCOMM2 (I2C master for touch controller) */
  230. CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
  231. const uint32_t port3_pin23_config = (
  232. IOCON_PIO_FUNC1 | /* Pin is configured as FC2_CTS_SDA_SSEL0 */
  233. IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
  234. IOCON_PIO_INV_DI | /* Input function is not inverted */
  235. IOCON_PIO_DIGITAL_EN | /* Enables digital function */
  236. IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
  237. IOCON_PIO_I2CDRIVE_HIGH | /* High drive: 20 mA */
  238. IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
  239. );
  240. IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN23_IDX, port3_pin23_config); /* PORT3 PIN23 (coords: C2) is configured as FC2_CTS_SDA_SSEL0 */
  241. const uint32_t port3_pin24_config = (
  242. IOCON_PIO_FUNC1 | /* Pin is configured as FC2_RTS_SCL_SSEL1 */
  243. IOCON_PIO_I2CSLEW_I2C | /* I2C mode */
  244. IOCON_PIO_INV_DI | /* Input function is not inverted */
  245. IOCON_PIO_DIGITAL_EN | /* Enables digital function */
  246. IOCON_PIO_INPFILT_OFF | /* Input filter disabled */
  247. IOCON_PIO_I2CDRIVE_HIGH | /* High drive: 20 mA */
  248. IOCON_PIO_I2CFILTER_EN /* I2C 50 ns glitch filter enabled */
  249. );
  250. IOCON_PinMuxSet(IOCON, PORT3_IDX, PIN24_IDX, port3_pin24_config); /* PORT3 PIN24 (coords: E2) is configured as FC2_RTS_SCL_SSEL1 */
  251. {
  252. i2c_master_config_t masterConfig;
  253. I2C_MasterGetDefaultConfig(&masterConfig);
  254. /* Change the default baudrate configuration */
  255. masterConfig.baudRate_Bps = 100000U;
  256. /* Initialize the I2C master peripheral */
  257. I2C_MasterInit(I2C2, &masterConfig, 12000000);
  258. }
  259. rt_memset((void *)&lpc_i2c2, 0, sizeof(struct lpc_i2c_bus));
  260. lpc_i2c2.parent.ops = &i2c_ops;
  261. lpc_i2c2.I2C = I2C2;
  262. rt_i2c_bus_device_register(&lpc_i2c2.parent, "i2c2");
  263. #endif /* RT_USING_I2C_BITOPS */
  264. return 0;
  265. }
  266. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  267. #endif /* RT_USING_I2C */