dac.h 9.4 KB

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  1. /******************************************************************************
  2. * @file dac.h
  3. * @version V0.10
  4. * $Revision: 12 $
  5. * $Date: 15/08/11 10:26a $
  6. * @brief M451 series DAC driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
  10. *****************************************************************************/
  11. #ifndef __DAC_H__
  12. #define __DAC_H__
  13. /*---------------------------------------------------------------------------------------------------------*/
  14. /* Include related headers */
  15. /*---------------------------------------------------------------------------------------------------------*/
  16. #include "M451Series.h"
  17. #ifdef __cplusplus
  18. extern "C"
  19. {
  20. #endif
  21. /** @addtogroup Standard_Driver Standard Driver
  22. @{
  23. */
  24. /** @addtogroup DAC_Driver DAC Driver
  25. @{
  26. */
  27. /** @addtogroup DAC_EXPORTED_CONSTANTS DAC Exported Constants
  28. @{
  29. */
  30. /*---------------------------------------------------------------------------------------------------------*/
  31. /* DAC_CTL Constant Definitions */
  32. /*---------------------------------------------------------------------------------------------------------*/
  33. #define DAC_CTL_LALIGN_RIGHT_ALIGN (0UL<<DAC_CTL_LALIGN_Pos) /*!< Right alignment. */
  34. #define DAC_CTL_LALIGN_LEFT_ALIGN (1UL<<DAC_CTL_LALIGN_Pos) /*!< Left alignment */
  35. #define DAC_WRITE_DAT_TRIGGER (0UL) /*!< Write DAC_DAT trigger */
  36. #define DAC_SOFTWARE_TRIGGER (0UL|DAC_CTL_TRGEN_Msk) /*!< Software trigger */
  37. #define DAC_LOW_LEVEL_TRIGGER ((0UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin low level trigger */
  38. #define DAC_HIGH_LEVEL_TRIGGER ((1UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin high level trigger */
  39. #define DAC_FALLING_EDGE_TRIGGER ((2UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin falling edge trigger */
  40. #define DAC_RISING_EDGE_TRIGGER ((3UL<<DAC_CTL_ETRGSEL_Pos)|(1UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< STDAC pin rising edge trigger */
  41. #define DAC_TIMER0_TRIGGER ((2UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 0 trigger */
  42. #define DAC_TIMER1_TRIGGER ((3UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 1 trigger */
  43. #define DAC_TIMER2_TRIGGER ((4UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 2 trigger */
  44. #define DAC_TIMER3_TRIGGER ((5UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< Timer 3 trigger */
  45. #define DAC_PWM0_TRIGGER ((6UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< PWM0 trigger */
  46. #define DAC_PWM1_TRIGGER ((7UL<<DAC_CTL_TRGSEL_Pos)|DAC_CTL_TRGEN_Msk) /*!< PWM1 trigger */
  47. #define DAC_TRIGGER_MODE_DISABLE (0UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode disable */
  48. #define DAC_TRIGGER_MODE_ENABLE (1UL<<DAC_CTL_TRGEN_Pos) /*!< Trigger mode enable */
  49. /*@}*/ /* end of group DAC_EXPORTED_CONSTANTS */
  50. /** @addtogroup DAC_EXPORTED_FUNCTIONS DAC Exported Functions
  51. @{
  52. */
  53. /*---------------------------------------------------------------------------------------------------------*/
  54. /* DAC Macro Definitions */
  55. /*---------------------------------------------------------------------------------------------------------*/
  56. /**
  57. * @brief Start the D/A conversion.
  58. * @param[in] dac Base address of DAC module.
  59. * @return None
  60. * @details User writes SWTRG bit (DAC_SWTRG[0]) to generate one shot pulse and it is cleared to 0 by hardware automatically.
  61. */
  62. #define DAC_START_CONV(dac) ((dac)->SWTRG = DAC_SWTRG_SWTRG_Msk)
  63. /**
  64. * @brief Enable DAC data left-aligned.
  65. * @param[in] dac Base address of DAC module.
  66. * @return None
  67. * @details User has to load data into DAC_DAT[15:4] bits. DAC_DAT[31:16] and DAC_DAT[3:0] are ignored in DAC conversion.
  68. */
  69. #define DAC_ENABLE_LEFT_ALIGN(dac) ((dac)->CTL |= DAC_CTL_LALIGN_Msk)
  70. /**
  71. * @brief Enable DAC data right-aligned.
  72. * @param[in] dac Base address of DAC module.
  73. * @return None
  74. * @details User has to load data into DAC_DAT[11:0] bits, DAC_DAT[31:12] are ignored in DAC conversion.
  75. */
  76. #define DAC_ENABLE_RIGHT_ALIGN(dac) ((dac)->CTL &= ~DAC_CTL_LALIGN_Msk)
  77. /**
  78. * @brief Enable output voltage buffer.
  79. * @param[in] dac Base address of DAC module.
  80. * @return None
  81. * @details The DAC integrates a voltage output buffer that can be used to reduce output impedance and
  82. * drive external loads directly without having to add an external operational amplifier.
  83. */
  84. #define DAC_ENABLE_BYPASS_BUFFER(dac) ((dac)->CTL |= DAC_CTL_BYPASS_Msk)
  85. /**
  86. * @brief Disable output voltage buffer.
  87. * @param[in] dac Base address of DAC module.
  88. * @return None
  89. * @details This macro is used to disable output voltage buffer.
  90. */
  91. #define DAC_DISABLE_BYPASS_BUFFER(dac) ((dac)->CTL &= ~DAC_CTL_BYPASS_Msk)
  92. /**
  93. * @brief Enable the interrupt.
  94. * @param[in] dac Base address of DAC module.
  95. * @param[in] u32Ch Not used in M451 Series DAC.
  96. * @return None
  97. * @details This macro is used to enable DAC interrupt.
  98. */
  99. #define DAC_ENABLE_INT(dac, u32Ch) ((dac)->CTL |= DAC_CTL_DACIEN_Msk)
  100. /**
  101. * @brief Disable the interrupt.
  102. * @param[in] dac Base address of DAC module.
  103. * @param[in] u32Ch Not used in M451 Series DAC.
  104. * @return None
  105. * @details This macro is used to disable DAC interrupt.
  106. */
  107. #define DAC_DISABLE_INT(dac, u32Ch) ((dac)->CTL &= ~DAC_CTL_DACIEN_Msk)
  108. /**
  109. * @brief Enable DMA under-run interrupt.
  110. * @param[in] dac Base address of DAC module.
  111. * @return None
  112. * @details This macro is used to enable DMA under-run interrupt.
  113. */
  114. #define DAC_ENABLE_DMAUDR_INT(dac) ((dac)->CTL |= DAC_CTL_DMAURIEN_Msk)
  115. /**
  116. * @brief Disable DMA under-run interrupt.
  117. * @param[in] dac Base address of DAC module.
  118. * @return None
  119. * @details This macro is used to disable DMA under-run interrupt.
  120. */
  121. #define DAC_DISABLE_DMAUDR_INT(dac) ((dac)->CTL &= ~DAC_CTL_DMAURIEN_Msk)
  122. /**
  123. * @brief Enable PDMA mode.
  124. * @param[in] dac Base address of DAC module.
  125. * @return None
  126. * @details DAC DMA request is generated when a hardware trigger event occurs while DMAEN (DAC_CTL[2]) is set.
  127. */
  128. #define DAC_ENABLE_PDMA(dac) ((dac)->CTL |= DAC_CTL_DMAEN_Msk)
  129. /**
  130. * @brief Disable PDMA mode.
  131. * @param[in] dac Base address of DAC module.
  132. * @return None
  133. * @details This macro is used to disable DMA mode.
  134. */
  135. #define DAC_DISABLE_PDMA(dac) ((dac)->CTL &= ~DAC_CTL_DMAEN_Msk)
  136. /**
  137. * @brief Write data for conversion.
  138. * @param[in] dac Base address of DAC module.
  139. * @param[in] u32Ch Not used in M451 Series DAC.
  140. * @param[in] u32Data Decides the data for conversion, valid range are between 0~0xFFF.
  141. * @return None
  142. * @details 12 bit left alignment: user has to load data into DAC_DAT[15:4] bits.
  143. * 12 bit right alignment: user has to load data into DAC_DAT[11:0] bits.
  144. */
  145. #define DAC_WRITE_DATA(dac, u32Ch, u32Data) ((dac)->DAT = (u32Data))
  146. /**
  147. * @brief Read DAC 12-bit holding data.
  148. * @param[in] dac Base address of DAC module.
  149. * @param[in] u32Ch Not used in M451 Series DAC.
  150. * @return Return DAC 12-bit holding data.
  151. * @details This macro is used to read DAC_DAT register.
  152. */
  153. #define DAC_READ_DATA(dac, u32Ch) ((dac)->DAT)
  154. /**
  155. * @brief Get the busy state of DAC.
  156. * @param[in] dac Base address of DAC module.
  157. * @param[in] u32Ch Not used in M451 Series DAC.
  158. * @retval 0 Idle state.
  159. * @retval 1 Busy state.
  160. * @details This macro is used to read BUSY bit (DAC_STATUS[8]) to get busy state.
  161. */
  162. #define DAC_IS_BUSY(dac, u32Ch) (((dac)->STATUS & DAC_STATUS_BUSY_Msk) >> DAC_STATUS_BUSY_Pos)
  163. /**
  164. * @brief Get the interrupt flag.
  165. * @param[in] dac Base address of DAC module.
  166. * @param[in] u32Ch Not used in M451 Series DAC.
  167. * @retval 0 DAC is in conversion state.
  168. * @retval 1 DAC conversion finish.
  169. * @details This macro is used to read FINISH bit (DAC_STATUS[0]) to get DAC conversion complete finish flag.
  170. */
  171. #define DAC_GET_INT_FLAG(dac, u32Ch) ((dac)->STATUS & DAC_STATUS_FINISH_Msk)
  172. /**
  173. * @brief Get the DMA under-run flag.
  174. * @param[in] dac Base address of DAC module.
  175. * @retval 0 No DMA under-run error condition occurred.
  176. * @retval 1 DMA under-run error condition occurred.
  177. * @details This macro is used to read DMAUDR bit (DAC_STATUS[1]) to get DMA under-run state.
  178. */
  179. #define DAC_GET_DMAUDR_FLAG(dac) (((dac)->STATUS & DAC_STATUS_DMAUDR_Msk) >> DAC_STATUS_DMAUDR_Pos)
  180. /**
  181. * @brief This macro clear the interrupt status bit.
  182. * @param[in] dac Base address of DAC module.
  183. * @param[in] u32Ch Not used in M451 Series DAC.
  184. * @return None
  185. * @details User writes FINISH bit (DAC_STATUS[0]) to clear DAC conversion complete finish flag.
  186. */
  187. #define DAC_CLR_INT_FLAG(dac, u32Ch) ((dac)->STATUS = DAC_STATUS_FINISH_Msk)
  188. /**
  189. * @brief This macro clear the DMA under-run flag.
  190. * @param[in] dac Base address of DAC module.
  191. * @return None
  192. * @details User writes DMAUDR bit (DAC_STATUS[1]) to clear DMA under-run flag.
  193. */
  194. #define DAC_CLR_DMAUDR_FLAG(dac) ((dac)->STATUS = DAC_STATUS_DMAUDR_Msk)
  195. void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc);
  196. void DAC_Close(DAC_T *dac, uint32_t u32Ch);
  197. float DAC_SetDelayTime(DAC_T *dac, uint32_t u16Delay);
  198. /*@}*/ /* end of group DAC_EXPORTED_FUNCTIONS */
  199. /*@}*/ /* end of group DAC_Driver */
  200. /*@}*/ /* end of group Standard_Driver */
  201. #ifdef __cplusplus
  202. }
  203. #endif
  204. #endif //__DAC_H__
  205. /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/