gpio.h 22 KB

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  1. /**************************************************************************//**
  2. * @file GPIO.h
  3. * @version V3.00
  4. * $Revision: 21 $
  5. * $Date: 15/08/11 10:26a $
  6. * @brief M451 series GPIO driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2011~2015 Nuvoton Technology Corp. All rights reserved.
  10. *
  11. ******************************************************************************/
  12. #ifndef __GPIO_H__
  13. #define __GPIO_H__
  14. #ifdef __cplusplus
  15. extern "C"
  16. {
  17. #endif
  18. /** @addtogroup Standard_Driver Standard Driver
  19. @{
  20. */
  21. /** @addtogroup GPIO_Driver GPIO Driver
  22. @{
  23. */
  24. /** @addtogroup GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
  25. @{
  26. */
  27. #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port */
  28. /*---------------------------------------------------------------------------------------------------------*/
  29. /* GPIO_MODE Constant Definitions */
  30. /*---------------------------------------------------------------------------------------------------------*/
  31. #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */
  32. #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */
  33. #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */
  34. #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */
  35. /*---------------------------------------------------------------------------------------------------------*/
  36. /* GPIO Interrupt Type Constant Definitions */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */
  39. #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */
  40. #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */
  41. #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */
  42. #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */
  43. /*---------------------------------------------------------------------------------------------------------*/
  44. /* GPIO_INTTYPE Constant Definitions */
  45. /*---------------------------------------------------------------------------------------------------------*/
  46. #define GPIO_INTTYPE_EDGE 0UL /*!< GPIO_INTTYPE Setting for Edge Trigger Mode */
  47. #define GPIO_INTTYPE_LEVEL 1UL /*!< GPIO_INTTYPE Setting for Edge Level Mode */
  48. /*---------------------------------------------------------------------------------------------------------*/
  49. /* GPIO_DBCTL Constant Definitions */
  50. /*---------------------------------------------------------------------------------------------------------*/
  51. #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< GPIO_DBCTL setting for all IO pins edge detection circuit is always active after reset */
  52. #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< GPIO_DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */
  53. #define GPIO_DBCTL_DBCLKSRC_LIRC 0x00000010UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the internal 10 kHz */
  54. #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< GPIO_DBCTL setting for de-bounce counter clock source is the HCLK */
  55. #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< GPIO_DBCTL setting for sampling cycle = 1 clocks */
  56. #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< GPIO_DBCTL setting for sampling cycle = 2 clocks */
  57. #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< GPIO_DBCTL setting for sampling cycle = 4 clocks */
  58. #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< GPIO_DBCTL setting for sampling cycle = 8 clocks */
  59. #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< GPIO_DBCTL setting for sampling cycle = 16 clocks */
  60. #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< GPIO_DBCTL setting for sampling cycle = 32 clocks */
  61. #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< GPIO_DBCTL setting for sampling cycle = 64 clocks */
  62. #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< GPIO_DBCTL setting for sampling cycle = 128 clocks */
  63. #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< GPIO_DBCTL setting for sampling cycle = 256 clocks */
  64. #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< GPIO_DBCTL setting for sampling cycle = 512 clocks */
  65. #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< GPIO_DBCTL setting for sampling cycle = 1024 clocks */
  66. #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< GPIO_DBCTL setting for sampling cycle = 2048 clocks */
  67. #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< GPIO_DBCTL setting for sampling cycle = 4096 clocks */
  68. #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< GPIO_DBCTL setting for sampling cycle = 8192 clocks */
  69. #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< GPIO_DBCTL setting for sampling cycle = 16384 clocks */
  70. #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< GPIO_DBCTL setting for sampling cycle = 32768 clocks */
  71. /* Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
  72. Example 1:
  73. PA0 = 1;
  74. It is used to set GPIO PA.0 to high;
  75. Example 2:
  76. if (PA0)
  77. PA0 = 0;
  78. If GPIO PA.0 pin status is high, then set GPIO PA.0 data output to low.
  79. */
  80. #define GPIO_PIN_DATA(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2))))
  81. #define PA0 GPIO_PIN_DATA(0, 0 ) /*!< Specify PA.0 Pin Data Input/Output */
  82. #define PA1 GPIO_PIN_DATA(0, 1 ) /*!< Specify PA.1 Pin Data Input/Output */
  83. #define PA2 GPIO_PIN_DATA(0, 2 ) /*!< Specify PA.2 Pin Data Input/Output */
  84. #define PA3 GPIO_PIN_DATA(0, 3 ) /*!< Specify PA.3 Pin Data Input/Output */
  85. #define PA4 GPIO_PIN_DATA(0, 4 ) /*!< Specify PA.4 Pin Data Input/Output */
  86. #define PA5 GPIO_PIN_DATA(0, 5 ) /*!< Specify PA.5 Pin Data Input/Output */
  87. #define PA6 GPIO_PIN_DATA(0, 6 ) /*!< Specify PA.6 Pin Data Input/Output */
  88. #define PA7 GPIO_PIN_DATA(0, 7 ) /*!< Specify PA.7 Pin Data Input/Output */
  89. #define PA8 GPIO_PIN_DATA(0, 8 ) /*!< Specify PA.8 Pin Data Input/Output */
  90. #define PA9 GPIO_PIN_DATA(0, 9 ) /*!< Specify PA.9 Pin Data Input/Output */
  91. #define PA10 GPIO_PIN_DATA(0, 10) /*!< Specify PA.10 Pin Data Input/Output */
  92. #define PA11 GPIO_PIN_DATA(0, 11) /*!< Specify PA.11 Pin Data Input/Output */
  93. #define PA12 GPIO_PIN_DATA(0, 12) /*!< Specify PA.12 Pin Data Input/Output */
  94. #define PA13 GPIO_PIN_DATA(0, 13) /*!< Specify PA.13 Pin Data Input/Output */
  95. #define PA14 GPIO_PIN_DATA(0, 14) /*!< Specify PA.14 Pin Data Input/Output */
  96. #define PA15 GPIO_PIN_DATA(0, 15) /*!< Specify PA.15 Pin Data Input/Output */
  97. #define PB0 GPIO_PIN_DATA(1, 0 ) /*!< Specify PB.0 Pin Data Input/Output */
  98. #define PB1 GPIO_PIN_DATA(1, 1 ) /*!< Specify PB.1 Pin Data Input/Output */
  99. #define PB2 GPIO_PIN_DATA(1, 2 ) /*!< Specify PB.2 Pin Data Input/Output */
  100. #define PB3 GPIO_PIN_DATA(1, 3 ) /*!< Specify PB.3 Pin Data Input/Output */
  101. #define PB4 GPIO_PIN_DATA(1, 4 ) /*!< Specify PB.4 Pin Data Input/Output */
  102. #define PB5 GPIO_PIN_DATA(1, 5 ) /*!< Specify PB.5 Pin Data Input/Output */
  103. #define PB6 GPIO_PIN_DATA(1, 6 ) /*!< Specify PB.6 Pin Data Input/Output */
  104. #define PB7 GPIO_PIN_DATA(1, 7 ) /*!< Specify PB.7 Pin Data Input/Output */
  105. #define PB8 GPIO_PIN_DATA(1, 8 ) /*!< Specify PB.8 Pin Data Input/Output */
  106. #define PB9 GPIO_PIN_DATA(1, 9 ) /*!< Specify PB.9 Pin Data Input/Output */
  107. #define PB10 GPIO_PIN_DATA(1, 10) /*!< Specify PB.10 Pin Data Input/Output */
  108. #define PB11 GPIO_PIN_DATA(1, 11) /*!< Specify PB.11 Pin Data Input/Output */
  109. #define PB12 GPIO_PIN_DATA(1, 12) /*!< Specify PB.12 Pin Data Input/Output */
  110. #define PB13 GPIO_PIN_DATA(1, 13) /*!< Specify PB.13 Pin Data Input/Output */
  111. #define PB14 GPIO_PIN_DATA(1, 14) /*!< Specify PB.14 Pin Data Input/Output */
  112. #define PB15 GPIO_PIN_DATA(1, 15) /*!< Specify PB.15 Pin Data Input/Output */
  113. #define PC0 GPIO_PIN_DATA(2, 0 ) /*!< Specify PC.0 Pin Data Input/Output */
  114. #define PC1 GPIO_PIN_DATA(2, 1 ) /*!< Specify PC.1 Pin Data Input/Output */
  115. #define PC2 GPIO_PIN_DATA(2, 2 ) /*!< Specify PC.2 Pin Data Input/Output */
  116. #define PC3 GPIO_PIN_DATA(2, 3 ) /*!< Specify PC.3 Pin Data Input/Output */
  117. #define PC4 GPIO_PIN_DATA(2, 4 ) /*!< Specify PC.4 Pin Data Input/Output */
  118. #define PC5 GPIO_PIN_DATA(2, 5 ) /*!< Specify PC.5 Pin Data Input/Output */
  119. #define PC6 GPIO_PIN_DATA(2, 6 ) /*!< Specify PC.6 Pin Data Input/Output */
  120. #define PC7 GPIO_PIN_DATA(2, 7 ) /*!< Specify PC.7 Pin Data Input/Output */
  121. #define PC8 GPIO_PIN_DATA(2, 8 ) /*!< Specify PC.8 Pin Data Input/Output */
  122. #define PC9 GPIO_PIN_DATA(2, 9 ) /*!< Specify PC.9 Pin Data Input/Output */
  123. #define PC10 GPIO_PIN_DATA(2, 10) /*!< Specify PC.10 Pin Data Input/Output */
  124. #define PC11 GPIO_PIN_DATA(2, 11) /*!< Specify PC.11 Pin Data Input/Output */
  125. #define PC12 GPIO_PIN_DATA(2, 12) /*!< Specify PC.12 Pin Data Input/Output */
  126. #define PC13 GPIO_PIN_DATA(2, 13) /*!< Specify PC.13 Pin Data Input/Output */
  127. #define PC14 GPIO_PIN_DATA(2, 14) /*!< Specify PC.14 Pin Data Input/Output */
  128. #define PC15 GPIO_PIN_DATA(2, 15) /*!< Specify PC.15 Pin Data Input/Output */
  129. #define PD0 GPIO_PIN_DATA(3, 0 ) /*!< Specify PD.0 Pin Data Input/Output */
  130. #define PD1 GPIO_PIN_DATA(3, 1 ) /*!< Specify PD.1 Pin Data Input/Output */
  131. #define PD2 GPIO_PIN_DATA(3, 2 ) /*!< Specify PD.2 Pin Data Input/Output */
  132. #define PD3 GPIO_PIN_DATA(3, 3 ) /*!< Specify PD.3 Pin Data Input/Output */
  133. #define PD4 GPIO_PIN_DATA(3, 4 ) /*!< Specify PD.4 Pin Data Input/Output */
  134. #define PD5 GPIO_PIN_DATA(3, 5 ) /*!< Specify PD.5 Pin Data Input/Output */
  135. #define PD6 GPIO_PIN_DATA(3, 6 ) /*!< Specify PD.6 Pin Data Input/Output */
  136. #define PD7 GPIO_PIN_DATA(3, 7 ) /*!< Specify PD.7 Pin Data Input/Output */
  137. #define PD8 GPIO_PIN_DATA(3, 8 ) /*!< Specify PD.8 Pin Data Input/Output */
  138. #define PD9 GPIO_PIN_DATA(3, 9 ) /*!< Specify PD.9 Pin Data Input/Output */
  139. #define PD10 GPIO_PIN_DATA(3, 10) /*!< Specify PD.10 Pin Data Input/Output */
  140. #define PD11 GPIO_PIN_DATA(3, 11) /*!< Specify PD.11 Pin Data Input/Output */
  141. #define PD12 GPIO_PIN_DATA(3, 12) /*!< Specify PD.12 Pin Data Input/Output */
  142. #define PD13 GPIO_PIN_DATA(3, 13) /*!< Specify PD.13 Pin Data Input/Output */
  143. #define PD14 GPIO_PIN_DATA(3, 14) /*!< Specify PD.14 Pin Data Input/Output */
  144. #define PD15 GPIO_PIN_DATA(3, 15) /*!< Specify PD.15 Pin Data Input/Output */
  145. #define PE0 GPIO_PIN_DATA(4, 0 ) /*!< Specify PE.0 Pin Data Input/Output */
  146. #define PE1 GPIO_PIN_DATA(4, 1 ) /*!< Specify PE.1 Pin Data Input/Output */
  147. #define PE2 GPIO_PIN_DATA(4, 2 ) /*!< Specify PE.2 Pin Data Input/Output */
  148. #define PE3 GPIO_PIN_DATA(4, 3 ) /*!< Specify PE.3 Pin Data Input/Output */
  149. #define PE4 GPIO_PIN_DATA(4, 4 ) /*!< Specify PE.4 Pin Data Input/Output */
  150. #define PE5 GPIO_PIN_DATA(4, 5 ) /*!< Specify PE.5 Pin Data Input/Output */
  151. #define PE6 GPIO_PIN_DATA(4, 6 ) /*!< Specify PE.6 Pin Data Input/Output */
  152. #define PE7 GPIO_PIN_DATA(4, 7 ) /*!< Specify PE.7 Pin Data Input/Output */
  153. #define PE8 GPIO_PIN_DATA(4, 8 ) /*!< Specify PE.8 Pin Data Input/Output */
  154. #define PE9 GPIO_PIN_DATA(4, 9 ) /*!< Specify PE.9 Pin Data Input/Output */
  155. #define PE10 GPIO_PIN_DATA(4, 10) /*!< Specify PE.10 Pin Data Input/Output */
  156. #define PE11 GPIO_PIN_DATA(4, 11) /*!< Specify PE.11 Pin Data Input/Output */
  157. #define PE12 GPIO_PIN_DATA(4, 12) /*!< Specify PE.12 Pin Data Input/Output */
  158. #define PE13 GPIO_PIN_DATA(4, 13) /*!< Specify PE.13 Pin Data Input/Output */
  159. #define PE14 GPIO_PIN_DATA(4, 14) /*!< Specify PE.14 Pin Data Input/Output */
  160. #define PF0 GPIO_PIN_DATA(5, 0 ) /*!< Specify PF.0 Pin Data Input/Output */
  161. #define PF1 GPIO_PIN_DATA(5, 1 ) /*!< Specify PF.1 Pin Data Input/Output */
  162. #define PF2 GPIO_PIN_DATA(5, 2 ) /*!< Specify PF.2 Pin Data Input/Output */
  163. #define PF3 GPIO_PIN_DATA(5, 3 ) /*!< Specify PF.3 Pin Data Input/Output */
  164. #define PF4 GPIO_PIN_DATA(5, 4 ) /*!< Specify PF.4 Pin Data Input/Output */
  165. #define PF5 GPIO_PIN_DATA(5, 5 ) /*!< Specify PF.5 Pin Data Input/Output */
  166. #define PF6 GPIO_PIN_DATA(5, 6 ) /*!< Specify PF.6 Pin Data Input/Output */
  167. #define PF7 GPIO_PIN_DATA(5, 7 ) /*!< Specify PF.7 Pin Data Input/Output */
  168. /*@}*/ /* end of group GPIO_EXPORTED_CONSTANTS */
  169. /** @addtogroup GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
  170. @{
  171. */
  172. /**
  173. * @brief Clear GPIO Pin Interrupt Flag
  174. *
  175. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  176. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  177. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  178. * It could be BIT0 ~ BIT14 for PE.
  179. * It could be BIT0 ~ BIT7 for PF.
  180. *
  181. * @return None
  182. *
  183. * @details Clear the interrupt status of specified GPIO pin.
  184. */
  185. #define GPIO_CLR_INT_FLAG(port, u32PinMask) ((port)->INTSRC = (u32PinMask))
  186. /**
  187. * @brief Disable Pin De-bounce Function
  188. *
  189. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  190. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  191. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  192. * It could be BIT0 ~ BIT14 for PE.
  193. * It could be BIT0 ~ BIT7 for PF.
  194. *
  195. * @return None
  196. *
  197. * @details Disable the interrupt de-bounce function of specified GPIO pin.
  198. */
  199. #define GPIO_DISABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN &= ~(u32PinMask))
  200. /**
  201. * @brief Enable Pin De-bounce Function
  202. *
  203. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  204. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  205. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  206. * It could be BIT0 ~ BIT14 for PE.
  207. * It could be BIT0 ~ BIT7 for PF.
  208. * @return None
  209. *
  210. * @details Enable the interrupt de-bounce function of specified GPIO pin.
  211. */
  212. #define GPIO_ENABLE_DEBOUNCE(port, u32PinMask) ((port)->DBEN |= (u32PinMask))
  213. /**
  214. * @brief Disable I/O Digital Input Path
  215. *
  216. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  217. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  218. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  219. * It could be BIT0 ~ BIT14 for PE.
  220. * It could be BIT0 ~ BIT7 for PF.
  221. *
  222. * @return None
  223. *
  224. * @details Disable I/O digital input path of specified GPIO pin.
  225. */
  226. #define GPIO_DISABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF |= ((u32PinMask)<<16))
  227. /**
  228. * @brief Enable I/O Digital Input Path
  229. *
  230. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  231. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  232. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  233. * It could be BIT0 ~ BIT14 for PE.
  234. * It could be BIT0 ~ BIT7 for PF.
  235. *
  236. * @return None
  237. *
  238. * @details Enable I/O digital input path of specified GPIO pin.
  239. */
  240. #define GPIO_ENABLE_DIGITAL_PATH(port, u32PinMask) ((port)->DINOFF &= ~((u32PinMask)<<16))
  241. /**
  242. * @brief Disable I/O DOUT mask
  243. *
  244. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  245. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  246. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  247. * It could be BIT0 ~ BIT14 for PE.
  248. * It could be BIT0 ~ BIT7 for PF.
  249. *
  250. * @return None
  251. *
  252. * @details Disable I/O DOUT mask of specified GPIO pin.
  253. */
  254. #define GPIO_DISABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK &= ~(u32PinMask))
  255. /**
  256. * @brief Enable I/O DOUT mask
  257. *
  258. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  259. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  260. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  261. * It could be BIT0 ~ BIT14 for PE.
  262. * It could be BIT0 ~ BIT7 for PF.
  263. *
  264. * @return None
  265. *
  266. * @details Enable I/O DOUT mask of specified GPIO pin.
  267. */
  268. #define GPIO_ENABLE_DOUT_MASK(port, u32PinMask) ((port)->DATMSK |= (u32PinMask))
  269. /**
  270. * @brief Get GPIO Pin Interrupt Flag
  271. *
  272. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  273. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  274. * It could be BIT0 ~ BIT15 for PA, PB, PC and PD.
  275. * It could be BIT0 ~ BIT14 for PE.
  276. * It could be BIT0 ~ BIT7 for PF.
  277. *
  278. * @retval 0 No interrupt at specified GPIO pin
  279. * @retval 1 The specified GPIO pin generate an interrupt
  280. *
  281. * @details Get the interrupt status of specified GPIO pin.
  282. */
  283. #define GPIO_GET_INT_FLAG(port, u32PinMask) ((port)->INTSRC & (u32PinMask))
  284. /**
  285. * @brief Set De-bounce Sampling Cycle Time
  286. *
  287. * @param[in] u32ClkSrc The de-bounce counter clock source. It could be GPIO_DBCTL_DBCLKSRC_HCLK or GPIO_DBCTL_DBCLKSRC_LIRC.
  288. * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be
  289. * - \ref GPIO_DBCTL_DBCLKSEL_1
  290. * - \ref GPIO_DBCTL_DBCLKSEL_2
  291. * - \ref GPIO_DBCTL_DBCLKSEL_4
  292. * - \ref GPIO_DBCTL_DBCLKSEL_8
  293. * - \ref GPIO_DBCTL_DBCLKSEL_16
  294. * - \ref GPIO_DBCTL_DBCLKSEL_32
  295. * - \ref GPIO_DBCTL_DBCLKSEL_64
  296. * - \ref GPIO_DBCTL_DBCLKSEL_128
  297. * - \ref GPIO_DBCTL_DBCLKSEL_256
  298. * - \ref GPIO_DBCTL_DBCLKSEL_512
  299. * - \ref GPIO_DBCTL_DBCLKSEL_1024
  300. * - \ref GPIO_DBCTL_DBCLKSEL_2048
  301. * - \ref GPIO_DBCTL_DBCLKSEL_4096
  302. * - \ref GPIO_DBCTL_DBCLKSEL_8192
  303. * - \ref GPIO_DBCTL_DBCLKSEL_16384
  304. * - \ref GPIO_DBCTL_DBCLKSEL_32768
  305. *
  306. * @return None
  307. *
  308. * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
  309. * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_LIRC, GPIO_DBCTL_DBCLKSEL_4). \n
  310. * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
  311. * Then the target de-bounce sampling cycle time is (4)*(1/(10*1000)) s = 4*0.0001 s = 400 us,
  312. * and system will sampling interrupt input once per 00 us.
  313. */
  314. #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | (u32ClkSrc) | (u32ClkSel)))
  315. /**
  316. * @brief Get GPIO Port IN Data
  317. *
  318. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  319. *
  320. * @return The specified port data
  321. *
  322. * @details Get the PIN register of specified GPIO port.
  323. */
  324. #define GPIO_GET_IN_DATA(port) ((port)->PIN)
  325. /**
  326. * @brief Set GPIO Port OUT Data
  327. *
  328. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  329. * @param[in] u32Data GPIO port data.
  330. *
  331. * @return None
  332. *
  333. * @details Set the Data into specified GPIO port.
  334. */
  335. #define GPIO_SET_OUT_DATA(port, u32Data) ((port)->DOUT = (u32Data))
  336. /**
  337. * @brief Toggle Specified GPIO pin
  338. *
  339. * @param[in] u32Pin Pxy
  340. *
  341. * @return None
  342. *
  343. * @details Toggle the specified GPIO pint.
  344. */
  345. #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
  346. /**
  347. * @brief Enable External GPIO interrupt
  348. *
  349. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  350. * @param[in] u32Pin The pin of specified GPIO port.
  351. * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
  352. * It could be 0 ~ 14 for PE GPIO port.
  353. * It could be 0 ~ 7 for PF GPIO port.
  354. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  355. * GPIO_INT_RISING, GPIO_INT_FALLING, GPIO_INT_BOTH_EDGE, GPIO_INT_HIGH, GPIO_INT_LOW.
  356. *
  357. * @return None
  358. *
  359. * @details This function is used to enable specified GPIO pin interrupt.
  360. */
  361. #define GPIO_EnableEINT GPIO_EnableInt
  362. /**
  363. * @brief Disable External GPIO interrupt
  364. *
  365. * @param[in] port GPIO port. It could be PA, PB, PC, PD, PE or PF.
  366. * @param[in] u32Pin The pin of specified GPIO port.
  367. * It could be 0 ~ 15 for PA, PB, PC and PD GPIO port.
  368. * It could be 0 ~ 14 for PE GPIO port.
  369. * It could be 0 ~ 7 for PF GPIO port.
  370. *
  371. * @return None
  372. *
  373. * @details This function is used to enable specified GPIO pin interrupt.
  374. */
  375. #define GPIO_DisableEINT GPIO_DisableInt
  376. void GPIO_SetMode(GPIO_T *port, uint32_t u32PinMask, uint32_t u32Mode);
  377. void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
  378. void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
  379. /*@}*/ /* end of group GPIO_EXPORTED_FUNCTIONS */
  380. /*@}*/ /* end of group GPIO_Driver */
  381. /*@}*/ /* end of group Standard_Driver */
  382. #ifdef __cplusplus
  383. }
  384. #endif
  385. #endif // __GPIO_H__
  386. /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/