gpio.h 27 KB

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  1. /**************************************************************************//**
  2. * @file gpio.h
  3. * @version V1.00
  4. * $Revision: 13 $
  5. * $Date: 14/12/01 10:32a $
  6. * @brief NUC472/NUC442 GPIO driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
  10. *****************************************************************************/
  11. #ifndef __GPIO_H__
  12. #define __GPIO_H__
  13. #ifdef __cplusplus
  14. extern "C"
  15. {
  16. #endif
  17. /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
  18. @{
  19. */
  20. /** @addtogroup NUC472_442_GPIO_Driver GPIO Driver
  21. @{
  22. */
  23. /** @addtogroup NUC472_442_GPIO_EXPORTED_CONSTANTS GPIO Exported Constants
  24. @{
  25. */
  26. #define GPIO_PIN_MAX 16 /*!< Specify Maximum Pins of Each GPIO Port */
  27. /*---------------------------------------------------------------------------------------------------------*/
  28. /* MODE Constant Definitions */
  29. /*---------------------------------------------------------------------------------------------------------*/
  30. #define GPIO_MODE_INPUT 0x0UL /*!< Input Mode */
  31. #define GPIO_MODE_OUTPUT 0x1UL /*!< Output Mode */
  32. #define GPIO_MODE_OPEN_DRAIN 0x2UL /*!< Open-Drain Mode */
  33. #define GPIO_MODE_QUASI 0x3UL /*!< Quasi-bidirectional Mode */
  34. /*---------------------------------------------------------------------------------------------------------*/
  35. /* GPIO Interrupt Type Constant Definitions */
  36. /*---------------------------------------------------------------------------------------------------------*/
  37. #define GPIO_INT_RISING 0x00010000UL /*!< Interrupt enable by Input Rising Edge */
  38. #define GPIO_INT_FALLING 0x00000001UL /*!< Interrupt enable by Input Falling Edge */
  39. #define GPIO_INT_BOTH_EDGE 0x00010001UL /*!< Interrupt enable by both Rising Edge and Falling Edge */
  40. #define GPIO_INT_HIGH 0x01010000UL /*!< Interrupt enable by Level-High */
  41. #define GPIO_INT_LOW 0x01000001UL /*!< Interrupt enable by Level-Level */
  42. /*---------------------------------------------------------------------------------------------------------*/
  43. /* IMD Constant Definitions */
  44. /*---------------------------------------------------------------------------------------------------------*/
  45. #define GPIO_IMD_EDGE 0UL /*!< IMD Setting for Edge Trigger Mode */
  46. #define GPIO_IMD_LEVEL 1UL /*!< IMD Setting for Edge Level Mode */
  47. /*---------------------------------------------------------------------------------------------------------*/
  48. /* DBCTL Constant Definitions */
  49. /*---------------------------------------------------------------------------------------------------------*/
  50. #define GPIO_DBCTL_ICLK_ON 0x00000020UL /*!< DBCTL setting for all IO pins edge detection circuit is always active after reset */
  51. #define GPIO_DBCTL_ICLK_OFF 0x00000000UL /*!< DBCTL setting for edge detection circuit is active only if IO pin corresponding GPIOx_IEN bit is set to 1 */
  52. #define GPIO_DBCTL_DBCLKSRC_IRC10K 0x00000010UL /*!< DBCTL setting for de-bounce counter clock source is the internal 10 kHz */
  53. #define GPIO_DBCTL_DBCLKSRC_HCLK 0x00000000UL /*!< DBCTL setting for de-bounce counter clock source is the internal HCLK */
  54. #define GPIO_DBCTL_DBCLKSEL_1 0x00000000UL /*!< DBCTL setting for sampling cycle = 1 clocks */
  55. #define GPIO_DBCTL_DBCLKSEL_2 0x00000001UL /*!< DBCTL setting for sampling cycle = 2 clocks */
  56. #define GPIO_DBCTL_DBCLKSEL_4 0x00000002UL /*!< v setting for sampling cycle = 4 clocks */
  57. #define GPIO_DBCTL_DBCLKSEL_8 0x00000003UL /*!< DBCTL setting for sampling cycle = 8 clocks */
  58. #define GPIO_DBCTL_DBCLKSEL_16 0x00000004UL /*!< DBCTL setting for sampling cycle = 16 clocks */
  59. #define GPIO_DBCTL_DBCLKSEL_32 0x00000005UL /*!< DBCTL setting for sampling cycle = 32 clocks */
  60. #define GPIO_DBCTL_DBCLKSEL_64 0x00000006UL /*!< DBCTL setting for sampling cycle = 64 clocks */
  61. #define GPIO_DBCTL_DBCLKSEL_128 0x00000007UL /*!< DBCTL setting for sampling cycle = 128 clocks */
  62. #define GPIO_DBCTL_DBCLKSEL_256 0x00000008UL /*!< DBCTL setting for sampling cycle = 256 clocks */
  63. #define GPIO_DBCTL_DBCLKSEL_512 0x00000009UL /*!< DBCTL setting for sampling cycle = 512 clocks */
  64. #define GPIO_DBCTL_DBCLKSEL_1024 0x0000000AUL /*!< DBCTL setting for sampling cycle = 1024 clocks */
  65. #define GPIO_DBCTL_DBCLKSEL_2048 0x0000000BUL /*!< DBCTL setting for sampling cycle = 2048 clocks */
  66. #define GPIO_DBCTL_DBCLKSEL_4096 0x0000000CUL /*!< DBCTL setting for sampling cycle = 4096 clocks */
  67. #define GPIO_DBCTL_DBCLKSEL_8192 0x0000000DUL /*!< DBCTL setting for sampling cycle = 8192 clocks */
  68. #define GPIO_DBCTL_DBCLKSEL_16384 0x0000000EUL /*!< DBCTL setting for sampling cycle = 16384 clocks */
  69. #define GPIO_DBCTL_DBCLKSEL_32768 0x0000000FUL /*!< DBCTL setting for sampling cycle = 32768 clocks */
  70. /** Define GPIO Pin Data Input/Output. It could be used to control each I/O pin by pin address mapping.
  71. * Example 1:
  72. *
  73. * PA0 = 1;
  74. *
  75. * It is used to set PA0 to high;
  76. *
  77. * Example 2:
  78. *
  79. * if (PA0)
  80. * PA0 = 0;
  81. *
  82. * If PA0 pin status is high, then set PA0 data output to low.
  83. */
  84. #define GPIO_PIN_ADDR(port, pin) (*((volatile uint32_t *)((GPIO_PIN_DATA_BASE+(0x40*(port))) + ((pin)<<2))))
  85. #define PA0 GPIO_PIN_ADDR(0, 0) /*!< Specify PA0 Pin Data Input/Output */
  86. #define PA1 GPIO_PIN_ADDR(0, 1) /*!< Specify PA1 Pin Data Input/Output */
  87. #define PA2 GPIO_PIN_ADDR(0, 2) /*!< Specify PA2 Pin Data Input/Output */
  88. #define PA3 GPIO_PIN_ADDR(0, 3) /*!< Specify PA3 Pin Data Input/Output */
  89. #define PA4 GPIO_PIN_ADDR(0, 4) /*!< Specify PA4 Pin Data Input/Output */
  90. #define PA5 GPIO_PIN_ADDR(0, 5) /*!< Specify PA5 Pin Data Input/Output */
  91. #define PA6 GPIO_PIN_ADDR(0, 6) /*!< Specify PA6 Pin Data Input/Output */
  92. #define PA7 GPIO_PIN_ADDR(0, 7) /*!< Specify PA7 Pin Data Input/Output */
  93. #define PA8 GPIO_PIN_ADDR(0, 8) /*!< Specify PA8 Pin Data Input/Output */
  94. #define PA9 GPIO_PIN_ADDR(0, 9) /*!< Specify PA9 Pin Data Input/Output */
  95. #define PA10 GPIO_PIN_ADDR(0, 10) /*!< Specify PA10 Pin Data Input/Output */
  96. #define PA11 GPIO_PIN_ADDR(0, 11) /*!< Specify PA11 Pin Data Input/Output */
  97. #define PA12 GPIO_PIN_ADDR(0, 12) /*!< Specify PA12 Pin Data Input/Output */
  98. #define PA13 GPIO_PIN_ADDR(0, 13) /*!< Specify PA13 Pin Data Input/Output */
  99. #define PA14 GPIO_PIN_ADDR(0, 14) /*!< Specify PA14 Pin Data Input/Output */
  100. #define PA15 GPIO_PIN_ADDR(0, 15) /*!< Specify PA15 Pin Data Input/Output */
  101. #define PB0 GPIO_PIN_ADDR(1, 0) /*!< Specify PB0 Pin Data Input/Output */
  102. #define PB1 GPIO_PIN_ADDR(1, 1) /*!< Specify PB1 Pin Data Input/Output */
  103. #define PB2 GPIO_PIN_ADDR(1, 2) /*!< Specify PB2 Pin Data Input/Output */
  104. #define PB3 GPIO_PIN_ADDR(1, 3) /*!< Specify PB3 Pin Data Input/Output */
  105. #define PB4 GPIO_PIN_ADDR(1, 4) /*!< Specify PB4 Pin Data Input/Output */
  106. #define PB5 GPIO_PIN_ADDR(1, 5) /*!< Specify PB5 Pin Data Input/Output */
  107. #define PB6 GPIO_PIN_ADDR(1, 6) /*!< Specify PB6 Pin Data Input/Output */
  108. #define PB7 GPIO_PIN_ADDR(1, 7) /*!< Specify PB7 Pin Data Input/Output */
  109. #define PB8 GPIO_PIN_ADDR(1, 8) /*!< Specify PB8 Pin Data Input/Output */
  110. #define PB9 GPIO_PIN_ADDR(1, 9) /*!< Specify PB9 Pin Data Input/Output */
  111. #define PB10 GPIO_PIN_ADDR(1, 10) /*!< Specify PB10 Pin Data Input/Output */
  112. #define PB11 GPIO_PIN_ADDR(1, 11) /*!< Specify PB11 Pin Data Input/Output */
  113. #define PB12 GPIO_PIN_ADDR(1, 12) /*!< Specify PB12 Pin Data Input/Output */
  114. #define PB13 GPIO_PIN_ADDR(1, 13) /*!< Specify PB13 Pin Data Input/Output */
  115. #define PB14 GPIO_PIN_ADDR(1, 14) /*!< Specify PB14 Pin Data Input/Output */
  116. #define PB15 GPIO_PIN_ADDR(1, 15) /*!< Specify PB15 Pin Data Input/Output */
  117. #define PC0 GPIO_PIN_ADDR(2, 0) /*!< Specify PC0 Pin Data Input/Output */
  118. #define PC1 GPIO_PIN_ADDR(2, 1) /*!< Specify PC1 Pin Data Input/Output */
  119. #define PC2 GPIO_PIN_ADDR(2, 2) /*!< Specify PC2 Pin Data Input/Output */
  120. #define PC3 GPIO_PIN_ADDR(2, 3) /*!< Specify PC3 Pin Data Input/Output */
  121. #define PC4 GPIO_PIN_ADDR(2, 4) /*!< Specify PC4 Pin Data Input/Output */
  122. #define PC5 GPIO_PIN_ADDR(2, 5) /*!< Specify PC5 Pin Data Input/Output */
  123. #define PC6 GPIO_PIN_ADDR(2, 6) /*!< Specify PC6 Pin Data Input/Output */
  124. #define PC7 GPIO_PIN_ADDR(2, 7) /*!< Specify PC7 Pin Data Input/Output */
  125. #define PC8 GPIO_PIN_ADDR(2, 8) /*!< Specify PC8 Pin Data Input/Output */
  126. #define PC9 GPIO_PIN_ADDR(2, 9) /*!< Specify PC9 Pin Data Input/Output */
  127. #define PC10 GPIO_PIN_ADDR(2, 10) /*!< Specify PC10 Pin Data Input/Output */
  128. #define PC11 GPIO_PIN_ADDR(2, 11) /*!< Specify PC11 Pin Data Input/Output */
  129. #define PC12 GPIO_PIN_ADDR(2, 12) /*!< Specify PC12 Pin Data Input/Output */
  130. #define PC13 GPIO_PIN_ADDR(2, 13) /*!< Specify PC13 Pin Data Input/Output */
  131. #define PC14 GPIO_PIN_ADDR(2, 14) /*!< Specify PC14 Pin Data Input/Output */
  132. #define PC15 GPIO_PIN_ADDR(2, 15) /*!< Specify PC15 Pin Data Input/Output */
  133. #define PD0 GPIO_PIN_ADDR(3, 0) /*!< Specify PD0 Pin Data Input/Output */
  134. #define PD1 GPIO_PIN_ADDR(3, 1) /*!< Specify PD1 Pin Data Input/Output */
  135. #define PD2 GPIO_PIN_ADDR(3, 2) /*!< Specify PD2 Pin Data Input/Output */
  136. #define PD3 GPIO_PIN_ADDR(3, 3) /*!< Specify PD3 Pin Data Input/Output */
  137. #define PD4 GPIO_PIN_ADDR(3, 4) /*!< Specify PD4 Pin Data Input/Output */
  138. #define PD5 GPIO_PIN_ADDR(3, 5) /*!< Specify PD5 Pin Data Input/Output */
  139. #define PD6 GPIO_PIN_ADDR(3, 6) /*!< Specify PD6 Pin Data Input/Output */
  140. #define PD7 GPIO_PIN_ADDR(3, 7) /*!< Specify PD7 Pin Data Input/Output */
  141. #define PD8 GPIO_PIN_ADDR(3, 8) /*!< Specify PD8 Pin Data Input/Output */
  142. #define PD9 GPIO_PIN_ADDR(3, 9) /*!< Specify PD9 Pin Data Input/Output */
  143. #define PD10 GPIO_PIN_ADDR(3, 10) /*!< Specify PD10 Pin Data Input/Output */
  144. #define PD11 GPIO_PIN_ADDR(3, 11) /*!< Specify PD11 Pin Data Input/Output */
  145. #define PD12 GPIO_PIN_ADDR(3, 12) /*!< Specify PD12 Pin Data Input/Output */
  146. #define PD13 GPIO_PIN_ADDR(3, 13) /*!< Specify PD13 Pin Data Input/Output */
  147. #define PD14 GPIO_PIN_ADDR(3, 14) /*!< Specify PD14 Pin Data Input/Output */
  148. #define PD15 GPIO_PIN_ADDR(3, 15) /*!< Specify PD15 Pin Data Input/Output */
  149. #define PE0 GPIO_PIN_ADDR(4, 0) /*!< Specify PE0 Pin Data Input/Output */
  150. #define PE1 GPIO_PIN_ADDR(4, 1) /*!< Specify PE1 Pin Data Input/Output */
  151. #define PE2 GPIO_PIN_ADDR(4, 2) /*!< Specify PE2 Pin Data Input/Output */
  152. #define PE3 GPIO_PIN_ADDR(4, 3) /*!< Specify PE3 Pin Data Input/Output */
  153. #define PE4 GPIO_PIN_ADDR(4, 4) /*!< Specify PE4 Pin Data Input/Output */
  154. #define PE5 GPIO_PIN_ADDR(4, 5) /*!< Specify PE5 Pin Data Input/Output */
  155. #define PE6 GPIO_PIN_ADDR(4, 6) /*!< Specify PE6 Pin Data Input/Output */
  156. #define PE7 GPIO_PIN_ADDR(4, 7) /*!< Specify PE7 Pin Data Input/Output */
  157. #define PE8 GPIO_PIN_ADDR(4, 8) /*!< Specify PE8 Pin Data Input/Output */
  158. #define PE9 GPIO_PIN_ADDR(4, 9) /*!< Specify PE9 Pin Data Input/Output */
  159. #define PE10 GPIO_PIN_ADDR(4, 10) /*!< Specify PE10 Pin Data Input/Output */
  160. #define PE11 GPIO_PIN_ADDR(4, 11) /*!< Specify PE11 Pin Data Input/Output */
  161. #define PE12 GPIO_PIN_ADDR(4, 12) /*!< Specify PE12 Pin Data Input/Output */
  162. #define PE13 GPIO_PIN_ADDR(4, 13) /*!< Specify PE13 Pin Data Input/Output */
  163. #define PE14 GPIO_PIN_ADDR(4, 14) /*!< Specify PE14 Pin Data Input/Output */
  164. #define PE15 GPIO_PIN_ADDR(4, 15) /*!< Specify PE15 Pin Data Input/Output */
  165. #define PF0 GPIO_PIN_ADDR(5, 0) /*!< Specify PF0 Pin Data Input/Output */
  166. #define PF1 GPIO_PIN_ADDR(5, 1) /*!< Specify PF1 Pin Data Input/Output */
  167. #define PF2 GPIO_PIN_ADDR(5, 2) /*!< Specify PF2 Pin Data Input/Output */
  168. #define PF3 GPIO_PIN_ADDR(5, 3) /*!< Specify PF3 Pin Data Input/Output */
  169. #define PF4 GPIO_PIN_ADDR(5, 4) /*!< Specify PF4 Pin Data Input/Output */
  170. #define PF5 GPIO_PIN_ADDR(5, 5) /*!< Specify PF5 Pin Data Input/Output */
  171. #define PF6 GPIO_PIN_ADDR(5, 6) /*!< Specify PF6 Pin Data Input/Output */
  172. #define PF7 GPIO_PIN_ADDR(5, 7) /*!< Specify PF7 Pin Data Input/Output */
  173. #define PF8 GPIO_PIN_ADDR(5, 8) /*!< Specify PF8 Pin Data Input/Output */
  174. #define PF9 GPIO_PIN_ADDR(5, 9) /*!< Specify PF9 Pin Data Input/Output */
  175. #define PF10 GPIO_PIN_ADDR(5, 10) /*!< Specify PF10 Pin Data Input/Output */
  176. #define PF11 GPIO_PIN_ADDR(5, 11) /*!< Specify PF11 Pin Data Input/Output */
  177. #define PF12 GPIO_PIN_ADDR(5, 12) /*!< Specify PF12 Pin Data Input/Output */
  178. #define PF13 GPIO_PIN_ADDR(5, 13) /*!< Specify PF13 Pin Data Input/Output */
  179. #define PF14 GPIO_PIN_ADDR(5, 14) /*!< Specify PF14 Pin Data Input/Output */
  180. #define PF15 GPIO_PIN_ADDR(5, 15) /*!< Specify PF15 Pin Data Input/Output */
  181. #define PG0 GPIO_PIN_ADDR(6, 0) /*!< Specify PG0 Pin Data Input/Output */
  182. #define PG1 GPIO_PIN_ADDR(6, 1) /*!< Specify PG1 Pin Data Input/Output */
  183. #define PG2 GPIO_PIN_ADDR(6, 2) /*!< Specify PG2 Pin Data Input/Output */
  184. #define PG3 GPIO_PIN_ADDR(6, 3) /*!< Specify PG3 Pin Data Input/Output */
  185. #define PG4 GPIO_PIN_ADDR(6, 4) /*!< Specify PG4 Pin Data Input/Output */
  186. #define PG5 GPIO_PIN_ADDR(6, 5) /*!< Specify PG5 Pin Data Input/Output */
  187. #define PG6 GPIO_PIN_ADDR(6, 6) /*!< Specify PG6 Pin Data Input/Output */
  188. #define PG7 GPIO_PIN_ADDR(6, 7) /*!< Specify PG7 Pin Data Input/Output */
  189. #define PG8 GPIO_PIN_ADDR(6, 8) /*!< Specify PG8 Pin Data Input/Output */
  190. #define PG9 GPIO_PIN_ADDR(6, 9) /*!< Specify PG9 Pin Data Input/Output */
  191. #define PG10 GPIO_PIN_ADDR(6, 10) /*!< Specify PG10 Pin Data Input/Output */
  192. #define PG11 GPIO_PIN_ADDR(6, 11) /*!< Specify PG11 Pin Data Input/Output */
  193. #define PG12 GPIO_PIN_ADDR(6, 12) /*!< Specify PG12 Pin Data Input/Output */
  194. #define PG13 GPIO_PIN_ADDR(6, 13) /*!< Specify PG13 Pin Data Input/Output */
  195. #define PG14 GPIO_PIN_ADDR(6, 14) /*!< Specify PG14 Pin Data Input/Output */
  196. #define PG15 GPIO_PIN_ADDR(6, 15) /*!< Specify PG15 Pin Data Input/Output */
  197. #define PH0 GPIO_PIN_ADDR(7, 0) /*!< Specify PH0 Pin Data Input/Output */
  198. #define PH1 GPIO_PIN_ADDR(7, 1) /*!< Specify PH1 Pin Data Input/Output */
  199. #define PH2 GPIO_PIN_ADDR(7, 2) /*!< Specify PH2 Pin Data Input/Output */
  200. #define PH3 GPIO_PIN_ADDR(7, 3) /*!< Specify PH3 Pin Data Input/Output */
  201. #define PH4 GPIO_PIN_ADDR(7, 4) /*!< Specify PH4 Pin Data Input/Output */
  202. #define PH5 GPIO_PIN_ADDR(7, 5) /*!< Specify PH5 Pin Data Input/Output */
  203. #define PH6 GPIO_PIN_ADDR(7, 6) /*!< Specify PH6 Pin Data Input/Output */
  204. #define PH7 GPIO_PIN_ADDR(7, 7) /*!< Specify PH7 Pin Data Input/Output */
  205. #define PH8 GPIO_PIN_ADDR(7, 8) /*!< Specify PH8 Pin Data Input/Output */
  206. #define PH9 GPIO_PIN_ADDR(7, 9) /*!< Specify PH9 Pin Data Input/Output */
  207. #define PH10 GPIO_PIN_ADDR(7, 10) /*!< Specify PH10 Pin Data Input/Output */
  208. #define PH11 GPIO_PIN_ADDR(7, 11) /*!< Specify PH11 Pin Data Input/Output */
  209. #define PH12 GPIO_PIN_ADDR(7, 12) /*!< Specify PH12 Pin Data Input/Output */
  210. #define PH13 GPIO_PIN_ADDR(7, 13) /*!< Specify PH13 Pin Data Input/Output */
  211. #define PH14 GPIO_PIN_ADDR(7, 14) /*!< Specify PH14 Pin Data Input/Output */
  212. #define PH15 GPIO_PIN_ADDR(7, 15) /*!< Specify PH15 Pin Data Input/Output */
  213. #define PI0 GPIO_PIN_ADDR(8, 0) /*!< Specify PI0 Pin Data Input/Output */
  214. #define PI1 GPIO_PIN_ADDR(8, 1) /*!< Specify PI1 Pin Data Input/Output */
  215. #define PI2 GPIO_PIN_ADDR(8, 2) /*!< Specify PI2 Pin Data Input/Output */
  216. #define PI3 GPIO_PIN_ADDR(8, 3) /*!< Specify PI3 Pin Data Input/Output */
  217. #define PI4 GPIO_PIN_ADDR(8, 4) /*!< Specify PI4 Pin Data Input/Output */
  218. #define PI5 GPIO_PIN_ADDR(8, 5) /*!< Specify PI5 Pin Data Input/Output */
  219. #define PI6 GPIO_PIN_ADDR(8, 6) /*!< Specify PI6 Pin Data Input/Output */
  220. #define PI7 GPIO_PIN_ADDR(8, 7) /*!< Specify PI7 Pin Data Input/Output */
  221. #define PI8 GPIO_PIN_ADDR(8, 8) /*!< Specify PI8 Pin Data Input/Output */
  222. #define PI9 GPIO_PIN_ADDR(8, 9) /*!< Specify PI9 Pin Data Input/Output */
  223. #define PI10 GPIO_PIN_ADDR(8, 10) /*!< Specify PI10 Pin Data Input/Output */
  224. #define PI11 GPIO_PIN_ADDR(8, 11) /*!< Specify PI11 Pin Data Input/Output */
  225. #define PI12 GPIO_PIN_ADDR(8, 12) /*!< Specify PI12 Pin Data Input/Output */
  226. #define PI13 GPIO_PIN_ADDR(8, 13) /*!< Specify PI13 Pin Data Input/Output */
  227. #define PI14 GPIO_PIN_ADDR(8, 14) /*!< Specify PI14 Pin Data Input/Output */
  228. #define PI15 GPIO_PIN_ADDR(8, 15) /*!< Specify PI15 Pin Data Input/Output */
  229. /*@}*/ /* end of group NUC472_442_GPIO_EXPORTED_CONSTANTS */
  230. /** @addtogroup NUC472_442_GPIO_EXPORTED_FUNCTIONS GPIO Exported Functions
  231. @{
  232. */
  233. /**
  234. * @brief Clear GPIO Pin Interrupt Flag
  235. *
  236. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  237. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  238. *
  239. * @return None
  240. *
  241. * @details Clear the interrupt status of specified GPIO pin.
  242. */
  243. #define GPIO_CLR_INT_FLAG(gpio, u32PinMask) ((gpio)->INTSRC = u32PinMask)
  244. /**
  245. * @brief Disable Pin De-bounce Function
  246. *
  247. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  248. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  249. *
  250. * @return None
  251. *
  252. * @details Disable the interrupt de-bounce function of specified GPIO pin.
  253. */
  254. #define GPIO_DISABLE_DEBOUNCE(gpio, u32PinMask) ((gpio)->DBEN &= ~u32PinMask)
  255. /**
  256. * @brief Enable Pin De-bounce Function
  257. *
  258. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  259. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  260. *
  261. * @return None
  262. *
  263. * @details Enable the interrupt de-bounce function of specified GPIO pin.
  264. */
  265. #define GPIO_ENABLE_DEBOUNCE(gpio, u32PinMask) ((gpio)->DBEN |= u32PinMask)
  266. /**
  267. * @brief Disable I/O Digital Input Path
  268. *
  269. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  270. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  271. *
  272. * @return None
  273. *
  274. * @details Disable I/O digital input path of specified GPIO pin.
  275. */
  276. #define GPIO_DISABLE_DIGITAL_PATH(gpio, u32PinMask) ((gpio)->DINOFF |= (u32PinMask << 16))
  277. /**
  278. * @brief Enable I/O Digital Input Path
  279. *
  280. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  281. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  282. *
  283. * @return None
  284. *
  285. * @details Enable I/O digital input path of specified GPIO pin.
  286. */
  287. #define GPIO_ENABLE_DIGITAL_PATH(gpio, u32PinMask) ((gpio)->DINOFF &= ~(u32PinMask << 16))
  288. /**
  289. * @brief Disable I/O DOUT mask
  290. *
  291. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  292. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  293. *
  294. * @return None
  295. *
  296. * @details Disable I/O DOUT mask of specified GPIO pin.
  297. */
  298. #define GPIO_DISABLE_DOUT_MASK(gpio, u32PinMask) ((gpio)->DATMSK &= ~u32PinMask)
  299. /**
  300. * @brief Enable I/O DOUT mask
  301. *
  302. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  303. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  304. *
  305. * @return None
  306. *
  307. * @details Enable I/O DOUT mask of specified GPIO pin.
  308. */
  309. #define GPIO_ENABLE_DOUT_MASK(gpio, u32PinMask) ((gpio)->DATMSK |= u32PinMask)
  310. /**
  311. * @brief Get GPIO Pin Interrupt Flag
  312. *
  313. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  314. * @param[in] u32PinMask The single or multiple pins of specified GPIO port.
  315. *
  316. * @retval 0 No interrupt at specified GPIO pin
  317. * @retval 1 The specified GPIO pin generate an interrupt
  318. *
  319. * @details Get the interrupt status of specified GPIO pin.
  320. */
  321. #define GPIO_GET_INT_FLAG(gpio, u32PinMask) ((gpio)->INTSRC & u32PinMask)
  322. /**
  323. * @brief Set De-bounce Sampling Cycle Time
  324. *
  325. * @param[in] u32ClkSrc The de-bounce counter clock source. It could be \ref GPIO_DBCTL_DBCLKSRC_HCLK or \ref GPIO_DBCTL_DBCLKSRC_IRC10K.
  326. * @param[in] u32ClkSel The de-bounce sampling cycle selection. It could be \n
  327. * \ref GPIO_DBCTL_DBCLKSEL_1, \ref GPIO_DBCTL_DBCLKSEL_2, \ref GPIO_DBCTL_DBCLKSEL_4, \ref GPIO_DBCTL_DBCLKSEL_8, \n
  328. * \ref GPIO_DBCTL_DBCLKSEL_16, \ref GPIO_DBCTL_DBCLKSEL_32, \ref GPIO_DBCTL_DBCLKSEL_64, \ref GPIO_DBCTL_DBCLKSEL_128, \n
  329. * \ref GPIO_DBCTL_DBCLKSEL_256, \ref GPIO_DBCTL_DBCLKSEL_512, \ref GPIO_DBCTL_DBCLKSEL_1024, \ref GPIO_DBCTL_DBCLKSEL_2048, \n
  330. * \ref GPIO_DBCTL_DBCLKSEL_4096, \ref GPIO_DBCTL_DBCLKSEL_8192, \ref GPIO_DBCTL_DBCLKSEL_16384, \ref GPIO_DBCTL_DBCLKSEL_32768.
  331. *
  332. * @return None
  333. *
  334. * @details Set the interrupt de-bounce sampling cycle time based on the debounce counter clock source. \n
  335. * Example: _GPIO_SET_DEBOUNCE_TIME(GPIO_DBCTL_DBCLKSRC_IRC10K, GPIO_DBCTL_DBCLKSEL_4). \n
  336. * It's meaning the De-debounce counter clock source is internal 10 KHz and sampling cycle selection is 4. \n
  337. * Then the target de-bounce sampling cycle time is (2^4)*(1/(10*1000)) s = 16*0.0001 s = 1600 us,
  338. * and system will sampling interrupt input once per 1600 us.
  339. */
  340. #define GPIO_SET_DEBOUNCE_TIME(u32ClkSrc, u32ClkSel) (GPIO->DBCTL = (GPIO_DBCTL_ICLKON_Msk | u32ClkSrc | u32ClkSel))
  341. /**
  342. * @brief Get GPIO Port IN Data
  343. *
  344. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  345. *
  346. * @retval The specified port data
  347. *
  348. * @details Get the PIN register of specified GPIO port.
  349. */
  350. #define GPIO_GET_IN_DATA(gpio) ((gpio)->PIN)
  351. /**
  352. * @brief Set GPIO Port OUT Data
  353. *
  354. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  355. * @param[in] u32Data GPIO port data.
  356. *
  357. * @retval None
  358. *
  359. * @details Set the Data into specified GPIO port.
  360. */
  361. #define GPIO_SET_OUT_DATA(gpio, u32Data) ((gpio)->DOUT = (u32Data))
  362. /**
  363. * @brief Toggle Specified GPIO pin
  364. *
  365. * @param[in] u32Pin Pxy
  366. *
  367. * @retval None
  368. *
  369. * @details Toggle the specified GPIO pint.
  370. */
  371. #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1)
  372. /**
  373. * @brief Enable External GPIO interrupt 0
  374. *
  375. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  376. * @param[in] u32Pin The pin of specified GPIO port.
  377. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  378. * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW.
  379. *
  380. * @return None
  381. *
  382. * @details This function is used to enable specified GPIO pin interrupt.
  383. */
  384. #define GPIO_EnableEINT0 GPIO_EnableInt
  385. /**
  386. * @brief Disable External GPIO interrupt 0
  387. *
  388. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  389. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15.
  390. *
  391. * @return None
  392. *
  393. * @details This function is used to enable specified GPIO pin interrupt.
  394. */
  395. #define GPIO_DisableEINT0 GPIO_DisableInt
  396. /**
  397. * @brief Enable External GPIO interrupt 1
  398. *
  399. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  400. * @param[in] u32Pin The pin of specified GPIO port.
  401. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  402. * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW.
  403. *
  404. * @return None
  405. *
  406. * @details This function is used to enable specified GPIO pin interrupt.
  407. */
  408. #define GPIO_EnableEINT1 GPIO_EnableInt
  409. /**
  410. * @brief Disable External GPIO interrupt 1
  411. *
  412. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  413. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15.
  414. *
  415. * @return None
  416. *
  417. * @details This function is used to enable specified GPIO pin interrupt.
  418. */
  419. #define GPIO_DisableEINT1 GPIO_DisableInt
  420. /**
  421. * @brief Enable External GPIO interrupt n
  422. *
  423. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  424. * @param[in] u32Pin The pin of specified GPIO port.
  425. * @param[in] u32IntAttribs The interrupt attribute of specified GPIO pin. It could be \n
  426. * \ref GPIO_INT_RISING, \ref GPIO_INT_FALLING, \ref GPIO_INT_BOTH_EDGE, \ref GPIO_INT_HIGH, \ref GPIO_INT_LOW.
  427. *
  428. * @return None
  429. *
  430. * @details This function is used to enable specified GPIO pin interrupt.
  431. */
  432. #define GPIO_EnableEINT GPIO_EnableInt
  433. /**
  434. * @brief Disable External GPIO interrupt n
  435. *
  436. * @param[in] gpio GPIO port. It could be \ref PA, \ref PB, ... or \ref GPI
  437. * @param[in] u32Pin The pin of specified GPIO port. It could be 0 ~ 15.
  438. *
  439. * @return None
  440. *
  441. * @details This function is used to enable specified GPIO pin interrupt.
  442. */
  443. #define GPIO_DisableEINT GPIO_DisableInt
  444. void GPIO_SetMode(GPIO_T *gpio, uint32_t u32PinMask, uint32_t u32Mode);
  445. void GPIO_EnableInt(GPIO_T *gpio, uint32_t u32Pin, uint32_t u32IntAttribs);
  446. void GPIO_DisableInt(GPIO_T *gpio, uint32_t u32Pin);
  447. /*@}*/ /* end of group NUC472_442_GPIO_EXPORTED_FUNCTIONS */
  448. /*@}*/ /* end of group NUC472_442_GPIO_Driver */
  449. /*@}*/ /* end of group NUC472_442_Device_Driver */
  450. #ifdef __cplusplus
  451. }
  452. #endif
  453. #endif //__GPIO_H__
  454. /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/