pdma.h 12 KB

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  1. /**************************************************************************//**
  2. * @file pdma.h
  3. * @version V1.00
  4. * $Revision: 8 $
  5. * $Date: 14/06/05 5:16p $
  6. * @brief NUC472/NUC442 PDMA driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
  10. *****************************************************************************/
  11. #ifndef __PDMA_H__
  12. #define __PDMA_H__
  13. #ifdef __cplusplus
  14. extern "C"
  15. {
  16. #endif
  17. /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
  18. @{
  19. */
  20. /** @addtogroup NUC472_442_PDMA_Driver PDMA Driver
  21. @{
  22. */
  23. /** @addtogroup NUC472_442_PDMA_EXPORTED_CONSTANTS PDMA Exported Constants
  24. @{
  25. */
  26. #define PDMA_CH_MAX 16 /*!< Specify Maximum Channels of PDMA \hideinitializer */
  27. /*---------------------------------------------------------------------------------------------------------*/
  28. /* operation Mode Constant Definitions */
  29. /*---------------------------------------------------------------------------------------------------------*/
  30. #define PDMA_OP_STOP 0x00000000UL /*!<DMA Stop Mode \hideinitializer */
  31. #define PDMA_OP_BASIC 0x00000001UL /*!<DMA Basic Mode \hideinitializer */
  32. #define PDMA_OP_SCATTER 0x00000002UL /*!<DMA Scatter-gather Mode \hideinitializer */
  33. /*---------------------------------------------------------------------------------------------------------*/
  34. /* Data Width Constant Definitions */
  35. /*---------------------------------------------------------------------------------------------------------*/
  36. #define PDMA_WIDTH_8 0x00000000UL /*!<DMA Transfer Width 8-bit \hideinitializer */
  37. #define PDMA_WIDTH_16 0x00001000UL /*!<DMA Transfer Width 16-bit \hideinitializer */
  38. #define PDMA_WIDTH_32 0x00002000UL /*!<DMA Transfer Width 32-bit \hideinitializer */
  39. /*---------------------------------------------------------------------------------------------------------*/
  40. /* Address Attribute Constant Definitions */
  41. /*---------------------------------------------------------------------------------------------------------*/
  42. #define PDMA_SAR_INC 0x00000000UL /*!<DMA SAR increment \hideinitializer */
  43. #define PDMA_SAR_FIX 0x00000300UL /*!<DMA SAR fix address \hideinitializer */
  44. #define PDMA_DAR_INC 0x00000000UL /*!<DMA DAR increment \hideinitializer */
  45. #define PDMA_DAR_FIX 0x00000C00UL /*!<DMA DAR fix address \hideinitializer */
  46. /*---------------------------------------------------------------------------------------------------------*/
  47. /* Burst Mode Constant Definitions */
  48. /*---------------------------------------------------------------------------------------------------------*/
  49. #define PDMA_REQ_SINGLE 0x00000004UL /*!<DMA Single Request \hideinitializer */
  50. #define PDMA_REQ_BURST 0x00000000UL /*!<DMA Burst Request \hideinitializer */
  51. #define PDMA_BURST_128 0x00000000UL /*!<DMA Burst 128 Transfers \hideinitializer */
  52. #define PDMA_BURST_64 0x00000010UL /*!<DMA Burst 64 Transfers \hideinitializer */
  53. #define PDMA_BURST_32 0x00000020UL /*!<DMA Burst 32 Transfers \hideinitializer */
  54. #define PDMA_BURST_16 0x00000030UL /*!<DMA Burst 16 Transfers \hideinitializer */
  55. #define PDMA_BURST_8 0x00000040UL /*!<DMA Burst 8 Transfers \hideinitializer */
  56. #define PDMA_BURST_4 0x00000050UL /*!<DMA Burst 4 Transfers \hideinitializer */
  57. #define PDMA_BURST_2 0x00000060UL /*!<DMA Burst 2 Transfers \hideinitializer */
  58. #define PDMA_BURST_1 0x00000070UL /*!<DMA Burst 1 Transfers \hideinitializer */
  59. /*---------------------------------------------------------------------------------------------------------*/
  60. /* Peripheral Transfer Mode Constant Definitions */
  61. /*---------------------------------------------------------------------------------------------------------*/
  62. #define PDMA_SPI0_TX 0x00000000UL /*!<DMA Connect to SPI0 TX \hideinitializer */
  63. #define PDMA_SPI1_TX 0x00000001UL /*!<DMA Connect to SPI1 TX \hideinitializer */
  64. #define PDMA_SPI2_TX 0x00000002UL /*!<DMA Connect to SPI2 TX \hideinitializer */
  65. #define PDMA_SPI3_TX 0x00000003UL /*!<DMA Connect to SPI3 TX \hideinitializer */
  66. #define PDMA_UART0_TX 0x00000004UL /*!<DMA Connect to UART0 TX \hideinitializer */
  67. #define PDMA_UART1_TX 0x00000005UL /*!<DMA Connect to UART1 TX \hideinitializer */
  68. #define PDMA_UART2_TX 0x00000006UL /*!<DMA Connect to UART2 TX \hideinitializer */
  69. #define PDMA_UART3_TX 0x00000007UL /*!<DMA Connect to UART3 TX \hideinitializer */
  70. #define PDMA_UART4_TX 0x00000008UL /*!<DMA Connect to UART4 TX \hideinitializer */
  71. #define PDMA_UART5_TX 0x00000009UL /*!<DMA Connect to UART5 TX \hideinitializer */
  72. #define PDMA_I2S0_TX 0x0000000BUL /*!<DMA Connect to I2S TX \hideinitializer */
  73. #define PDMA_I2S1_TX 0x0000000CUL /*!<DMA Connect to I2S1 TX \hideinitializer */
  74. #define PDMA_SPI0_RX 0x0000000DUL /*!<DMA Connect to SPI0 RX \hideinitializer */
  75. #define PDMA_SPI1_RX 0x0000000EUL /*!<DMA Connect to SPI1 RX \hideinitializer */
  76. #define PDMA_SPI2_RX 0x0000000FUL /*!<DMA Connect to SPI2 RX \hideinitializer */
  77. #define PDMA_SPI3_RX 0x00000010UL /*!<DMA Connect to SPI3 RX \hideinitializer */
  78. #define PDMA_UART0_RX 0x00000011UL /*!<DMA Connect to UART0 RX \hideinitializer */
  79. #define PDMA_UART1_RX 0x00000012UL /*!<DMA Connect to UART1 RX \hideinitializer */
  80. #define PDMA_UART2_RX 0x00000013UL /*!<DMA Connect to UART2 RX \hideinitializer */
  81. #define PDMA_UART3_RX 0x00000014UL /*!<DMA Connect to UART3 RX \hideinitializer */
  82. #define PDMA_UART4_RX 0x00000015UL /*!<DMA Connect to UART4 RX \hideinitializer */
  83. #define PDMA_UART5_RX 0x00000016UL /*!<DMA Connect to UART5 RX \hideinitializer */
  84. #define PDMA_ADC 0x00000018UL /*!<DMA Connect to ADC \hideinitializer */
  85. #define PDMA_I2S0_RX 0x00000019UL /*!<DMA Connect to I2S TX \hideinitializer */
  86. #define PDMA_I2S1_RX 0x0000001AUL /*!<DMA Connect to I2S1 TX \hideinitializer */
  87. #define PDMA_MEM 0x0000001FUL /*!<DMA Connect to Memory \hideinitializer */
  88. /*@}*/ /* end of group NUC472_442_PDMA_EXPORTED_CONSTANTS */
  89. /** @addtogroup NUC472_442_PDMA_EXPORTED_FUNCTIONS PDMA Exported Functions
  90. @{
  91. */
  92. /**
  93. * @brief Get PDMA Interrupt Status
  94. *
  95. * @param[in] None
  96. *
  97. * @return None
  98. *
  99. * @details This macro gets the interrupt status.
  100. * \hideinitializer
  101. */
  102. #define PDMA_GET_INT_STATUS() ((uint32_t)(PDMA->INTSTS))
  103. /**
  104. * @brief Get Transfer Done Interrupt Status
  105. *
  106. * @param[in] None
  107. *
  108. * @return None
  109. *
  110. * @details Get the transfer done Interrupt status.
  111. * \hideinitializer
  112. */
  113. #define PDMA_GET_TD_STS() ((uint32_t)(PDMA->TDSTS))
  114. /**
  115. * @brief Clear Transfer Done Interrupt Status
  116. *
  117. * @param[in] u32Mask The channel mask
  118. *
  119. * @return None
  120. *
  121. * @details Clear the transfer done Interrupt status.
  122. * \hideinitializer
  123. */
  124. #define PDMA_CLR_TD_FLAG(u32Mask) ((uint32_t)(PDMA->TDSTS = u32Mask))
  125. /**
  126. * @brief Get Target Abort Interrupt Status
  127. *
  128. * @param[in] None
  129. *
  130. * @return None
  131. *
  132. * @details Get the target abort Interrupt status.
  133. * \hideinitializer
  134. */
  135. #define PDMA_GET_ABORT_STS() ((uint32_t)(PDMA->ABTSTS))
  136. /**
  137. * @brief Clear Target Abort Interrupt Status
  138. *
  139. * @param[in] u32Mask The channel mask
  140. *
  141. * @return None
  142. *
  143. * @details Clear the target abort Interrupt status.
  144. * \hideinitializer
  145. */
  146. #define PDMA_CLR_ABORT_FLAG(u32Mask) ((uint32_t)(PDMA->ABTSTS = u32Mask))
  147. /**
  148. * @brief Get Scatter-Gather Table Empty Interrupt Status
  149. *
  150. * @param[in] None
  151. *
  152. * @return None
  153. *
  154. * @details Get the scatter-gather table empty Interrupt status.
  155. * \hideinitializer
  156. */
  157. #define PDMA_GET_EMPTY_STS() ((uint32_t)(PDMA->SCATSTS))
  158. /**
  159. * @brief Clear Scatter-Gather Table Empty Interrupt Status
  160. *
  161. * @param[in] u32Mask The channel mask
  162. *
  163. * @return None
  164. *
  165. * @details Clear the scatter-gather table empty Interrupt status.
  166. * \hideinitializer
  167. */
  168. #define PDMA_CLR_EMPTY_FLAG(u32Mask) ((uint32_t)(PDMA->SCATSTS = u32Mask))
  169. /**
  170. * @brief Check Channel Status
  171. *
  172. * @param[in] u32Ch The selected channel
  173. *
  174. * @return 0 = idle; 1 = busy
  175. *
  176. * @details Check the selected channel is busy or not.
  177. * \hideinitializer
  178. */
  179. #define PDMA_IS_CH_BUSY(u32Ch) ((uint32_t)(PDMA->TRGSTS & (1 << u32Ch))? 1 : 0)
  180. /**
  181. * @brief Set Source Address
  182. *
  183. * @param[in] u32Ch The selected channel
  184. * @param[in] u32Addr The selected address
  185. *
  186. * @return None
  187. *
  188. * @details This macro set the selected channel source address.
  189. * \hideinitializer
  190. */
  191. #define PDMA_SET_SRC_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].ENDSA = u32Addr))
  192. /**
  193. * @brief Set Destination Address
  194. *
  195. * @param[in] u32Ch The selected channel
  196. * @param[in] u32Addr The selected address
  197. *
  198. * @return None
  199. *
  200. * @details This macro set the selected channel destination address.
  201. * \hideinitializer
  202. */
  203. #define PDMA_SET_DST_ADDR(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].ENDDA = u32Addr))
  204. /**
  205. * @brief Set Transfer Count
  206. *
  207. * @param[in] u32Ch The selected channel
  208. * @param[in] u32Count Transfer Count
  209. *
  210. * @return None
  211. *
  212. * @details This macro set the selected channel transfer count.
  213. * \hideinitializer
  214. */
  215. #define PDMA_SET_TRANS_CNT(u32Ch, u32Count) ((uint32_t)(PDMA->DSCT[u32Ch].CTL=(PDMA->DSCT[u32Ch].CTL&~PDMA_DSCT_CTL_TXCNT_Msk)|((u32Count-1) << PDMA_DSCT_CTL_TXCNT_Pos))
  216. /**
  217. * @brief Set Scatter-gather descriptor Address
  218. *
  219. * @param[in] u32Ch The selected channel
  220. * @param[in] u32Addr The descriptor address
  221. *
  222. * @return None
  223. *
  224. * @details This macro set the selected channel scatter-gather descriptor address.
  225. * \hideinitializer
  226. */
  227. #define PDMA_SET_SCATTER_DESC(u32Ch, u32Addr) ((uint32_t)(PDMA->DSCT[u32Ch].NEXT = u32Addr - (PDMA->SCATBA)))
  228. /**
  229. * @brief Stop the channel
  230. *
  231. * @param[in] u32Ch The selected channel
  232. *
  233. * @return None
  234. *
  235. * @details This macro stop the selected channel.
  236. * \hideinitializer
  237. */
  238. #define PDMA_STOP(u32Ch) ((uint32_t)(PDMA->STOP = (1 << u32Ch)))
  239. void PDMA_Open(uint32_t u32Mask);
  240. void PDMA_Close(void);
  241. void PDMA_SetTransferCnt(uint32_t u32Ch, uint32_t u32Width, uint32_t u32TransCount);
  242. void PDMA_SetTransferAddr(uint32_t u32Ch, uint32_t u32SrcAddr, uint32_t u32SrcCtrl, uint32_t u32DstAddr, uint32_t u32DstCtrl);
  243. void PDMA_SetTransferMode(uint32_t u32Ch, uint32_t u32Periphral, uint32_t u32ScatterEn, uint32_t u32DescAddr);
  244. void PDMA_SetBurstType(uint32_t u32Ch, uint32_t u32BurstType, uint32_t u32BurstSize);
  245. void PDMA_Trigger(uint32_t u32Ch);
  246. void PDMA_EnableInt(uint32_t u32Ch, uint32_t u32Mask);
  247. void PDMA_DisableInt(uint32_t u32Ch, uint32_t u32Mask);
  248. /*@}*/ /* end of group NUC472_442_PDMA_EXPORTED_FUNCTIONS */
  249. /*@}*/ /* end of group NUC472_442_PDMA_Driver */
  250. /*@}*/ /* end of group NUC472_442_Device_Driver */
  251. #ifdef __cplusplus
  252. }
  253. #endif
  254. #endif //__PDMA_H__
  255. /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/