sc.h 9.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250
  1. /**************************************************************************//**
  2. * @file sc.h
  3. * @version V1.00
  4. * $Revision: 11 $
  5. * $Date: 15/05/08 5:23p $
  6. * @brief NUC472/NUC442 Smartcard (SC) driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
  10. *****************************************************************************/
  11. #ifndef __SC_H__
  12. #define __SC_H__
  13. #ifdef __cplusplus
  14. extern "C"
  15. {
  16. #endif
  17. /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
  18. @{
  19. */
  20. /** @addtogroup NUC472_442_SC_Driver SC Driver
  21. @{
  22. */
  23. /** @addtogroup NUC472_442_SC_EXPORTED_CONSTANTS SC Exported Constants
  24. @{
  25. */
  26. #define SC_INTERFACE_NUM 6 /*!< Smartcard interface numbers \hideinitializer */
  27. #define SC_PIN_STATE_HIGH 1 /*!< Smartcard pin status high \hideinitializer */
  28. #define SC_PIN_STATE_LOW 0 /*!< Smartcard pin status low \hideinitializer */
  29. #define SC_PIN_STATE_IGNORE 0xFFFFFFFF /*!< Ignore pin status \hideinitializer */
  30. #define SC_CLK_ON 1 /*!< Smartcard clock on \hideinitializer */
  31. #define SC_CLK_OFF 0 /*!< Smartcard clock off \hideinitializer */
  32. #define SC_TMR_MODE_0 (0ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 0, down count \hideinitializer */
  33. #define SC_TMR_MODE_1 (1ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 1, down count, start after detect start bit \hideinitializer */
  34. #define SC_TMR_MODE_2 (2ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 2, down count, start after receive start bit \hideinitializer */
  35. #define SC_TMR_MODE_3 (3ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 3, down count, use for activation, only timer 0 support this mode \hideinitializer */
  36. #define SC_TMR_MODE_4 (4ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 4, down count with reload after timeout \hideinitializer */
  37. #define SC_TMR_MODE_5 (5ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 5, down count, start after detect start bit, reload after timeout \hideinitializer */
  38. #define SC_TMR_MODE_6 (6ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 6, down count, start after receive start bit, reload after timeout \hideinitializer */
  39. #define SC_TMR_MODE_7 (7ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 7, down count, start and reload after detect start bit \hideinitializer */
  40. #define SC_TMR_MODE_8 (8ul << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 8, up count \hideinitializer */
  41. #define SC_TMR_MODE_F (0xF << SC_TMRCTL0_OPMODE_Pos) /*!<Timer Operation Mode 15, down count, reload after detect start bit \hideinitializer */
  42. /*@}*/ /* end of group NUC472_442_SC_EXPORTED_CONSTANTS */
  43. /** @addtogroup NUC472_442_SC_EXPORTED_FUNCTIONS SC Exported Functions
  44. @{
  45. */
  46. /**
  47. * @brief This macro enable smartcard interrupt
  48. * @param[in] sc Base address of smartcard module
  49. * @param[in] u32Mask Interrupt mask to be enabled. A combination of
  50. * - \ref SC_INTEN_ACERRIEN_Msk
  51. * - \ref SC_INTEN_RXTOIF_Msk
  52. * - \ref SC_INTEN_INITIEN_Msk
  53. * - \ref SC_INTEN_CDIEN_Msk
  54. * - \ref SC_INTEN_BGTIEN_Msk
  55. * - \ref SC_INTEN_TMR2IEN_Msk
  56. * - \ref SC_INTEN_TMR1IEN_Msk
  57. * - \ref SC_INTEN_TMR0IEN_Msk
  58. * - \ref SC_INTEN_TERRIEN_Msk
  59. * - \ref SC_INTEN_TBEIEN_Msk
  60. * - \ref SC_INTEN_RDAIEN_Msk
  61. * @return None
  62. * \hideinitializer
  63. */
  64. #define SC_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
  65. /**
  66. * @brief This macro disable smartcard interrupt
  67. * @param[in] sc Base address of smartcard module
  68. * @param[in] u32Mask Interrupt mask to be disabled. A combination of
  69. * - \ref SC_INTEN_ACERRIEN_Msk
  70. * - \ref SC_INTEN_RXTOIF_Msk
  71. * - \ref SC_INTEN_INITIEN_Msk
  72. * - \ref SC_INTEN_CDIEN_Msk
  73. * - \ref SC_INTEN_BGTIEN_Msk
  74. * - \ref SC_INTEN_TMR2IEN_Msk
  75. * - \ref SC_INTEN_TMR1IEN_Msk
  76. * - \ref SC_INTEN_TMR0IEN_Msk
  77. * - \ref SC_INTEN_TERRIEN_Msk
  78. * - \ref SC_INTEN_TBEIEN_Msk
  79. * - \ref SC_INTEN_RDAIEN_Msk
  80. * @return None
  81. * \hideinitializer
  82. */
  83. #define SC_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
  84. /**
  85. * @brief This macro set VCC pin state of smartcard interface
  86. * @param[in] sc Base address of smartcard module
  87. * @param[in] u32State Pin state of VCC pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
  88. * @return None
  89. * \hideinitializer
  90. */
  91. #define SC_SET_VCC_PIN(sc, u32State) \
  92. do {\
  93. while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
  94. if(u32State)\
  95. (sc)->PINCTL |= SC_PINCTL_PWREN_Msk;\
  96. else\
  97. (sc)->PINCTL &= ~SC_PINCTL_PWREN_Msk;\
  98. }while(0)
  99. /**
  100. * @brief This macro turns CLK output on or off
  101. * @param[in] sc Base address of smartcard module
  102. * @param[in] u32OnOff Clock on or off for selected smartcard module, valid values are \ref SC_CLK_ON and \ref SC_CLK_OFF
  103. * @return None
  104. * \hideinitializer
  105. */
  106. #define SC_SET_CLK_PIN(sc, u32OnOff)\
  107. do {\
  108. while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
  109. if(u32OnOff)\
  110. (sc)->PINCTL |= SC_PINCTL_CLKKEEP_Msk;\
  111. else\
  112. (sc)->PINCTL &= ~(SC_PINCTL_CLKKEEP_Msk);\
  113. }while(0)
  114. /**
  115. * @brief This macro set I/O pin state of smartcard interface
  116. * @param[in] sc Base address of smartcard module
  117. * @param[in] u32State Pin state of I/O pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
  118. * @return None
  119. * \hideinitializer
  120. */
  121. #define SC_SET_IO_PIN(sc, u32State)\
  122. do {\
  123. while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
  124. if(u32State)\
  125. (sc)->PINCTL |= SC_PINCTL_SCDOUT_Msk;\
  126. else\
  127. (sc)->PINCTL &= ~SC_PINCTL_SCDOUT_Msk;\
  128. }while(0)
  129. /**
  130. * @brief This macro set RST pin state of smartcard interface
  131. * @param[in] sc Base address of smartcard module
  132. * @param[in] u32State Pin state of RST pin, valid parameters are \ref SC_PIN_STATE_HIGH and \ref SC_PIN_STATE_LOW
  133. * @return None
  134. * \hideinitializer
  135. */
  136. #define SC_SET_RST_PIN(sc, u32State)\
  137. do {\
  138. while(sc->PINCTL & SC_PINCTL_SYNC_Msk);\
  139. if(u32State)\
  140. (sc)->PINCTL |= SC_PINCTL_SCRST_Msk;\
  141. else\
  142. (sc)->PINCTL &= ~SC_PINCTL_SCRST_Msk;\
  143. }while(0)
  144. /**
  145. * @brief This macro read one byte from smartcard module receive FIFO
  146. * @param[in] sc Base address of smartcard module
  147. * @return One byte read from receive FIFO
  148. * \hideinitializer
  149. */
  150. #define SC_READ(sc) ((char)((sc)->DAT))
  151. /**
  152. * @brief This macro write one byte to smartcard module transmit FIFO
  153. * @param[in] sc Base address of smartcard module
  154. * @param[in] u8Data Data to write to transmit FIFO
  155. * @return None
  156. * \hideinitializer
  157. */
  158. #define SC_WRITE(sc, u8Data) ((sc)->DAT = (u8Data))
  159. /**
  160. * @brief This macro set smartcard stop bit length
  161. * @param[in] sc Base address of smartcard module
  162. * @param[in] u32Len Stop bit length, ether 1 or 2.
  163. * @return None
  164. * @details Stop bit length must be 1 for T = 1 protocol and 2 for T = 0 protocol.
  165. * \hideinitializer
  166. */
  167. #define SC_SET_STOP_BIT_LEN(sc, u32Len) ((sc)->CTL = ((sc)->CTL & ~SC_CTL_NSB_Msk) | (u32Len == 1 ? SC_CTL_NSB_Msk : 0))
  168. /**
  169. * @brief Enable/Disable Tx error retry, and set Tx error retry count
  170. * @param[in] sc Base address of smartcard module
  171. * @param[in] u32Count The number of times of Tx error retry count, between 0~8. 0 means disable Tx error retry
  172. * @return None
  173. */
  174. __STATIC_INLINE void SC_SetTxRetry(SC_T *sc, uint32_t u32Count)
  175. {
  176. while(sc->CTL & SC_CTL_SYNC_Msk);
  177. // Retry count must set while enable bit disabled, so disable it first
  178. sc->CTL &= ~(SC_CTL_TXRTY_Msk | SC_CTL_TXRTYEN_Msk);
  179. if(u32Count != 0) {
  180. while(sc->CTL & SC_CTL_SYNC_Msk);
  181. sc->CTL |= ((u32Count - 1) << SC_CTL_TXRTY_Pos) | SC_CTL_TXRTYEN_Msk;
  182. }
  183. }
  184. /**
  185. * @brief Enable/Disable Rx error retry, and set Rx error retry count
  186. * @param[in] sc Base address of smartcard module
  187. * @param[in] u32Count The number of times of Rx error retry count, between 0~8. 0 means disable Rx error retry
  188. * @return None
  189. */
  190. __STATIC_INLINE void SC_SetRxRetry(SC_T *sc, uint32_t u32Count)
  191. {
  192. while(sc->CTL & SC_CTL_SYNC_Msk);
  193. // Retry count must set while enable bit disabled, so disable it first
  194. sc->CTL &= ~(SC_CTL_RXRTY_Msk | SC_CTL_RXRTYEN_Msk);
  195. if(u32Count != 0) {
  196. while(sc->CTL & SC_CTL_SYNC_Msk);
  197. sc->CTL = (sc->CTL & ~SC_CTL_RXRTY_Msk) | ((u32Count - 1) << SC_CTL_RXRTY_Pos) | SC_CTL_RXRTYEN_Msk;
  198. }
  199. }
  200. uint32_t SC_IsCardInserted(SC_T *sc);
  201. void SC_ClearFIFO(SC_T *sc);
  202. void SC_Close(SC_T *sc);
  203. void SC_Open(SC_T *sc, uint32_t u32CardDet, uint32_t u32PWR);
  204. void SC_ResetReader(SC_T *sc);
  205. void SC_SetBlockGuardTime(SC_T *sc, uint32_t u32BGT);
  206. void SC_SetCharGuardTime(SC_T *sc, uint32_t u32CGT);
  207. void SC_StopAllTimer(SC_T *sc);
  208. void SC_StartTimer(SC_T *sc, uint32_t u32TimerNum, uint32_t u32Mode, uint32_t u32ETUCount);
  209. void SC_StopTimer(SC_T *sc, uint32_t u32TimerNum);
  210. /*@}*/ /* end of group NUC472_442_SC_EXPORTED_FUNCTIONS */
  211. /*@}*/ /* end of group NUC472_442_SC_Driver */
  212. /*@}*/ /* end of group NUC472_442_Device_Driver */
  213. #ifdef __cplusplus
  214. }
  215. #endif
  216. #endif //__SC_H__
  217. /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/