uart.h 17 KB

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  1. /**************************************************************************//**
  2. * @file uart.h
  3. * @version V1.00
  4. * $Revision: 20 $
  5. * $Date: 15/11/30 1:35p $
  6. * @brief NUC472/NUC442 UART driver header file
  7. *
  8. * @note
  9. * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
  10. *****************************************************************************/
  11. #ifndef __UART_H__
  12. #define __UART_H__
  13. #ifdef __cplusplus
  14. extern "C"
  15. {
  16. #endif
  17. /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
  18. @{
  19. */
  20. /** @addtogroup NUC472_442_UART_Driver UART Driver
  21. @{
  22. */
  23. /** @addtogroup NUC472_442_UART_EXPORTED_CONSTANTS UART Exported Constants
  24. @{
  25. */
  26. /*---------------------------------------------------------------------------------------------------------*/
  27. /* UART_FCR constants definitions */
  28. /*---------------------------------------------------------------------------------------------------------*/
  29. #define UART_FIFO_RFITL_1BYTE (0x0 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte */
  30. #define UART_FIFO_RFITL_4BYTES (0x1 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes */
  31. #define UART_FIFO_RFITL_8BYTES (0x2 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes */
  32. #define UART_FIFO_RFITL_14BYTES (0x3 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes */
  33. #define UART_FIFO_RTSTRGLV_1BYTE (0x0 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte */
  34. #define UART_FIFO_RTSTRGLV_4BYTES (0x1 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes */
  35. #define UART_FIFO_RTSTRGLV_8BYTES (0x2 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes */
  36. #define UART_FIFO_RTSTRGLV_14BYTES (0x3 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes */
  37. /*---------------------------------------------------------------------------------------------------------*/
  38. /* UART_LCR constants definitions */
  39. /*---------------------------------------------------------------------------------------------------------*/
  40. #define UART_WORD_LEN_5 (0) /*!< UART_LINE setting to set UART word length to 5 bits */
  41. #define UART_WORD_LEN_6 (1) /*!< UART_LINE setting to set UART word length to 6 bits */
  42. #define UART_WORD_LEN_7 (2) /*!< UART_LINE setting to set UART word length to 7 bits */
  43. #define UART_WORD_LEN_8 (3) /*!< UART_LINE setting to set UART word length to 8 bits */
  44. #define UART_PARITY_NONE (0x0 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity */
  45. #define UART_PARITY_ODD (0x1 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity */
  46. #define UART_PARITY_EVEN (0x3 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity */
  47. #define UART_PARITY_MARK (0x5 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' */
  48. #define UART_PARITY_SPACE (0x7 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' */
  49. #define UART_STOP_BIT_1 (0x0 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit */
  50. #define UART_STOP_BIT_1_5 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length */
  51. #define UART_STOP_BIT_2 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length */
  52. /*---------------------------------------------------------------------------------------------------------*/
  53. /* UART RTS LEVEL TRIGGER constants definitions */
  54. /*---------------------------------------------------------------------------------------------------------*/
  55. #define UART_RTS_IS_HIGH_LEV_TRG (0x1 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Trigger */
  56. #define UART_RTS_IS_LOW_LEV_TRG (0x0 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Trigger */
  57. /*---------------------------------------------------------------------------------------------------------*/
  58. /* UART CTS LEVEL TRIGGER constants definitions */
  59. /*---------------------------------------------------------------------------------------------------------*/
  60. #define UART_CTS_IS_HIGH_LEV_TRG (0x1 << UART_MODEMSTS_CTSACTLV_Pos) /*!< Set CTS is High Level Trigger */
  61. #define UART_CTS_IS_LOW_LEV_TRG (0x0 << UART_MODEMSTS_CTSACTLV_Pos) /*!< Set CTS is Low Level Trigger */
  62. /*---------------------------------------------------------------------------------------------------------*/
  63. /* UART_FUNC_SEL constants definitions */
  64. /*---------------------------------------------------------------------------------------------------------*/
  65. #define UART_FUNCSEL_UART (0x0 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) */
  66. #define UART_FUNCSEL_IrDA (0x2 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function */
  67. #define UART_FUNCSEL_RS485 (0x3 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function */
  68. /*---------------------------------------------------------------------------------------------------------*/
  69. /* UART BAUDRATE MODE constants definitions */
  70. /*---------------------------------------------------------------------------------------------------------*/
  71. #define UART_BAUD_MODE0 (0) /*!< Set UART Baudrate Mode is Mode0 */
  72. #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 */
  73. /*@}*/ /* end of group NUC472_442_UART_EXPORTED_CONSTANTS */
  74. /** @addtogroup NUC472_442_UART_EXPORTED_FUNCTIONS UART Exported Functions
  75. @{
  76. */
  77. /**
  78. * @brief Calculate UART baudrate mode0 divider
  79. *
  80. * @param[in] u32SrcFreq UART clock frequency
  81. * @param[in] u32BaudRate Baudrate of UART module
  82. *
  83. * @return UART baudrate mode0 divider
  84. * \hideinitializer
  85. *
  86. */
  87. #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) (((u32SrcFreq + (u32BaudRate*8)) / u32BaudRate >> 4)-2)
  88. /**
  89. * @brief Calculate UART baudrate mode2 divider
  90. *
  91. * @param[in] u32SrcFreq UART clock frequency
  92. * @param[in] u32BaudRate Baudrate of UART module
  93. *
  94. * @return UART baudrate mode2 divider
  95. * \hideinitializer
  96. */
  97. #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) (((u32SrcFreq + (u32BaudRate/2)) / u32BaudRate)-2)
  98. /**
  99. * @brief Write Data to Tx data register
  100. *
  101. * @param[in] uart The base address of UART module.
  102. * @param[in] u8Data Data byte to transmit
  103. *
  104. * @return None
  105. * \hideinitializer
  106. */
  107. #define UART_WRITE(uart, u8Data) (uart->DAT = (u8Data))
  108. /**
  109. * @brief Read Rx data register
  110. *
  111. * @param[in] uart The base address of UART module.
  112. *
  113. * @return The oldest data byte in RX FIFO
  114. * \hideinitializer
  115. */
  116. #define UART_READ(uart) (uart->DAT)
  117. /**
  118. * @brief Get Tx empty register value.
  119. *
  120. * @param[in] uart The base address of UART module
  121. *
  122. * @return Tx empty register value.
  123. * \hideinitializer
  124. */
  125. #define UART_GET_TX_EMPTY(uart) (uart->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
  126. /**
  127. * @brief Get Rx empty register value.
  128. *
  129. * @param[in] uart The base address of UART module
  130. *
  131. * @return Rx empty register value.
  132. * \hideinitializer
  133. */
  134. #define UART_GET_RX_EMPTY(uart) (uart->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
  135. /**
  136. * @brief Check specified uart port transmission is over.
  137. *
  138. * @param[in] uart The base address of UART module
  139. *
  140. * @return TE_Flag.
  141. * \hideinitializer
  142. */
  143. #define UART_IS_TX_EMPTY(uart) ((uart->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
  144. /**
  145. * @brief Wait specified uart port transmission is over
  146. *
  147. * @param[in] uart The base address of UART module
  148. *
  149. * @return None
  150. * \hideinitializer
  151. */
  152. #define UART_WAIT_TX_EMPTY(uart) while(!(((uart->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
  153. /**
  154. * @brief Check RDA_IF is set or not
  155. *
  156. * @param[in] uart The base address of UART module
  157. *
  158. * @return
  159. * 0 : The number of bytes in the RX FIFO is less than the RFITL
  160. * 1 : The number of bytes in the RX FIFO equals or larger than RFITL
  161. * \hideinitializer
  162. */
  163. #define UART_IS_RX_READY(uart) ((uart->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
  164. /**
  165. * @brief Check TX FIFO is full or not
  166. *
  167. * @param[in] uart The base address of UART module
  168. *
  169. * @return
  170. * 1 = TX FIFO is full
  171. * 0 = TX FIFO is not full
  172. * \hideinitializer
  173. */
  174. #define UART_IS_TX_FULL(uart) ((uart->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
  175. /**
  176. * @brief Check RX FIFO is full or not
  177. *
  178. * @param[in] uart The base address of UART module
  179. *
  180. * @return
  181. * 1 = RX FIFO is full
  182. * 0 = RX FIFO is not full
  183. * \hideinitializer
  184. *
  185. */
  186. #define UART_IS_RX_FULL(uart) ((uart->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
  187. /**
  188. * @brief Get Tx full register value
  189. *
  190. * @param[in] uart The base address of UART module
  191. *
  192. * @return Tx full register value
  193. * \hideinitializer
  194. */
  195. #define UART_GET_TX_FULL(uart) (uart->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
  196. /**
  197. * @brief Get Rx full register value
  198. *
  199. * @param[in] uart The base address of UART module
  200. *
  201. * @return Rx full register value
  202. * \hideinitializer
  203. */
  204. #define UART_GET_RX_FULL(uart) (uart->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
  205. /**
  206. * @brief Enable specified interrupt
  207. *
  208. * @param[in] uart The base address of UART module
  209. * @param[in] u32eIntSel Interrupt type select
  210. * - \ref UART_INTEN_TOCNTEN_Msk : Rx Time Out interrupt
  211. * - \ref UART_INTEN_WKCTSIEN_Msk : Wakeup interrupt
  212. * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
  213. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  214. * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
  215. * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
  216. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  217. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  218. *
  219. * @return None
  220. * \hideinitializer
  221. */
  222. #define UART_ENABLE_INT(uart, u32eIntSel) (uart->INTEN |= (u32eIntSel))
  223. /**
  224. * @brief Disable specified interrupt
  225. *
  226. * @param[in] uart The base address of UART module
  227. * @param[in] u32eIntSel Interrupt type select
  228. * - \ref UART_INTEN_TOCNTEN_Msk : Rx Time Out interrupt
  229. * - \ref UART_INTEN_WKCTSIEN_Msk : Wakeup interrupt
  230. * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
  231. * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
  232. * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
  233. * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
  234. * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
  235. * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
  236. * @return None
  237. * \hideinitializer
  238. */
  239. #define UART_DISABLE_INT(uart, u32eIntSel) (uart->INTEN &= ~ (u32eIntSel))
  240. /**
  241. * @brief Get specified interrupt flag/status
  242. *
  243. * @param[in] uart The base address of UART module
  244. * @param[in] u32eIntTypeFlag Interrupt type select
  245. * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator.
  246. * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator.
  247. * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator.
  248. * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator.
  249. * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag.
  250. * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag.
  251. * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag.
  252. * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag.
  253. * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator.
  254. * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator.
  255. * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator.
  256. * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator.
  257. * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator.
  258. * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator.
  259. * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator.
  260. * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag.
  261. * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
  262. * - \ref UART_INTSTS_RXTOIF_Msk : Rx time-out interrupt Flag
  263. * - \ref UART_INTSTS_MODEMIF_Msk : Modem interrupt Flag
  264. * - \ref UART_INTSTS_RLSIF_Msk : Rx Line status interrupt Flag
  265. * - \ref UART_INTSTS_THREIF_Msk : Tx empty interrupt Flag
  266. * - \ref UART_INTSTS_RDAIF_Msk : Rx ready interrupt Flag
  267. *
  268. * @return
  269. * 0 = The specified interrupt is not happened.
  270. * 1 = The specified interrupt is happened.
  271. * \hideinitializer
  272. */
  273. #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) ((uart->INTSTS & (u32eIntTypeFlag))?1:0)
  274. /**
  275. * @brief Set RTS pin is low
  276. *
  277. * @param[in] uart The base address of UART module
  278. * @return None
  279. */
  280. __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
  281. {
  282. uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
  283. uart->MODEM &= UART_MODEM_RTS_Msk;
  284. }
  285. /**
  286. * @brief Set RTS pin is high
  287. *
  288. * @param[in] uart The base address of UART module
  289. * @return None
  290. */
  291. __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
  292. {
  293. uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
  294. }
  295. /**
  296. * @brief Clear RS-485 Address Byte Detection Flag
  297. *
  298. * @param[in] uart The base address of UART module
  299. * @return None
  300. * \hideinitializer
  301. */
  302. #define UART_RS485_CLEAR_ADDR_FLAG(uart) (uart->FIFOSTS |= UART_FIFOSTS_ADDRDETF_Msk)
  303. /**
  304. * @brief Get RS-485 Address Byte Detection Flag
  305. *
  306. * @param[in] uart The base address of UART module
  307. * @return RS-485 Address Byte Detection Flag
  308. * \hideinitializer
  309. */
  310. #define UART_RS485_GET_ADDR_FLAG(uart) ((uart->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
  311. void UART_ClearIntFlag(UART_T* uart , uint32_t u32InterruptFlag);
  312. void UART_Close(UART_T* uart );
  313. void UART_DisableFlowCtrl(UART_T* uart );
  314. void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag );
  315. void UART_EnableFlowCtrl(UART_T* uart );
  316. void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag );
  317. void UART_Open(UART_T* uart, uint32_t u32baudrate);
  318. uint32_t UART_Read(UART_T* uart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes);
  319. void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
  320. void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
  321. void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
  322. void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
  323. uint32_t UART_Write(UART_T* uart,uint8_t *pu8TxBuf, uint32_t u32WriteBytes);
  324. /*@}*/ /* end of group NUC472_442_UART_EXPORTED_FUNCTIONS */
  325. /*@}*/ /* end of group NUC472_442_UART_Driver */
  326. /*@}*/ /* end of group NUC472_442_Device_Driver */
  327. #ifdef __cplusplus
  328. }
  329. #endif
  330. #endif //__UART_H__
  331. /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/