pinmux.h 30 KB

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  1. /** @file pinmux.h
  2. * @brief PINMUX Driver Implementation File
  3. * @date 29.May.2013
  4. * @version 03.05.02
  5. *
  6. */
  7. /* (c) Texas Instruments 2009-2013, All rights reserved. */
  8. #ifndef __PINMUX_H__
  9. #define __PINMUX_H__
  10. #include "reg_pinmux.h"
  11. #define PINMUX_BALL_A5_SHIFT 8U
  12. #define PINMUX_BALL_A11_SHIFT 8U
  13. #define PINMUX_BALL_A14_SHIFT 0U
  14. #define PINMUX_BALL_B2_SHIFT 24U
  15. #define PINMUX_BALL_B3_SHIFT 8U
  16. #define PINMUX_BALL_B4_SHIFT 16U
  17. #define PINMUX_BALL_B5_SHIFT 24U
  18. #define PINMUX_BALL_B6_SHIFT 8U
  19. #define PINMUX_BALL_B11_SHIFT 8U
  20. #define PINMUX_BALL_C1_SHIFT 0U
  21. #define PINMUX_BALL_C2_SHIFT 0U
  22. #define PINMUX_BALL_C3_SHIFT 16U
  23. #define PINMUX_BALL_C4_SHIFT 16U
  24. #define PINMUX_BALL_C5_SHIFT 8U
  25. #define PINMUX_BALL_C6_SHIFT 0U
  26. #define PINMUX_BALL_C7_SHIFT 24U
  27. #define PINMUX_BALL_C8_SHIFT 16U
  28. #define PINMUX_BALL_C9_SHIFT 24U
  29. #define PINMUX_BALL_C10_SHIFT 8U
  30. #define PINMUX_BALL_C11_SHIFT 0U
  31. #define PINMUX_BALL_C12_SHIFT 16U
  32. #define PINMUX_BALL_C13_SHIFT 0U
  33. #define PINMUX_BALL_C14_SHIFT 8U
  34. #define PINMUX_BALL_C15_SHIFT 16U
  35. #define PINMUX_BALL_C16_SHIFT 8U
  36. #define PINMUX_BALL_C17_SHIFT 0U
  37. #define PINMUX_BALL_D3_SHIFT 0U
  38. #define PINMUX_BALL_D4_SHIFT 0U
  39. #define PINMUX_BALL_D5_SHIFT 0U
  40. #define PINMUX_BALL_D14_SHIFT 16U
  41. #define PINMUX_BALL_D15_SHIFT 24U
  42. #define PINMUX_BALL_D16_SHIFT 24U
  43. #define PINMUX_BALL_D17_SHIFT 16U
  44. #define PINMUX_BALL_D19_SHIFT 0U
  45. #define PINMUX_BALL_E1_SHIFT 16U
  46. #define PINMUX_BALL_E3_SHIFT 8U
  47. #define PINMUX_BALL_E5_SHIFT 16U
  48. #define PINMUX_BALL_E6_SHIFT 24U
  49. #define PINMUX_BALL_E7_SHIFT 24U
  50. #define PINMUX_BALL_E8_SHIFT 0U
  51. #define PINMUX_BALL_E9_SHIFT 24U
  52. #define PINMUX_BALL_E10_SHIFT 16U
  53. #define PINMUX_BALL_E11_SHIFT 8U
  54. #define PINMUX_BALL_E12_SHIFT 24U
  55. #define PINMUX_BALL_E13_SHIFT 0U
  56. #define PINMUX_BALL_E16_SHIFT 16U
  57. #define PINMUX_BALL_E17_SHIFT 8U
  58. #define PINMUX_BALL_E18_SHIFT 0U
  59. #define PINMUX_BALL_E19_SHIFT 0U
  60. #define PINMUX_BALL_F3_SHIFT 16U
  61. #define PINMUX_BALL_F5_SHIFT 24U
  62. #define PINMUX_BALL_G3_SHIFT 8U
  63. #define PINMUX_BALL_G5_SHIFT 8U
  64. #define PINMUX_BALL_G16_SHIFT 24U
  65. #define PINMUX_BALL_G17_SHIFT 0U
  66. #define PINMUX_BALL_G19_SHIFT 16U
  67. #define PINMUX_BALL_H3_SHIFT 16U
  68. #define PINMUX_BALL_H16_SHIFT 16U
  69. #define PINMUX_BALL_H17_SHIFT 24U
  70. #define PINMUX_BALL_H18_SHIFT 24U
  71. #define PINMUX_BALL_H19_SHIFT 16U
  72. #define PINMUX_BALL_J3_SHIFT 24U
  73. #define PINMUX_BALL_J18_SHIFT 0U
  74. #define PINMUX_BALL_J19_SHIFT 8U
  75. #define PINMUX_BALL_K2_SHIFT 8U
  76. #define PINMUX_BALL_K5_SHIFT 0U
  77. #define PINMUX_BALL_K15_SHIFT 8U
  78. #define PINMUX_BALL_K17_SHIFT 0U
  79. #define PINMUX_BALL_K18_SHIFT 0U
  80. #define PINMUX_BALL_K19_SHIFT 8U
  81. #define PINMUX_BALL_L5_SHIFT 24U
  82. #define PINMUX_BALL_L15_SHIFT 16U
  83. #define PINMUX_BALL_M1_SHIFT 0U
  84. #define PINMUX_BALL_M2_SHIFT 24U
  85. #define PINMUX_BALL_M5_SHIFT 8U
  86. #define PINMUX_BALL_M15_SHIFT 24U
  87. #define PINMUX_BALL_M17_SHIFT 8U
  88. #define PINMUX_BALL_N1_SHIFT 16U
  89. #define PINMUX_BALL_N2_SHIFT 0U
  90. #define PINMUX_BALL_N5_SHIFT 24U
  91. #define PINMUX_BALL_N15_SHIFT 8U
  92. #define PINMUX_BALL_N17_SHIFT 16U
  93. #define PINMUX_BALL_N19_SHIFT 0U
  94. #define PINMUX_BALL_P1_SHIFT 24U
  95. #define PINMUX_BALL_P5_SHIFT 8U
  96. #define PINMUX_BALL_R2_SHIFT 24U
  97. #define PINMUX_BALL_R5_SHIFT 24U
  98. #define PINMUX_BALL_R6_SHIFT 0U
  99. #define PINMUX_BALL_R7_SHIFT 24U
  100. #define PINMUX_BALL_R8_SHIFT 24U
  101. #define PINMUX_BALL_R9_SHIFT 0U
  102. #define PINMUX_BALL_T1_SHIFT 0U
  103. #define PINMUX_BALL_T12_SHIFT 24U
  104. #define PINMUX_BALL_U1_SHIFT 24U
  105. #define PINMUX_BALL_V2_SHIFT 16U
  106. #define PINMUX_BALL_V5_SHIFT 8U
  107. #define PINMUX_BALL_V6_SHIFT 16U
  108. #define PINMUX_BALL_V7_SHIFT 16U
  109. #define PINMUX_BALL_V10_SHIFT 16U
  110. #define PINMUX_BALL_W3_SHIFT 16U
  111. #define PINMUX_BALL_W5_SHIFT 8U
  112. #define PINMUX_BALL_W6_SHIFT 16U
  113. #define PINMUX_BALL_W9_SHIFT 8U
  114. #define PINMUX_BALL_W10_SHIFT 0U
  115. #define PINMUX_GATE_EMIF_CLK_SHIFT 8U
  116. #define PINMUX_GIOB_DISABLE_HET2_SHIFT 16U
  117. #define PINMUX_ALT_ADC_TRIGGER_SHIFT 0U
  118. #define PINMUX_ETHERNET_SHIFT 24U
  119. #define PINMUX_BALL_A5_MASK (~(0xFFU << PINMUX_BALL_A5_SHIFT))
  120. #define PINMUX_BALL_A11_MASK (~(0xFFU << PINMUX_BALL_A11_SHIFT))
  121. #define PINMUX_BALL_A14_MASK (~(0xFFU << PINMUX_BALL_A14_SHIFT))
  122. #define PINMUX_BALL_B2_MASK (~(0xFFU << PINMUX_BALL_B2_SHIFT))
  123. #define PINMUX_BALL_B3_MASK (~(0xFFU << PINMUX_BALL_B3_SHIFT))
  124. #define PINMUX_BALL_B4_MASK (~(0xFFU << PINMUX_BALL_B4_SHIFT))
  125. #define PINMUX_BALL_B5_MASK (~(0xFFU << PINMUX_BALL_B5_SHIFT))
  126. #define PINMUX_BALL_B6_MASK (~(0xFFU << PINMUX_BALL_B6_SHIFT))
  127. #define PINMUX_BALL_B11_MASK (~(0xFFU << PINMUX_BALL_B11_SHIFT))
  128. #define PINMUX_BALL_C1_MASK (~(0xFFU << PINMUX_BALL_C1_SHIFT))
  129. #define PINMUX_BALL_C2_MASK (~(0xFFU << PINMUX_BALL_C2_SHIFT))
  130. #define PINMUX_BALL_C3_MASK (~(0xFFU << PINMUX_BALL_C3_SHIFT))
  131. #define PINMUX_BALL_C4_MASK (~(0xFFU << PINMUX_BALL_C4_SHIFT))
  132. #define PINMUX_BALL_C5_MASK (~(0xFFU << PINMUX_BALL_C5_SHIFT))
  133. #define PINMUX_BALL_C6_MASK (~(0xFFU << PINMUX_BALL_C6_SHIFT))
  134. #define PINMUX_BALL_C7_MASK (~(0xFFU << PINMUX_BALL_C7_SHIFT))
  135. #define PINMUX_BALL_C8_MASK (~(0xFFU << PINMUX_BALL_C8_SHIFT))
  136. #define PINMUX_BALL_C9_MASK (~(0xFFU << PINMUX_BALL_C9_SHIFT))
  137. #define PINMUX_BALL_C10_MASK (~(0xFFU << PINMUX_BALL_C10_SHIFT))
  138. #define PINMUX_BALL_C11_MASK (~(0xFFU << PINMUX_BALL_C11_SHIFT))
  139. #define PINMUX_BALL_C12_MASK (~(0xFFU << PINMUX_BALL_C12_SHIFT))
  140. #define PINMUX_BALL_C13_MASK (~(0xFFU << PINMUX_BALL_C13_SHIFT))
  141. #define PINMUX_BALL_C14_MASK (~(0xFFU << PINMUX_BALL_C14_SHIFT))
  142. #define PINMUX_BALL_C15_MASK (~(0xFFU << PINMUX_BALL_C15_SHIFT))
  143. #define PINMUX_BALL_C16_MASK (~(0xFFU << PINMUX_BALL_C16_SHIFT))
  144. #define PINMUX_BALL_C17_MASK (~(0xFFU << PINMUX_BALL_C17_SHIFT))
  145. #define PINMUX_BALL_D3_MASK (~(0xFFU << PINMUX_BALL_D3_SHIFT))
  146. #define PINMUX_BALL_D4_MASK (~(0xFFU << PINMUX_BALL_D4_SHIFT))
  147. #define PINMUX_BALL_D5_MASK (~(0xFFU << PINMUX_BALL_D5_SHIFT))
  148. #define PINMUX_BALL_D14_MASK (~(0xFFU << PINMUX_BALL_D14_SHIFT))
  149. #define PINMUX_BALL_D15_MASK (~(0xFFU << PINMUX_BALL_D15_SHIFT))
  150. #define PINMUX_BALL_D16_MASK (~(0xFFU << PINMUX_BALL_D16_SHIFT))
  151. #define PINMUX_BALL_D17_MASK (~(0xFFU << PINMUX_BALL_D17_SHIFT))
  152. #define PINMUX_BALL_D19_MASK (~(0xFFU << PINMUX_BALL_D19_SHIFT))
  153. #define PINMUX_BALL_E1_MASK (~(0xFFU << PINMUX_BALL_E1_SHIFT))
  154. #define PINMUX_BALL_E3_MASK (~(0xFFU << PINMUX_BALL_E3_SHIFT))
  155. #define PINMUX_BALL_E5_MASK (~(0xFFU << PINMUX_BALL_E5_SHIFT))
  156. #define PINMUX_BALL_E6_MASK (~(0xFFU << PINMUX_BALL_E6_SHIFT))
  157. #define PINMUX_BALL_E7_MASK (~(0xFFU << PINMUX_BALL_E7_SHIFT))
  158. #define PINMUX_BALL_E8_MASK (~(0xFFU << PINMUX_BALL_E8_SHIFT))
  159. #define PINMUX_BALL_E9_MASK (~(0xFFU << PINMUX_BALL_E9_SHIFT))
  160. #define PINMUX_BALL_E10_MASK (~(0xFFU << PINMUX_BALL_E10_SHIFT))
  161. #define PINMUX_BALL_E11_MASK (~(0xFFU << PINMUX_BALL_E11_SHIFT))
  162. #define PINMUX_BALL_E12_MASK (~(0xFFU << PINMUX_BALL_E12_SHIFT))
  163. #define PINMUX_BALL_E13_MASK (~(0xFFU << PINMUX_BALL_E13_SHIFT))
  164. #define PINMUX_BALL_E16_MASK (~(0xFFU << PINMUX_BALL_E16_SHIFT))
  165. #define PINMUX_BALL_E17_MASK (~(0xFFU << PINMUX_BALL_E17_SHIFT))
  166. #define PINMUX_BALL_E18_MASK (~(0xFFU << PINMUX_BALL_E18_SHIFT))
  167. #define PINMUX_BALL_E19_MASK (~(0xFFU << PINMUX_BALL_E19_SHIFT))
  168. #define PINMUX_BALL_F3_MASK (~(0xFFU << PINMUX_BALL_F3_SHIFT))
  169. #define PINMUX_BALL_F5_MASK (~(0xFFU << PINMUX_BALL_F4_SHIFT))
  170. #define PINMUX_BALL_G3_MASK (~(0xFFU << PINMUX_BALL_G3_SHIFT))
  171. #define PINMUX_BALL_G5_MASK (~(0xFFU << PINMUX_BALL_G4_SHIFT))
  172. #define PINMUX_BALL_G16_MASK (~(0xFFU << PINMUX_BALL_G16_SHIFT))
  173. #define PINMUX_BALL_G17_MASK (~(0xFFU << PINMUX_BALL_G17_SHIFT))
  174. #define PINMUX_BALL_G19_MASK (~(0xFFU << PINMUX_BALL_G19_SHIFT))
  175. #define PINMUX_BALL_H3_MASK (~(0xFFU << PINMUX_BALL_H3_SHIFT))
  176. #define PINMUX_BALL_H16_MASK (~(0xFFU << PINMUX_BALL_H16_SHIFT))
  177. #define PINMUX_BALL_H17_MASK (~(0xFFU << PINMUX_BALL_H17_SHIFT))
  178. #define PINMUX_BALL_H18_MASK (~(0xFFU << PINMUX_BALL_H18_SHIFT))
  179. #define PINMUX_BALL_H19_MASK (~(0xFFU << PINMUX_BALL_H19_SHIFT))
  180. #define PINMUX_BALL_J3_MASK (~(0xFFU << PINMUX_BALL_J3_SHIFT))
  181. #define PINMUX_BALL_J18_MASK (~(0xFFU << PINMUX_BALL_J18_SHIFT))
  182. #define PINMUX_BALL_J19_MASK (~(0xFFU << PINMUX_BALL_J19_SHIFT))
  183. #define PINMUX_BALL_K2_MASK (~(0xFFU << PINMUX_BALL_K2_SHIFT))
  184. #define PINMUX_BALL_K5_MASK (~(0xFFU << PINMUX_BALL_K4_SHIFT))
  185. #define PINMUX_BALL_K15_MASK (~(0xFFU << PINMUX_BALL_K15_SHIFT))
  186. #define PINMUX_BALL_K17_MASK (~(0xFFU << PINMUX_BALL_K17_SHIFT))
  187. #define PINMUX_BALL_K18_MASK (~(0xFFU << PINMUX_BALL_K18_SHIFT))
  188. #define PINMUX_BALL_K19_MASK (~(0xFFU << PINMUX_BALL_K19_SHIFT))
  189. #define PINMUX_BALL_L5_MASK (~(0xFFU << PINMUX_BALL_L4_SHIFT))
  190. #define PINMUX_BALL_L15_MASK (~(0xFFU << PINMUX_BALL_L15_SHIFT))
  191. #define PINMUX_BALL_M1_MASK (~(0xFFU << PINMUX_BALL_M1_SHIFT))
  192. #define PINMUX_BALL_M2_MASK (~(0xFFU << PINMUX_BALL_M2_SHIFT))
  193. #define PINMUX_BALL_M5_MASK (~(0xFFU << PINMUX_BALL_M4_SHIFT))
  194. #define PINMUX_BALL_M15_MASK (~(0xFFU << PINMUX_BALL_M15_SHIFT))
  195. #define PINMUX_BALL_M17_MASK (~(0xFFU << PINMUX_BALL_M17_SHIFT))
  196. #define PINMUX_BALL_N1_MASK (~(0xFFU << PINMUX_BALL_N1_SHIFT))
  197. #define PINMUX_BALL_N2_MASK (~(0xFFU << PINMUX_BALL_N2_SHIFT))
  198. #define PINMUX_BALL_N5_MASK (~(0xFFU << PINMUX_BALL_N4_SHIFT))
  199. #define PINMUX_BALL_N15_MASK (~(0xFFU << PINMUX_BALL_N15_SHIFT))
  200. #define PINMUX_BALL_N17_MASK (~(0xFFU << PINMUX_BALL_N17_SHIFT))
  201. #define PINMUX_BALL_N19_MASK (~(0xFFU << PINMUX_BALL_N19_SHIFT))
  202. #define PINMUX_BALL_P1_MASK (~(0xFFU << PINMUX_BALL_P1_SHIFT))
  203. #define PINMUX_BALL_P5_MASK (~(0xFFU << PINMUX_BALL_P4_SHIFT))
  204. #define PINMUX_BALL_R2_MASK (~(0xFFU << PINMUX_BALL_R2_SHIFT))
  205. #define PINMUX_BALL_R5_MASK (~(0xFFU << PINMUX_BALL_R5_SHIFT))
  206. #define PINMUX_BALL_R6_MASK (~(0xFFU << PINMUX_BALL_R6_SHIFT))
  207. #define PINMUX_BALL_R7_MASK (~(0xFFU << PINMUX_BALL_R7_SHIFT))
  208. #define PINMUX_BALL_R8_MASK (~(0xFFU << PINMUX_BALL_R8_SHIFT))
  209. #define PINMUX_BALL_R9_MASK (~(0xFFU << PINMUX_BALL_R9_SHIFT))
  210. #define PINMUX_BALL_T1_MASK (~(0xFFU << PINMUX_BALL_T1_SHIFT))
  211. #define PINMUX_BALL_T12_MASK (~(0xFFU << PINMUX_BALL_T12_SHIFT))
  212. #define PINMUX_BALL_U1_MASK (~(0xFFU << PINMUX_BALL_U1_SHIFT))
  213. #define PINMUX_BALL_V2_MASK (~(0xFFU << PINMUX_BALL_V2_SHIFT))
  214. #define PINMUX_BALL_V5_MASK (~(0xFFU << PINMUX_BALL_V5_SHIFT))
  215. #define PINMUX_BALL_V6_MASK (~(0xFFU << PINMUX_BALL_V6_SHIFT))
  216. #define PINMUX_BALL_V7_MASK (~(0xFFU << PINMUX_BALL_V7_SHIFT))
  217. #define PINMUX_BALL_V10_MASK (~(0xFFU << PINMUX_BALL_V10_SHIFT))
  218. #define PINMUX_BALL_W3_MASK (~(0xFFU << PINMUX_BALL_W3_SHIFT))
  219. #define PINMUX_BALL_W5_MASK (~(0xFFU << PINMUX_BALL_W5_SHIFT))
  220. #define PINMUX_BALL_W6_MASK (~(0xFFU << PINMUX_BALL_W6_SHIFT))
  221. #define PINMUX_BALL_W9_MASK (~(0xFFU << PINMUX_BALL_W9_SHIFT))
  222. #define PINMUX_BALL_W10_MASK (~(0xFFU << PINMUX_BALL_W10_SHIFT))
  223. #define PINMUX_GATE_EMIF_CLK_MASK (~(0xFFU << PINMUX_GATE_EMIF_CLK_SHIFT))
  224. #define PINMUX_GIOB_DISABLE_HET2_MASK (~(0xFFU << PINMUX_GIOB_DISABLE_HET2_SHIFT))
  225. #define PINMUX_ALT_ADC_TRIGGER_MASK (~(0xFFU << PINMUX_ALT_ADC_TRIGGER_SHIFT))
  226. #define PINMUX_ETHERNET_MASK (~(0xFFU << PINMUX_ETHERNET_SHIFT))
  227. #define PINMUX_BALL_A5_GIOA_0 (0x1U << PINMUX_BALL_A5_SHIFT)
  228. #define PINMUX_BALL_A5_OHCI_PRT_RcvDpls_1 (0x2U << PINMUX_BALL_A5_SHIFT)
  229. #define PINMUX_BALL_A5_W2FC_RXDPI (0x4U << PINMUX_BALL_A5_SHIFT)
  230. #define PINMUX_BALL_A11_HET1_14 (0x1U << PINMUX_BALL_A11_SHIFT)
  231. #define PINMUX_BALL_A11_OHCI_RCFG_txSe0_0 (0x2U << PINMUX_BALL_A11_SHIFT)
  232. #define PINMUX_BALL_A14_HET1_26 (0x1U << PINMUX_BALL_A14_SHIFT)
  233. #define PINMUX_BALL_A14_MII_RXD_1 (0x2U << PINMUX_BALL_A14_SHIFT)
  234. #define PINMUX_BALL_A14_RMII_RXD_1 (0x4U << PINMUX_BALL_A14_SHIFT)
  235. #define PINMUX_BALL_B2_MIBSPI3NCS_2 (0x1U << PINMUX_BALL_B2_SHIFT)
  236. #define PINMUX_BALL_B2_I2C_SDA (0x2U << PINMUX_BALL_B2_SHIFT)
  237. #define PINMUX_BALL_B2_HET1_27 (0x4U << PINMUX_BALL_B2_SHIFT)
  238. #define PINMUX_BALL_B3_HET1_22 (0x1U << PINMUX_BALL_B3_SHIFT)
  239. #define PINMUX_BALL_B3_OHCI_RCFG_txSe0_1 (0x2U << PINMUX_BALL_B3_SHIFT)
  240. #define PINMUX_BALL_B3_W2FC_SE0O (0x4U << PINMUX_BALL_B3_SHIFT)
  241. #define PINMUX_BALL_B4_HET1_12 (0x1U << PINMUX_BALL_B4_SHIFT)
  242. #define PINMUX_BALL_B4_MII_CRS (0x2U << PINMUX_BALL_B4_SHIFT)
  243. #define PINMUX_BALL_B4_RMII_CRS_DV (0x4U << PINMUX_BALL_B4_SHIFT)
  244. #define PINMUX_BALL_B5_GIOA_5 (0x1U << PINMUX_BALL_B5_SHIFT)
  245. #define PINMUX_BALL_B5_EXTCLKIN (0x2U << PINMUX_BALL_B5_SHIFT)
  246. #define PINMUX_BALL_B6_MIBSPI5NCS_1 (0x1U << PINMUX_BALL_B6_SHIFT)
  247. #define PINMUX_BALL_B6_DMM_DATA_6 (0x2U << PINMUX_BALL_B6_SHIFT)
  248. #define PINMUX_BALL_B11_HET1_30 (0x1U << PINMUX_BALL_B11_SHIFT)
  249. #define PINMUX_BALL_B11_MII_RX_DV (0x2U << PINMUX_BALL_B11_SHIFT)
  250. #define PINMUX_BALL_B11_OHCI_RCFG_speed_0 (0x4U << PINMUX_BALL_B11_SHIFT)
  251. #define PINMUX_BALL_C1_GIOA_2 (0x1U << PINMUX_BALL_C1_SHIFT)
  252. #define PINMUX_BALL_C1_OHCI_RCFG_txdPls_1 (0x2U << PINMUX_BALL_C1_SHIFT)
  253. #define PINMUX_BALL_C1_W2FC_TXDO (0x4U << PINMUX_BALL_C1_SHIFT)
  254. #define PINMUX_BALL_C1_HET2_0 (0x8U << PINMUX_BALL_C1_SHIFT)
  255. #define PINMUX_BALL_C2_GIOA_1 (0x1U << PINMUX_BALL_C2_SHIFT)
  256. #define PINMUX_BALL_C2_OHCI_PRT_RcvDmns_1 (0x2U << PINMUX_BALL_C2_SHIFT)
  257. #define PINMUX_BALL_C2_W2FC_RXDMI (0x4U << PINMUX_BALL_C2_SHIFT)
  258. #define PINMUX_BALL_C3_MIBSPI3NCS_3 (0x1U << PINMUX_BALL_C3_SHIFT)
  259. #define PINMUX_BALL_C3_I2C_SCL (0x2U << PINMUX_BALL_C3_SHIFT)
  260. #define PINMUX_BALL_C3_HET1_29 (0x4U << PINMUX_BALL_C3_SHIFT)
  261. #define PINMUX_BALL_C4_EMIF_ADDR_6 (0x1U << PINMUX_BALL_C4_SHIFT)
  262. #define PINMUX_BALL_C4_RTP_DATA_13 (0x2U << PINMUX_BALL_C4_SHIFT)
  263. #define PINMUX_BALL_C4_HET2_11 (0x4U << PINMUX_BALL_C4_SHIFT)
  264. #define PINMUX_BALL_C5_EMIF_ADDR_7 (0x1U << PINMUX_BALL_C5_SHIFT)
  265. #define PINMUX_BALL_C5_RTP_DATA_12 (0x2U << PINMUX_BALL_C5_SHIFT)
  266. #define PINMUX_BALL_C5_HET2_13 (0x4U << PINMUX_BALL_C5_SHIFT)
  267. #define PINMUX_BALL_C6_EMIF_ADDR_8 (0x1U << PINMUX_BALL_C6_SHIFT)
  268. #define PINMUX_BALL_C6_RTP_DATA_11 (0x2U << PINMUX_BALL_C6_SHIFT)
  269. #define PINMUX_BALL_C6_HET2_15 (0x4U << PINMUX_BALL_C6_SHIFT)
  270. #define PINMUX_BALL_C7_EMIF_ADDR_9 (0x1U << PINMUX_BALL_C7_SHIFT)
  271. #define PINMUX_BALL_C7_RTP_DATA_10 (0x2U << PINMUX_BALL_C7_SHIFT)
  272. #define PINMUX_BALL_C8_EMIF_ADDR_10 (0x1U << PINMUX_BALL_C8_SHIFT)
  273. #define PINMUX_BALL_C8_RTP_DATA_09 (0x2U << PINMUX_BALL_C8_SHIFT)
  274. #define PINMUX_BALL_C9_EMIF_ADDR_11 (0x1U << PINMUX_BALL_C9_SHIFT)
  275. #define PINMUX_BALL_C9_RTP_DATA_08 (0x2U << PINMUX_BALL_C9_SHIFT)
  276. #define PINMUX_BALL_C10_EMIF_ADDR_12 (0x1U << PINMUX_BALL_C10_SHIFT)
  277. #define PINMUX_BALL_C10_RTP_DATA_06 (0x2U << PINMUX_BALL_C10_SHIFT)
  278. #define PINMUX_BALL_C11_EMIF_ADDR_13 (0x1U << PINMUX_BALL_C11_SHIFT)
  279. #define PINMUX_BALL_C11_RTP_DATA_05 (0x2U << PINMUX_BALL_C11_SHIFT)
  280. #define PINMUX_BALL_C12_EMIF_ADDR_14 (0x1U << PINMUX_BALL_C12_SHIFT)
  281. #define PINMUX_BALL_C12_RTP_DATA_04 (0x2U << PINMUX_BALL_C12_SHIFT)
  282. #define PINMUX_BALL_C13_EMIF_ADDR_15 (0x1U << PINMUX_BALL_C13_SHIFT)
  283. #define PINMUX_BALL_C13_RTP_DATA_03 (0x2U << PINMUX_BALL_C13_SHIFT)
  284. #define PINMUX_BALL_C14_EMIF_ADDR_17 (0x1U << PINMUX_BALL_C14_SHIFT)
  285. #define PINMUX_BALL_C14_RTP_DATA_01 (0x2U << PINMUX_BALL_C14_SHIFT)
  286. #define PINMUX_BALL_C15_EMIF_ADDR_19 (0x1U << PINMUX_BALL_C15_SHIFT)
  287. #define PINMUX_BALL_C15_RTP_nENA (0x2U << PINMUX_BALL_C15_SHIFT)
  288. #define PINMUX_BALL_C16_EMIF_ADDR_20 (0x1U << PINMUX_BALL_C16_SHIFT)
  289. #define PINMUX_BALL_C16_RTP_nSYNC (0x2U << PINMUX_BALL_C16_SHIFT)
  290. #define PINMUX_BALL_C17_EMIF_ADDR_21 (0x1U << PINMUX_BALL_C17_SHIFT)
  291. #define PINMUX_BALL_C17_RTP_CLK (0x2U << PINMUX_BALL_C17_SHIFT)
  292. #define PINMUX_BALL_D3_SPI2NENA (0x1U << PINMUX_BALL_D3_SHIFT)
  293. #define PINMUX_BALL_D3_SPI2NCS_1 (0x2U << PINMUX_BALL_D3_SHIFT)
  294. #define PINMUX_BALL_D4_EMIF_ADDR_0 (0x1U << PINMUX_BALL_D4_SHIFT)
  295. #define PINMUX_BALL_D4_HET2_1 (0x2U << PINMUX_BALL_D4_SHIFT)
  296. #define PINMUX_BALL_D5_EMIF_ADDR_1 (0x1U << PINMUX_BALL_D5_SHIFT)
  297. #define PINMUX_BALL_D5_HET2_3 (0x2U << PINMUX_BALL_D5_SHIFT)
  298. #define PINMUX_BALL_D14_EMIF_ADDR_16 (0x1U << PINMUX_BALL_D14_SHIFT)
  299. #define PINMUX_BALL_D14_RTP_DATA_02 (0x2U << PINMUX_BALL_D14_SHIFT)
  300. #define PINMUX_BALL_D15_EMIF_ADDR_18 (0x1U << PINMUX_BALL_D15_SHIFT)
  301. #define PINMUX_BALL_D15_RTP_DATA_0 (0x2U << PINMUX_BALL_D15_SHIFT)
  302. #define PINMUX_BALL_D16_EMIF_BA_1 (0x1U << PINMUX_BALL_D16_SHIFT)
  303. #define PINMUX_BALL_D16_HET2_5 (0x2U << PINMUX_BALL_D16_SHIFT)
  304. #define PINMUX_BALL_D17_EMIF_nWE (0x1U << PINMUX_BALL_D17_SHIFT)
  305. #define PINMUX_BALL_D17_EMIF_RNW (0x2U << PINMUX_BALL_D17_SHIFT)
  306. #define PINMUX_BALL_D19_HET1_10 (0x1U << PINMUX_BALL_D19_SHIFT)
  307. #define PINMUX_BALL_D19_MII_TX_CLK (0x2U << PINMUX_BALL_D19_SHIFT)
  308. #define PINMUX_BALL_D19_OHCI_RCFG_txEnL_0 (0x4U << PINMUX_BALL_D19_SHIFT)
  309. #define PINMUX_BALL_D19_MII_TX_AVCLK4 (0x8U << PINMUX_BALL_D19_SHIFT)
  310. #define PINMUX_BALL_E1_GIOA_3 (0x1U << PINMUX_BALL_E1_SHIFT)
  311. #define PINMUX_BALL_E1_HET2_2 (0x2U << PINMUX_BALL_E1_SHIFT)
  312. #define PINMUX_BALL_E3_HET1_11 (0x1U << PINMUX_BALL_E3_SHIFT)
  313. #define PINMUX_BALL_E3_MIBSPI3NCS_4 (0x2U << PINMUX_BALL_E3_SHIFT)
  314. #define PINMUX_BALL_E3_HET2_18 (0x4U << PINMUX_BALL_E3_SHIFT)
  315. #define PINMUX_BALL_E3_OHCI_PRT_OvrCurrent_1 (0x8U << PINMUX_BALL_E3_SHIFT)
  316. #define PINMUX_BALL_E3_W2FC_VBUSI (0x10U << PINMUX_BALL_E3_SHIFT)
  317. #define PINMUX_BALL_E5_ETMDATA_20 (0x1U << PINMUX_BALL_E5_SHIFT)
  318. #define PINMUX_BALL_E5_EMIF_DATA_4 (0x2U << PINMUX_BALL_E5_SHIFT)
  319. #define PINMUX_BALL_E6_ETMDATA_11 (0x1U << PINMUX_BALL_E6_SHIFT)
  320. #define PINMUX_BALL_E6_EMIF_ADDR_2 (0x2U << PINMUX_BALL_E6_SHIFT)
  321. #define PINMUX_BALL_E7_ETMDATA_10 (0x1U << PINMUX_BALL_E7_SHIFT)
  322. #define PINMUX_BALL_E7_EMIF_ADDR_3 (0x2U << PINMUX_BALL_E7_SHIFT)
  323. #define PINMUX_BALL_E8_ETMDATA_09 (0x1U << PINMUX_BALL_E8_SHIFT)
  324. #define PINMUX_BALL_E8_EMIF_ADDR_4 (0x2U << PINMUX_BALL_E8_SHIFT)
  325. #define PINMUX_BALL_E9_ETMDATA_08 (0x1U << PINMUX_BALL_E9_SHIFT)
  326. #define PINMUX_BALL_E9_EMIF_ADDR_5 (0x2U << PINMUX_BALL_E9_SHIFT)
  327. #define PINMUX_BALL_E10_ETMDATA_15 (0x1U << PINMUX_BALL_E10_SHIFT)
  328. #define PINMUX_BALL_E10_EMIF_nDQM_0 (0x2U << PINMUX_BALL_E10_SHIFT)
  329. #define PINMUX_BALL_E11_ETMDATA_14 (0x1U << PINMUX_BALL_E11_SHIFT)
  330. #define PINMUX_BALL_E11_EMIF_nDQM_1 (0x2U << PINMUX_BALL_E11_SHIFT)
  331. #define PINMUX_BALL_E12_ETMDATA_13 (0x1U << PINMUX_BALL_E12_SHIFT)
  332. #define PINMUX_BALL_E12_EMIF_nOE (0x2U << PINMUX_BALL_E12_SHIFT)
  333. #define PINMUX_BALL_E13_ETMDATA_12 (0x1U << PINMUX_BALL_E13_SHIFT)
  334. #define PINMUX_BALL_E13_EMIF_BA_0 (0x2U << PINMUX_BALL_E13_SHIFT)
  335. #define PINMUX_BALL_E16_MIBSPI5SIMO_1 (0x1U << PINMUX_BALL_E16_SHIFT)
  336. #define PINMUX_BALL_E16_DMM_DATA_9 (0x2U << PINMUX_BALL_E16_SHIFT)
  337. #define PINMUX_BALL_E17_MIBSPI5SOMI_1 (0x1U << PINMUX_BALL_E17_SHIFT)
  338. #define PINMUX_BALL_E17_DMM_DATA_13 (0x2U << PINMUX_BALL_E17_SHIFT)
  339. #define PINMUX_BALL_E18_HET1_08 (0x1U << PINMUX_BALL_E18_SHIFT)
  340. #define PINMUX_BALL_E18_MIBSPI1SIMO_1 (0x2U << PINMUX_BALL_E18_SHIFT)
  341. #define PINMUX_BALL_E18_MII_TXD_3 (0x4U << PINMUX_BALL_E18_SHIFT)
  342. #define PINMUX_BALL_E18_OHCI_PRT_OvrCurrent_0 (0x8U << PINMUX_BALL_E18_SHIFT)
  343. #define PINMUX_BALL_E19_MIBSPI5NCS_0 (0x1U << PINMUX_BALL_E19_SHIFT)
  344. #define PINMUX_BALL_E19_DMM_DATA_5 (0x2U << PINMUX_BALL_E19_SHIFT)
  345. #define PINMUX_BALL_F3_MIBSPI1NCS_1 (0x1U << PINMUX_BALL_F3_SHIFT)
  346. #define PINMUX_BALL_F3_HET1_17 (0x2U << PINMUX_BALL_F3_SHIFT)
  347. #define PINMUX_BALL_F3_MII_COL (0x4U << PINMUX_BALL_F3_SHIFT)
  348. #define PINMUX_BALL_F3_OHCI_RCFG_suspend_0 (0x8U << PINMUX_BALL_F3_SHIFT)
  349. #define PINMUX_BALL_F5_ETMDATA_21 (0x1U << PINMUX_BALL_F5_SHIFT)
  350. #define PINMUX_BALL_F5_EMIF_DATA_5 (0x2U << PINMUX_BALL_F5_SHIFT)
  351. #define PINMUX_BALL_G3_MIBSPI1NCS_2 (0x1U << PINMUX_BALL_G3_SHIFT)
  352. #define PINMUX_BALL_G3_HET1_19 (0x2U << PINMUX_BALL_G3_SHIFT)
  353. #define PINMUX_BALL_G3_MDIO (0x4U << PINMUX_BALL_G3_SHIFT)
  354. #define PINMUX_BALL_G5_ETMDATA_22 (0x1U << PINMUX_BALL_G5_SHIFT)
  355. #define PINMUX_BALL_G5_EMIF_DATA_6 (0x2U << PINMUX_BALL_G5_SHIFT)
  356. #define PINMUX_BALL_G16_MIBSPI5SOMI_3 (0x1U << PINMUX_BALL_G16_SHIFT)
  357. #define PINMUX_BALL_G16_DMM_DATA_15 (0x2U << PINMUX_BALL_G16_SHIFT)
  358. #define PINMUX_BALL_G17_MIBSPI5SIMO_3 (0x1U << PINMUX_BALL_G17_SHIFT)
  359. #define PINMUX_BALL_G17_DMM_DATA_11 (0x2U << PINMUX_BALL_G17_SHIFT)
  360. #define PINMUX_BALL_G19_MIBSPI1NENA (0x1U << PINMUX_BALL_G19_SHIFT)
  361. #define PINMUX_BALL_G19_HET1_23 (0x2U << PINMUX_BALL_G19_SHIFT)
  362. #define PINMUX_BALL_G19_MII_RXD_2 (0x4U << PINMUX_BALL_G19_SHIFT)
  363. #define PINMUX_BALL_G19_OHCI_PRT_RcvDpls_0 (0x8U << PINMUX_BALL_G19_SHIFT)
  364. #define PINMUX_BALL_H3_GIOA_6 (0x1U << PINMUX_BALL_H3_SHIFT)
  365. #define PINMUX_BALL_H3_HET2_4 (0x2U << PINMUX_BALL_H3_SHIFT)
  366. #define PINMUX_BALL_H16_MIBSPI5SOMI_2 (0x1U << PINMUX_BALL_H16_SHIFT)
  367. #define PINMUX_BALL_H16_DMM_DATA_14 (0x2U << PINMUX_BALL_H16_SHIFT)
  368. #define PINMUX_BALL_H17_MIBSPI5SIMO_2 (0x1U << PINMUX_BALL_H17_SHIFT)
  369. #define PINMUX_BALL_H17_DMM_DATA_10 (0x2U << PINMUX_BALL_H17_SHIFT)
  370. #define PINMUX_BALL_H18_MIBSPI5NENA (0x1U << PINMUX_BALL_H18_SHIFT)
  371. #define PINMUX_BALL_H18_DMM_DATA_7 (0x2U << PINMUX_BALL_H18_SHIFT)
  372. #define PINMUX_BALL_H18_MII_RXD_3 (0x4U << PINMUX_BALL_H18_SHIFT)
  373. #define PINMUX_BALL_H18_OHCI_PRT_RcvDmns_0 (0x8U << PINMUX_BALL_H18_SHIFT)
  374. #define PINMUX_BALL_H19_MIBSPI5CLK (0x1U << PINMUX_BALL_H19_SHIFT)
  375. #define PINMUX_BALL_H19_DMM_DATA_4 (0x2U << PINMUX_BALL_H19_SHIFT)
  376. #define PINMUX_BALL_H19_MII_TXEN (0x4U << PINMUX_BALL_H19_SHIFT)
  377. #define PINMUX_BALL_H19_RMII_TXEN (0x8U << PINMUX_BALL_H19_SHIFT)
  378. #define PINMUX_BALL_J3_MIBSPI1NCS_3 (0x1U << PINMUX_BALL_J3_SHIFT)
  379. #define PINMUX_BALL_J3_HET1_21 (0x2U << PINMUX_BALL_J3_SHIFT)
  380. #define PINMUX_BALL_J18_MIBSPI5SOMI_0 (0x1U << PINMUX_BALL_J18_SHIFT)
  381. #define PINMUX_BALL_J18_DMM_DATA_12 (0x2U << PINMUX_BALL_J18_SHIFT)
  382. #define PINMUX_BALL_J18_MII_TXD_0 (0x4U << PINMUX_BALL_J18_SHIFT)
  383. #define PINMUX_BALL_J18_RMII_TXD_0 (0x8U << PINMUX_BALL_J18_SHIFT)
  384. #define PINMUX_BALL_J19_MIBSPI5SIMO_0 (0x1U << PINMUX_BALL_J19_SHIFT)
  385. #define PINMUX_BALL_J19_DMM_DATA_8 (0x2U << PINMUX_BALL_J19_SHIFT)
  386. #define PINMUX_BALL_J19_MII_TXD_1 (0x4U << PINMUX_BALL_J19_SHIFT)
  387. #define PINMUX_BALL_J19_RMII_TXD_1 (0x8U << PINMUX_BALL_J19_SHIFT)
  388. #define PINMUX_BALL_K2_GIOB_1 (0x1U << PINMUX_BALL_K2_SHIFT)
  389. #define PINMUX_BALL_K2_OHCI_RCFG_PrtPower_0 (0x2U << PINMUX_BALL_K2_SHIFT)
  390. #define PINMUX_BALL_K5_ETMDATA_23 (0x1U << PINMUX_BALL_K5_SHIFT)
  391. #define PINMUX_BALL_K5_EMIF_DATA_7 (0x2U << PINMUX_BALL_K5_SHIFT)
  392. #define PINMUX_BALL_K15_ETMDATA_16 (0x1U << PINMUX_BALL_K15_SHIFT)
  393. #define PINMUX_BALL_K15_EMIF_DATA_0 (0x2U << PINMUX_BALL_K15_SHIFT)
  394. #define PINMUX_BALL_K17_EMIF_nCS_3 (0x1U << PINMUX_BALL_K17_SHIFT)
  395. #define PINMUX_BALL_K17_RTP_DATA_14 (0x2U << PINMUX_BALL_K17_SHIFT)
  396. #define PINMUX_BALL_K17_HET2_9 (0x4U << PINMUX_BALL_K17_SHIFT)
  397. #define PINMUX_BALL_K18_HET1_0 (0x1U << PINMUX_BALL_K18_SHIFT)
  398. #define PINMUX_BALL_K18_SPI4CLK (0x2U << PINMUX_BALL_K18_SHIFT)
  399. #define PINMUX_BALL_K19_HET1_28 (0x1U << PINMUX_BALL_K19_SHIFT)
  400. #define PINMUX_BALL_K19_MII_RXCLK (0x2U << PINMUX_BALL_K19_SHIFT)
  401. #define PINMUX_BALL_K19_RMII_REFCLK (0x4U << PINMUX_BALL_K19_SHIFT)
  402. #define PINMUX_BALL_K19_MII_RX_AVCLK4 (0x8U << PINMUX_BALL_K19_SHIFT)
  403. #define PINMUX_BALL_L5_ETMDATA_24 (0x1U << PINMUX_BALL_L5_SHIFT)
  404. #define PINMUX_BALL_L5_EMIF_DATA_8 (0x2U << PINMUX_BALL_L5_SHIFT)
  405. #define PINMUX_BALL_L15_ETMDATA_17 (0x1U << PINMUX_BALL_L15_SHIFT)
  406. #define PINMUX_BALL_L15_EMIF_DATA_1 (0x2U << PINMUX_BALL_L15_SHIFT)
  407. #define PINMUX_BALL_M1_GIOA_7 (0x1U << PINMUX_BALL_M1_SHIFT)
  408. #define PINMUX_BALL_M1_HET2_6 (0x2U << PINMUX_BALL_M1_SHIFT)
  409. #define PINMUX_BALL_M2_GIOB_0 (0x1U << PINMUX_BALL_M2_SHIFT)
  410. #define PINMUX_BALL_M2_OHCI_RCFG_txDpls_0 (0x2U << PINMUX_BALL_M2_SHIFT)
  411. #define PINMUX_BALL_M5_ETMDATA_25 (0x1U << PINMUX_BALL_M5_SHIFT)
  412. #define PINMUX_BALL_M5_EMIF_DATA_9 (0x2U << PINMUX_BALL_M5_SHIFT)
  413. #define PINMUX_BALL_M15_ETMDATA_18 (0x1U << PINMUX_BALL_M15_SHIFT)
  414. #define PINMUX_BALL_M15_EMIF_DATA_2 (0x2U << PINMUX_BALL_M15_SHIFT)
  415. #define PINMUX_BALL_M17_EMIF_nCS_4 (0x1U << PINMUX_BALL_M17_SHIFT)
  416. #define PINMUX_BALL_M17_RTP_DATA_07 (0x2U << PINMUX_BALL_M17_SHIFT)
  417. #define PINMUX_BALL_N1_HET1_15 (0x1U << PINMUX_BALL_N1_SHIFT)
  418. #define PINMUX_BALL_N1_MIBSPI1NCS_4 (0x2U << PINMUX_BALL_N1_SHIFT)
  419. #define PINMUX_BALL_N2_HET1_13 (0x1U << PINMUX_BALL_N2_SHIFT)
  420. #define PINMUX_BALL_N2_SCITX (0x2U << PINMUX_BALL_N2_SHIFT)
  421. #define PINMUX_BALL_N5_ETMDATA_26 (0x1U << PINMUX_BALL_N5_SHIFT)
  422. #define PINMUX_BALL_N5_EMIF_DATA_10 (0x2U << PINMUX_BALL_N5_SHIFT)
  423. #define PINMUX_BALL_N15_ETMDATA_19 (0x1U << PINMUX_BALL_N15_SHIFT)
  424. #define PINMUX_BALL_N15_EMIF_DATA_3 (0x2U << PINMUX_BALL_N15_SHIFT)
  425. #define PINMUX_BALL_N17_EMIF_nCS_0 (0x1U << PINMUX_BALL_N17_SHIFT)
  426. #define PINMUX_BALL_N17_RTP_DATA_15 (0x2U << PINMUX_BALL_N17_SHIFT)
  427. #define PINMUX_BALL_N17_HET2_7 (0x4U << PINMUX_BALL_N17_SHIFT)
  428. #define PINMUX_BALL_N19_AD1EVT (0x1U << PINMUX_BALL_N19_SHIFT)
  429. #define PINMUX_BALL_N19_MII_RX_ER (0x2U << PINMUX_BALL_N19_SHIFT)
  430. #define PINMUX_BALL_N19_RMII_RX_ER (0x4U << PINMUX_BALL_N19_SHIFT)
  431. #define PINMUX_BALL_P1_HET1_24 (0x1U << PINMUX_BALL_P1_SHIFT)
  432. #define PINMUX_BALL_P1_MIBSPI1NCS_5 (0x2U << PINMUX_BALL_P1_SHIFT)
  433. #define PINMUX_BALL_P1_MII_RXD_0 (0x4U << PINMUX_BALL_P1_SHIFT)
  434. #define PINMUX_BALL_P1_RMII_RXD_0 (0x8U << PINMUX_BALL_P1_SHIFT)
  435. #define PINMUX_BALL_P5_ETMDATA_27 (0x1U << PINMUX_BALL_P5_SHIFT)
  436. #define PINMUX_BALL_P5_EMIF_DATA_11 (0x2U << PINMUX_BALL_P5_SHIFT)
  437. #define PINMUX_BALL_R2_MIBSPI1NCS_0 (0x1U << PINMUX_BALL_R2_SHIFT)
  438. #define PINMUX_BALL_R2_MIBSPI1SOMI_1 (0x2U << PINMUX_BALL_R2_SHIFT)
  439. #define PINMUX_BALL_R2_MII_TXD_2 (0x4U << PINMUX_BALL_R2_SHIFT)
  440. #define PINMUX_BALL_R2_OHCI_PRT_RcvData_0 (0x8U << PINMUX_BALL_R2_SHIFT)
  441. #define PINMUX_BALL_R5_ETMDATA_28 (0x1U << PINMUX_BALL_R5_SHIFT)
  442. #define PINMUX_BALL_R5_EMIF_DATA_12 (0x2U << PINMUX_BALL_R5_SHIFT)
  443. #define PINMUX_BALL_R6_ETMDATA_29 (0x1U << PINMUX_BALL_R6_SHIFT)
  444. #define PINMUX_BALL_R6_EMIF_DATA_13 (0x2U << PINMUX_BALL_R6_SHIFT)
  445. #define PINMUX_BALL_R7_ETMDATA_30 (0x1U << PINMUX_BALL_R7_SHIFT)
  446. #define PINMUX_BALL_R7_EMIF_DATA_14 (0x2U << PINMUX_BALL_R7_SHIFT)
  447. #define PINMUX_BALL_R8_ETMDATA_31 (0x1U << PINMUX_BALL_R8_SHIFT)
  448. #define PINMUX_BALL_R8_EMIF_DATA_15 (0x2U << PINMUX_BALL_R8_SHIFT)
  449. #define PINMUX_BALL_R9_ETMTRACECLKIN (0x1U << PINMUX_BALL_R9_SHIFT)
  450. #define PINMUX_BALL_R9_EXTCLKIN2 (0x2U << PINMUX_BALL_R9_SHIFT)
  451. #define PINMUX_BALL_T1_HET1_07 (0x1U << PINMUX_BALL_T1_SHIFT)
  452. #define PINMUX_BALL_T1_OHCI_RCFG_PrtPower_1 (0x2U << PINMUX_BALL_T1_SHIFT)
  453. #define PINMUX_BALL_T1_W2FC_GZO (0x4U << PINMUX_BALL_T1_SHIFT)
  454. #define PINMUX_BALL_T1_HET2_14 (0x8U << PINMUX_BALL_T1_SHIFT)
  455. #define PINMUX_BALL_T12_MIBSPI5NCS_3 (0x1U << PINMUX_BALL_T12_SHIFT)
  456. #define PINMUX_BALL_T12_DMM_DATA_3 (0x2U << PINMUX_BALL_T12_SHIFT)
  457. #define PINMUX_BALL_U1_HET1_03 (0x1U << PINMUX_BALL_U1_SHIFT)
  458. #define PINMUX_BALL_U1_SPI4NCS_0 (0x2U << PINMUX_BALL_U1_SHIFT)
  459. #define PINMUX_BALL_U1_OHCI_RCFG_speed_1 (0x4U << PINMUX_BALL_U1_SHIFT)
  460. #define PINMUX_BALL_U1_W2FC_PUENON (0x8U << PINMUX_BALL_U1_SHIFT)
  461. #define PINMUX_BALL_U1_HET2_10 (0x10U << PINMUX_BALL_U1_SHIFT)
  462. #define PINMUX_BALL_V2_HET1_01 (0x1U << PINMUX_BALL_V2_SHIFT)
  463. #define PINMUX_BALL_V2_SPI4NENA (0x2U << PINMUX_BALL_V2_SHIFT)
  464. #define PINMUX_BALL_V2_OHCI_RCFG_txEnL_1 (0x4U << PINMUX_BALL_V2_SHIFT)
  465. #define PINMUX_BALL_V2_W2FC_PUENO (0x8U << PINMUX_BALL_V2_SHIFT)
  466. #define PINMUX_BALL_V2_HET2_8 (0x10U << PINMUX_BALL_V2_SHIFT)
  467. #define PINMUX_BALL_V5_MIBSPI3NCS_1 (0x1U << PINMUX_BALL_V5_SHIFT)
  468. #define PINMUX_BALL_V5_HET1_25 (0x2U << PINMUX_BALL_V5_SHIFT)
  469. #define PINMUX_BALL_V5_MDCLK (0x4U << PINMUX_BALL_V5_SHIFT)
  470. #define PINMUX_BALL_V6_HET1_05 (0x1U << PINMUX_BALL_V6_SHIFT)
  471. #define PINMUX_BALL_V6_SPI4SOMI (0x2U << PINMUX_BALL_V6_SHIFT)
  472. #define PINMUX_BALL_V6_HET2_12 (0x4U << PINMUX_BALL_V6_SHIFT)
  473. #define PINMUX_BALL_V7_HET1_09 (0x1U << PINMUX_BALL_V7_SHIFT)
  474. #define PINMUX_BALL_V7_HET2_16 (0x2U << PINMUX_BALL_V7_SHIFT)
  475. #define PINMUX_BALL_V7_OHCI_RCFG_suspend_1 (0x4U << PINMUX_BALL_V7_SHIFT)
  476. #define PINMUX_BALL_V7_W2FC_SUSPENDO (0x8U << PINMUX_BALL_V7_SHIFT)
  477. #define PINMUX_BALL_V10_MIBSPI3NCS_0 (0x1U << PINMUX_BALL_V10_SHIFT)
  478. #define PINMUX_BALL_V10_AD2EVT (0x2U << PINMUX_BALL_V10_SHIFT)
  479. #define PINMUX_BALL_V10_GIOB_2 (0x4U << PINMUX_BALL_V10_SHIFT)
  480. #define PINMUX_BALL_W3_HET1_06 (0x1U << PINMUX_BALL_W3_SHIFT)
  481. #define PINMUX_BALL_W3_SCIRX (0x2U << PINMUX_BALL_W3_SHIFT)
  482. #define PINMUX_BALL_W5_HET1_02 (0x1U << PINMUX_BALL_W5_SHIFT)
  483. #define PINMUX_BALL_W5_SPI4SIMO (0x2U << PINMUX_BALL_W5_SHIFT)
  484. #define PINMUX_BALL_W6_MIBSPI5NCS_2 (0x1U << PINMUX_BALL_W6_SHIFT)
  485. #define PINMUX_BALL_W6_DMM_DATA_2 (0x2U << PINMUX_BALL_W6_SHIFT)
  486. #define PINMUX_BALL_W9_MIBSPI3NENA (0x1U << PINMUX_BALL_W9_SHIFT)
  487. #define PINMUX_BALL_W9_MIBSPI3NCS_5 (0x2U << PINMUX_BALL_W9_SHIFT)
  488. #define PINMUX_BALL_W9_HET1_31 (0x4U << PINMUX_BALL_W9_SHIFT)
  489. #define PINMUX_BALL_W10_GIOB_3 (0x1U << PINMUX_BALL_W10_SHIFT)
  490. #define PINMUX_BALL_W10_OHCI_PRT_RcvData_1 (0x2U << PINMUX_BALL_W10_SHIFT)
  491. #define PINMUX_BALL_W10_W2FC_RXDI (0x4U << PINMUX_BALL_W10_SHIFT)
  492. #define PINMUX_GATE_EMIF_CLK_ON (0x0 << PINMUX_GATE_EMIF_CLK_SHIFT) /**/
  493. #define PINMUX_GIOB_DISABLE_HET2_ON (0x1U << PINMUX_GIOB_DISABLE_HET2_SHIFT)
  494. #define PINMUX_GATE_EMIF_CLK_OFF (0x1U << PINMUX_GATE_EMIF_CLK_SHIFT)
  495. #define PINMUX_GIOB_DISABLE_HET2_OFF (0x0 << PINMUX_GIOB_DISABLE_HET2_SHIFT)
  496. #define PINMUX_ALT_ADC_TRIGGER_1 (0x1U << PINMUX_ALT_ADC_TRIGGER_SHIFT)
  497. #define PINMUX_ALT_ADC_TRIGGER_2 (0x2U << PINMUX_ALT_ADC_TRIGGER_SHIFT)
  498. #define PINMUX_ETHERNET_MII (0x0 << PINMUX_ETHERNET_SHIFT)
  499. #define PINMUX_ETHERNET_RMII (0x1U << PINMUX_ETHERNET_SHIFT)
  500. /** @fn void muxInit(void)
  501. * @brief Initializes the PINMUX Driver
  502. *
  503. * This function initializes the PINMUX module and configures the selected
  504. * pinmux settings as per the user selection in the GUI
  505. */
  506. void muxInit(void);
  507. #endif