reg_pinmux.h 4.4 KB

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  1. /** @file reg_pinmux.h
  2. * @brief PINMUX Register Layer Header File
  3. * @date 29.May.2013
  4. * @version 03.05.02
  5. *
  6. * This file contains:
  7. * - Definitions
  8. * - Types
  9. * - Interface Prototypes
  10. * .
  11. * which are relevant for the PINMUX driver.
  12. */
  13. /* (c) Texas Instruments 2009-2013, All rights reserved. */
  14. #ifndef __REG_PINMUX_H__
  15. #define __REG_PINMUX_H__
  16. #include "sys_common.h"
  17. /* USER CODE BEGIN (0) */
  18. /* USER CODE END */
  19. /* IOMM Revision and Boot Register */
  20. #define REVISION_REG (*(volatile uint32 *)0xFFFFEA00U)
  21. #define ENDIAN_REG (*(volatile uint32 *)0xFFFFEA20U)
  22. /* IOMM Error and Fault Registers */
  23. /** @struct iommErrFault
  24. * @brief IOMM Error and Fault Register Definition
  25. *
  26. * This structure is used to access the IOMM Error and Fault registers.
  27. */
  28. typedef volatile struct iommErrFault
  29. {
  30. uint32 ERR_RAW_STATUS_REG; /* Error Raw Status / Set Register */
  31. uint32 ERR_ENABLED_STATUS_REG; /* Error Enabled Status / Clear Register */
  32. uint32 ERR_ENABLE_REG; /* Error Signaling Enable Register */
  33. uint32 ERR_ENABLE_CLR_REG; /* Error Signaling Enable Clear Register */
  34. uint32 rsvd; /* Reserved */
  35. uint32 FAULT_ADDRESS_REG; /* Fault Address Register */
  36. uint32 FAULT_STATUS_REG; /* Fault Status Register */
  37. uint32 FAULT_CLEAR_REG; /* Fault Clear Register */
  38. } iommErrFault_t;
  39. /* Pinmux Register Frame Definition */
  40. /** @struct pinMuxKicker
  41. * @brief Pin Muxing Kicker Register Definition
  42. *
  43. * This structure is used to access the Pin Muxing Kicker registers.
  44. */
  45. typedef volatile struct pinMuxKicker
  46. {
  47. uint32 KICKER0; /* kicker 0 register */
  48. uint32 KICKER1; /* kicker 1 register */
  49. } pinMuxKICKER_t;
  50. /** @struct pinMuxBase
  51. * @brief PINMUX Register Definition
  52. *
  53. * This structure is used to access the PINMUX module registers.
  54. */
  55. /** @typedef pinMuxBASE_t
  56. * @brief PINMUX Register Frame Type Definition
  57. *
  58. * This type is used to access the PINMUX Registers.
  59. */
  60. typedef volatile struct pinMuxBase
  61. {
  62. uint32 PINMMR0; /**< 0xEB10 Pin Mux 0 register*/
  63. uint32 PINMMR1; /**< 0xEB14 Pin Mux 1 register*/
  64. uint32 PINMMR2; /**< 0xEB18 Pin Mux 2 register*/
  65. uint32 PINMMR3; /**< 0xEB1C Pin Mux 3 register*/
  66. uint32 PINMMR4; /**< 0xEB20 Pin Mux 4 register*/
  67. uint32 PINMMR5; /**< 0xEB24 Pin Mux 5 register*/
  68. uint32 PINMMR6; /**< 0xEB28 Pin Mux 6 register*/
  69. uint32 PINMMR7; /**< 0xEB2C Pin Mux 7 register*/
  70. uint32 PINMMR8; /**< 0xEB30 Pin Mux 8 register*/
  71. uint32 PINMMR9; /**< 0xEB34 Pin Mux 9 register*/
  72. uint32 PINMMR10; /**< 0xEB38 Pin Mux 10 register*/
  73. uint32 PINMMR11; /**< 0xEB3C Pin Mux 11 register*/
  74. uint32 PINMMR12; /**< 0xEB40 Pin Mux 12 register*/
  75. uint32 PINMMR13; /**< 0xEB44 Pin Mux 13 register*/
  76. uint32 PINMMR14; /**< 0xEB48 Pin Mux 14 register*/
  77. uint32 PINMMR15; /**< 0xEB4C Pin Mux 15 register*/
  78. uint32 PINMMR16; /**< 0xEB50 Pin Mux 16 register*/
  79. uint32 PINMMR17; /**< 0xEB54 Pin Mux 17 register*/
  80. uint32 PINMMR18; /**< 0xEB58 Pin Mux 18 register*/
  81. uint32 PINMMR19; /**< 0xEB5C Pin Mux 19 register*/
  82. uint32 PINMMR20; /**< 0xEB60 Pin Mux 20 register*/
  83. uint32 PINMMR21; /**< 0xEB64 Pin Mux 21 register*/
  84. uint32 PINMMR22; /**< 0xEB68 Pin Mux 22 register*/
  85. uint32 PINMMR23; /**< 0xEB6C Pin Mux 23 register*/
  86. uint32 PINMMR24; /**< 0xEB70 Pin Mux 24 register*/
  87. uint32 PINMMR25; /**< 0xEB74 Pin Mux 25 register*/
  88. uint32 PINMMR26; /**< 0xEB78 Pin Mux 26 register*/
  89. uint32 PINMMR27; /**< 0xEB7C Pin Mux 27 register*/
  90. uint32 PINMMR28; /**< 0xEB80 Pin Mux 28 register*/
  91. uint32 PINMMR29; /**< 0xEB84 Pin Mux 29 register*/
  92. uint32 PINMMR30; /**< 0xEB88 Pin Mux 30 register*/
  93. }pinMuxBASE_t;
  94. /** @def iommErrFaultReg
  95. * @brief IOMM Error Fault Register Frame Pointer
  96. *
  97. * This pointer is used to control IOMM Error and Fault across the device.
  98. */
  99. #define iommErrFaultReg ((iommErrFault_t *) 0xFFFFEAEOU)
  100. /** @def kickerReg
  101. * @brief Pin Muxing Kicker Register Frame Pointer
  102. *
  103. * This pointer is used to enable and disable muxing accross the device.
  104. */
  105. #define kickerReg ((pinMuxKICKER_t *) 0xFFFFEA38U)
  106. /** @def pinMuxReg
  107. * @brief Pin Muxing Control Register Frame Pointer
  108. *
  109. * This pointer is used to set the muxing registers accross the device.
  110. */
  111. #define pinMuxReg ((pinMuxBASE_t *) 0xFFFFEB10U)
  112. /* USER CODE BEGIN (1) */
  113. /* USER CODE END */
  114. #endif