drv_pwm.c 18 KB

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  1. /*
  2. * File : drv_pwm.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2018-07-15 ZYH first version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include <board.h>
  28. #define MAX_PERIOD 65535
  29. #define MIN_PERIOD 3
  30. #define MIN_PULSE 2
  31. static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg);
  32. static struct rt_pwm_ops drv_ops =
  33. {
  34. drv_pwm_control
  35. };
  36. static rt_err_t drv_pwm_enable(TIM_HandleTypeDef * htim, struct rt_pwm_configuration *configuration, rt_bool_t enable)
  37. {
  38. rt_uint32_t channel = 0x04 * configuration->channel;
  39. if(!enable)
  40. {
  41. HAL_TIM_PWM_Stop(htim, channel);
  42. }
  43. HAL_TIM_PWM_Start(htim, channel);
  44. return RT_EOK;
  45. }
  46. static rt_err_t drv_pwm_get(TIM_HandleTypeDef * htim, struct rt_pwm_configuration *configuration)
  47. {
  48. rt_uint32_t channel = 0x04 * configuration->channel;
  49. rt_uint32_t tim_clock;
  50. #if (RT_HSE_HCLK > 100000000UL)//100M
  51. if(htim->Instance == TIM1 && htim->Instance == TIM8)
  52. {
  53. tim_clock = SystemCoreClock;
  54. }
  55. else
  56. {
  57. tim_clock = SystemCoreClock/2;
  58. }
  59. #else
  60. tim_clock = SystemCoreClock;
  61. #endif
  62. if(__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV2)
  63. {
  64. tim_clock = tim_clock / 2;
  65. }
  66. else if(__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV4)
  67. {
  68. tim_clock = tim_clock / 4;
  69. }
  70. tim_clock /= 1000000UL;
  71. configuration->period = (__HAL_TIM_GET_AUTORELOAD(htim) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
  72. configuration->pulse = (__HAL_TIM_GET_COMPARE(htim, channel) + 1) * (htim->Instance->PSC + 1) * 1000UL / tim_clock;
  73. return RT_EOK;
  74. }
  75. static rt_err_t drv_pwm_set(TIM_HandleTypeDef * htim, struct rt_pwm_configuration *configuration)
  76. {
  77. rt_uint32_t period, pulse;
  78. rt_uint32_t tim_clock, psc;
  79. rt_uint32_t channel = 0x04 * configuration->channel;
  80. #if (RT_HSE_HCLK > 100000000UL)//100M
  81. if(htim->Instance == TIM1 && htim->Instance == TIM8)
  82. {
  83. tim_clock = SystemCoreClock;
  84. }
  85. else
  86. {
  87. tim_clock = SystemCoreClock/2;
  88. }
  89. #else
  90. tim_clock = SystemCoreClock;
  91. #endif
  92. tim_clock /= 1000000UL;
  93. period = (unsigned long long)configuration->period * tim_clock / 1000ULL ;
  94. psc = period / MAX_PERIOD + 1;
  95. period = period / psc;
  96. __HAL_TIM_SET_PRESCALER(htim, psc - 1);
  97. if(period < MIN_PERIOD)
  98. {
  99. period = MIN_PERIOD;
  100. }
  101. __HAL_TIM_SET_AUTORELOAD(htim, period - 1);
  102. pulse = configuration->pulse * tim_clock / psc / 1000UL;
  103. if(pulse < MIN_PULSE)
  104. {
  105. pulse = MIN_PULSE;
  106. }
  107. else if(pulse > period)
  108. {
  109. pulse = period;
  110. }
  111. __HAL_TIM_SET_COMPARE(htim, channel, pulse - 1 );
  112. return RT_EOK;
  113. }
  114. static rt_err_t drv_pwm_control(struct rt_device_pwm *device, int cmd, void *arg)
  115. {
  116. struct rt_pwm_configuration * configuration = (struct rt_pwm_configuration *)arg;
  117. TIM_HandleTypeDef * htim = (TIM_HandleTypeDef *)device->parent.user_data;
  118. switch(cmd)
  119. {
  120. case PWM_CMD_ENABLE:
  121. return drv_pwm_enable(htim, configuration, RT_TRUE);
  122. case PWM_CMD_DISABLE:
  123. return drv_pwm_enable(htim, configuration, RT_FALSE);
  124. case PWM_CMD_SET:
  125. return drv_pwm_set(htim, configuration);
  126. case PWM_CMD_GET:
  127. return drv_pwm_get(htim, configuration);
  128. default:
  129. return RT_EINVAL;
  130. }
  131. }
  132. static void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle);
  133. #ifdef BSP_USING_PWM1
  134. TIM_HandleTypeDef htim1;
  135. #endif
  136. #ifdef BSP_USING_PWM2
  137. TIM_HandleTypeDef htim2;
  138. #endif
  139. #ifdef BSP_USING_PWM3
  140. TIM_HandleTypeDef htim3;
  141. #endif
  142. #ifdef BSP_USING_PWM4
  143. TIM_HandleTypeDef htim4;
  144. #endif
  145. #ifdef BSP_USING_PWM5
  146. TIM_HandleTypeDef htim5;
  147. #endif
  148. #ifdef BSP_USING_PWM1
  149. static void MX_TIM1_Init(void)
  150. {
  151. TIM_MasterConfigTypeDef sMasterConfig;
  152. TIM_OC_InitTypeDef sConfigOC;
  153. TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig;
  154. htim1.Instance = TIM1;
  155. htim1.Init.Prescaler = 0;
  156. htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
  157. htim1.Init.Period = 0;
  158. htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  159. htim1.Init.RepetitionCounter = 0;
  160. if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
  161. {
  162. RT_ASSERT(0);
  163. }
  164. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  165. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  166. if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
  167. {
  168. RT_ASSERT(0);
  169. }
  170. sConfigOC.OCMode = TIM_OCMODE_PWM1;
  171. sConfigOC.Pulse = 0;
  172. sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  173. sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  174. sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  175. sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
  176. sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  177. #ifdef BSP_USING_PWM1_CH1
  178. if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  179. {
  180. RT_ASSERT(0);
  181. }
  182. #endif /* BSP_USING_PWM1_CH1 */
  183. #ifdef BSP_USING_PWM1_CH2
  184. if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  185. {
  186. RT_ASSERT(0);
  187. }
  188. #endif /* BSP_USING_PWM1_CH2 */
  189. #ifdef BSP_USING_PWM1_CH3
  190. if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  191. {
  192. RT_ASSERT(0);
  193. }
  194. #endif /* BSP_USING_PWM1_CH3 */
  195. #ifdef BSP_USING_PWM1_CH4
  196. if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
  197. {
  198. RT_ASSERT(0);
  199. }
  200. #endif /* BSP_USING_PWM1_CH4 */
  201. sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
  202. sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
  203. sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
  204. sBreakDeadTimeConfig.DeadTime = 0;
  205. sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
  206. sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
  207. sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
  208. if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
  209. {
  210. RT_ASSERT(0);
  211. }
  212. HAL_TIM_MspPostInit(&htim1);
  213. }
  214. #endif /* BSP_USING_PWM1 */
  215. #ifdef BSP_USING_PWM2
  216. static void MX_TIM2_Init(void)
  217. {
  218. TIM_MasterConfigTypeDef sMasterConfig;
  219. TIM_OC_InitTypeDef sConfigOC;
  220. htim2.Instance = TIM2;
  221. htim2.Init.Prescaler = 0;
  222. htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
  223. htim2.Init.Period = 0;
  224. htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  225. if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
  226. {
  227. RT_ASSERT(0);
  228. }
  229. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  230. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  231. if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
  232. {
  233. RT_ASSERT(0);
  234. }
  235. sConfigOC.OCMode = TIM_OCMODE_PWM1;
  236. sConfigOC.Pulse = 0;
  237. sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  238. sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  239. #ifdef BSP_USING_PWM2_CH1
  240. if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  241. {
  242. RT_ASSERT(0);
  243. }
  244. #endif /* BSP_USING_PWM2_CH1 */
  245. #ifdef BSP_USING_PWM2_CH2
  246. if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  247. {
  248. RT_ASSERT(0);
  249. }
  250. #endif /* BSP_USING_PWM2_CH2 */
  251. #ifdef BSP_USING_PWM2_CH3
  252. if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  253. {
  254. RT_ASSERT(0);
  255. }
  256. #endif /* BSP_USING_PWM2_CH3 */
  257. #ifdef BSP_USING_PWM2_CH4
  258. if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
  259. {
  260. RT_ASSERT(0);
  261. }
  262. #endif /* BSP_USING_PWM2_CH3 */
  263. HAL_TIM_MspPostInit(&htim2);
  264. }
  265. #endif /* BSP_USING_PWM2 */
  266. #ifdef BSP_USING_PWM3
  267. void MX_TIM3_Init(void)
  268. {
  269. TIM_MasterConfigTypeDef sMasterConfig;
  270. TIM_OC_InitTypeDef sConfigOC;
  271. htim3.Instance = TIM3;
  272. htim3.Init.Prescaler = 0;
  273. htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
  274. htim3.Init.Period = 0;
  275. htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  276. if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
  277. {
  278. RT_ASSERT(0);
  279. }
  280. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  281. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  282. if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
  283. {
  284. RT_ASSERT(0);
  285. }
  286. sConfigOC.OCMode = TIM_OCMODE_PWM1;
  287. sConfigOC.Pulse = 0;
  288. sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  289. sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  290. #ifdef BSP_USING_PWM3_CH1
  291. if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  292. {
  293. RT_ASSERT(0);
  294. }
  295. #endif /* BSP_USING_PWM3_CH1 */
  296. #ifdef BSP_USING_PWM3_CH2
  297. if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  298. {
  299. RT_ASSERT(0);
  300. }
  301. #endif /* BSP_USING_PWM3_CH2 */
  302. #ifdef BSP_USING_PWM3_CH3
  303. if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  304. {
  305. RT_ASSERT(0);
  306. }
  307. #endif /* BSP_USING_PWM3_CH3 */
  308. #ifdef BSP_USING_PWM3_CH4
  309. if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
  310. {
  311. RT_ASSERT(0);
  312. }
  313. #endif /* BSP_USING_PWM3_CH4 */
  314. HAL_TIM_MspPostInit(&htim3);
  315. }
  316. #endif /* BSP_USING_PWM3 */
  317. #ifdef BSP_USING_PWM4
  318. void MX_TIM4_Init(void)
  319. {
  320. TIM_MasterConfigTypeDef sMasterConfig;
  321. TIM_OC_InitTypeDef sConfigOC;
  322. htim4.Instance = TIM4;
  323. htim4.Init.Prescaler = 0;
  324. htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
  325. htim4.Init.Period = 0;
  326. htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  327. if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
  328. {
  329. RT_ASSERT(0);
  330. }
  331. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  332. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  333. if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
  334. {
  335. RT_ASSERT(0);
  336. }
  337. sConfigOC.OCMode = TIM_OCMODE_PWM1;
  338. sConfigOC.Pulse = 0;
  339. sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  340. sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  341. #ifdef BSP_USING_PWM4_CH1
  342. if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  343. {
  344. RT_ASSERT(0);
  345. }
  346. #endif /* BSP_USING_PWM4_CH1 */
  347. #ifdef BSP_USING_PWM4_CH2
  348. if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  349. {
  350. RT_ASSERT(0);
  351. }
  352. #endif /* BSP_USING_PWM4_CH2 */
  353. #ifdef BSP_USING_PWM4_CH3
  354. if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  355. {
  356. RT_ASSERT(0);
  357. }
  358. #endif /* BSP_USING_PWM4_CH3 */
  359. #ifdef BSP_USING_PWM4_CH4
  360. if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
  361. {
  362. RT_ASSERT(0);
  363. }
  364. #endif /* BSP_USING_PWM4_CH4 */
  365. HAL_TIM_MspPostInit(&htim4);
  366. }
  367. #endif /* BSP_USING_PWM4 */
  368. #ifdef BSP_USING_PWM5
  369. void MX_TIM5_Init(void)
  370. {
  371. TIM_MasterConfigTypeDef sMasterConfig;
  372. TIM_OC_InitTypeDef sConfigOC;
  373. htim5.Instance = TIM5;
  374. htim5.Init.Prescaler = 0;
  375. htim5.Init.CounterMode = TIM_COUNTERMODE_UP;
  376. htim5.Init.Period = 0;
  377. htim5.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  378. if (HAL_TIM_PWM_Init(&htim5) != HAL_OK)
  379. {
  380. RT_ASSERT(0);
  381. }
  382. sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  383. sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  384. if (HAL_TIMEx_MasterConfigSynchronization(&htim5, &sMasterConfig) != HAL_OK)
  385. {
  386. RT_ASSERT(0);
  387. }
  388. sConfigOC.OCMode = TIM_OCMODE_PWM1;
  389. sConfigOC.Pulse = 0;
  390. sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  391. sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  392. #ifdef BSP_USING_PWM5_CH1
  393. if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  394. {
  395. RT_ASSERT(0);
  396. }
  397. #endif /* BSP_USING_PWM5_CH1 */
  398. #ifdef BSP_USING_PWM5_CH2
  399. if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  400. {
  401. RT_ASSERT(0);
  402. }
  403. #endif /* BSP_USING_PWM5_CH2 */
  404. #ifdef BSP_USING_PWM5_CH3
  405. if (HAL_TIM_PWM_ConfigChannel(&htim5, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  406. {
  407. RT_ASSERT(0);
  408. }
  409. #endif /* BSP_USING_PWM5_CH3 */
  410. HAL_TIM_MspPostInit(&htim5);
  411. }
  412. #endif /* BSP_USING_PWM5 */
  413. void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
  414. {
  415. if(tim_pwmHandle->Instance==TIM1)
  416. {
  417. __HAL_RCC_TIM1_CLK_ENABLE();
  418. }
  419. else if(tim_pwmHandle->Instance==TIM2)
  420. {
  421. __HAL_RCC_TIM2_CLK_ENABLE();
  422. }
  423. else if(tim_pwmHandle->Instance==TIM3)
  424. {
  425. __HAL_RCC_TIM3_CLK_ENABLE();
  426. }
  427. else if(tim_pwmHandle->Instance==TIM4)
  428. {
  429. __HAL_RCC_TIM4_CLK_ENABLE();
  430. }
  431. else if(tim_pwmHandle->Instance==TIM5)
  432. {
  433. __HAL_RCC_TIM5_CLK_ENABLE();
  434. }
  435. }
  436. static void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
  437. {
  438. GPIO_InitTypeDef GPIO_InitStruct;
  439. if(timHandle->Instance==TIM1)
  440. {
  441. __HAL_RCC_GPIOA_CLK_ENABLE();
  442. /**TIM1 GPIO Configuration
  443. PA8 ------> TIM1_CH1
  444. PA9 ------> TIM1_CH2
  445. PA10 ------> TIM1_CH3
  446. PA11 ------> TIM1_CH4
  447. */
  448. GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11;
  449. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  450. GPIO_InitStruct.Pull = GPIO_NOPULL;
  451. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  452. GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
  453. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  454. }
  455. else if(timHandle->Instance==TIM2)
  456. {
  457. __HAL_RCC_GPIOA_CLK_ENABLE();
  458. __HAL_RCC_GPIOB_CLK_ENABLE();
  459. /**TIM2 GPIO Configuration
  460. PA3 ------> TIM2_CH4
  461. PA5 ------> TIM2_CH1
  462. PB10 ------> TIM2_CH3
  463. PB3 ------> TIM2_CH2
  464. */
  465. GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_5;
  466. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  467. GPIO_InitStruct.Pull = GPIO_NOPULL;
  468. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  469. GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
  470. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  471. GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_3;
  472. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  473. GPIO_InitStruct.Pull = GPIO_NOPULL;
  474. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  475. GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
  476. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  477. }
  478. else if(timHandle->Instance==TIM3)
  479. {
  480. __HAL_RCC_GPIOA_CLK_ENABLE();
  481. __HAL_RCC_GPIOB_CLK_ENABLE();
  482. /**TIM3 GPIO Configuration
  483. PA6 ------> TIM3_CH1
  484. PA7 ------> TIM3_CH2
  485. PB0 ------> TIM3_CH3
  486. PB1 ------> TIM3_CH4
  487. */
  488. GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
  489. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  490. GPIO_InitStruct.Pull = GPIO_NOPULL;
  491. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  492. GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
  493. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  494. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
  495. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  496. GPIO_InitStruct.Pull = GPIO_NOPULL;
  497. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  498. GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
  499. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  500. }
  501. else if(timHandle->Instance==TIM4)
  502. {
  503. __HAL_RCC_GPIOB_CLK_ENABLE();
  504. /**TIM4 GPIO Configuration
  505. PB6 ------> TIM4_CH1
  506. PB7 ------> TIM4_CH2
  507. PB8 ------> TIM4_CH3
  508. PB9 ------> TIM4_CH4
  509. */
  510. GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
  511. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  512. GPIO_InitStruct.Pull = GPIO_NOPULL;
  513. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  514. GPIO_InitStruct.Alternate = GPIO_AF2_TIM4;
  515. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  516. }
  517. else if(timHandle->Instance==TIM5)
  518. {
  519. __HAL_RCC_GPIOA_CLK_ENABLE();
  520. /**TIM5 GPIO Configuration
  521. PA0-WKUP ------> TIM5_CH1
  522. PA1 ------> TIM5_CH2
  523. PA2 ------> TIM5_CH3
  524. */
  525. GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2;
  526. GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  527. GPIO_InitStruct.Pull = GPIO_NOPULL;
  528. GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  529. GPIO_InitStruct.Alternate = GPIO_AF2_TIM5;
  530. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  531. }
  532. }
  533. void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
  534. {
  535. if(tim_pwmHandle->Instance==TIM1)
  536. {
  537. __HAL_RCC_TIM1_CLK_DISABLE();
  538. }
  539. else if(tim_pwmHandle->Instance==TIM2)
  540. {
  541. __HAL_RCC_TIM2_CLK_DISABLE();
  542. }
  543. else if(tim_pwmHandle->Instance==TIM3)
  544. {
  545. __HAL_RCC_TIM3_CLK_DISABLE();
  546. }
  547. else if(tim_pwmHandle->Instance==TIM4)
  548. {
  549. __HAL_RCC_TIM4_CLK_DISABLE();
  550. }
  551. else if(tim_pwmHandle->Instance==TIM5)
  552. {
  553. __HAL_RCC_TIM5_CLK_DISABLE();
  554. }
  555. }
  556. int drv_pwm_init(void)
  557. {
  558. #ifdef BSP_USING_PWM1
  559. MX_TIM1_Init();
  560. rt_device_pwm_register(rt_calloc(1,sizeof(struct rt_device_pwm)), "pwm1", &drv_ops, &htim1);
  561. #endif
  562. #ifdef BSP_USING_PWM2
  563. MX_TIM2_Init();
  564. rt_device_pwm_register(rt_calloc(1,sizeof(struct rt_device_pwm)), "pwm2", &drv_ops, &htim2);
  565. #endif
  566. #ifdef BSP_USING_PWM3
  567. MX_TIM3_Init();
  568. rt_device_pwm_register(rt_calloc(1,sizeof(struct rt_device_pwm)), "pwm3", &drv_ops, &htim3);
  569. #endif
  570. #ifdef BSP_USING_PWM4
  571. MX_TIM4_Init();
  572. rt_device_pwm_register(rt_calloc(1,sizeof(struct rt_device_pwm)), "pwm4", &drv_ops, &htim4);
  573. #endif
  574. #ifdef BSP_USING_PWM5
  575. MX_TIM5_Init();
  576. rt_device_pwm_register(rt_calloc(1,sizeof(struct rt_device_pwm)), "pwm5", &drv_ops, &htim5);
  577. #endif
  578. return 0;
  579. }
  580. INIT_DEVICE_EXPORT(drv_pwm_init);