stm32f7xx_hal_mmc.h 34 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_mmc.h
  4. * @author MCD Application Team
  5. * @brief Header file of MMC HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F7xx_HAL_MMC_H
  37. #define __STM32F7xx_HAL_MMC_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f7xx_ll_sdmmc.h"
  43. /** @addtogroup STM32F7xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup MMC
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup MMC_Exported_Types MMC Exported Types
  51. * @{
  52. */
  53. /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure
  54. * @{
  55. */
  56. typedef enum
  57. {
  58. HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */
  59. HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */
  60. HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */
  61. HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */
  62. HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */
  63. HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */
  64. HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */
  65. HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */
  66. }HAL_MMC_StateTypeDef;
  67. /**
  68. * @}
  69. */
  70. /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure
  71. * @{
  72. */
  73. typedef enum
  74. {
  75. HAL_MMC_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
  76. HAL_MMC_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
  77. HAL_MMC_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
  78. HAL_MMC_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
  79. HAL_MMC_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
  80. HAL_MMC_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
  81. HAL_MMC_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
  82. HAL_MMC_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
  83. HAL_MMC_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card response Error */
  84. }HAL_MMC_CardStateTypeDef;
  85. /**
  86. * @}
  87. */
  88. /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition
  89. * @{
  90. */
  91. #define MMC_InitTypeDef SDMMC_InitTypeDef
  92. #define MMC_TypeDef SDMMC_TypeDef
  93. /**
  94. * @brief MMC Card Information Structure definition
  95. */
  96. typedef struct
  97. {
  98. uint32_t CardType; /*!< Specifies the card Type */
  99. uint32_t Class; /*!< Specifies the class of the card class */
  100. uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */
  101. uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */
  102. uint32_t BlockSize; /*!< Specifies one block size in bytes */
  103. uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */
  104. uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */
  105. }HAL_MMC_CardInfoTypeDef;
  106. /**
  107. * @brief MMC handle Structure definition
  108. */
  109. typedef struct
  110. {
  111. MMC_TypeDef *Instance; /*!< MMC registers base address */
  112. MMC_InitTypeDef Init; /*!< MMC required parameters */
  113. HAL_LockTypeDef Lock; /*!< MMC locking object */
  114. uint32_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */
  115. uint32_t TxXferSize; /*!< MMC Tx Transfer size */
  116. uint32_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */
  117. uint32_t RxXferSize; /*!< MMC Rx Transfer size */
  118. __IO uint32_t Context; /*!< MMC transfer context */
  119. __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */
  120. __IO uint32_t ErrorCode; /*!< MMC Card Error codes */
  121. DMA_HandleTypeDef *hdmarx; /*!< MMC Rx DMA handle parameters */
  122. DMA_HandleTypeDef *hdmatx; /*!< MMC Tx DMA handle parameters */
  123. HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */
  124. uint32_t CSD[4]; /*!< MMC card specific data table */
  125. uint32_t CID[4]; /*!< MMC card identification number table */
  126. }MMC_HandleTypeDef;
  127. /**
  128. * @}
  129. */
  130. /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register
  131. * @{
  132. */
  133. typedef struct
  134. {
  135. __IO uint8_t CSDStruct; /*!< CSD structure */
  136. __IO uint8_t SysSpecVersion; /*!< System specification version */
  137. __IO uint8_t Reserved1; /*!< Reserved */
  138. __IO uint8_t TAAC; /*!< Data read access time 1 */
  139. __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
  140. __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
  141. __IO uint16_t CardComdClasses; /*!< Card command classes */
  142. __IO uint8_t RdBlockLen; /*!< Max. read data block length */
  143. __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
  144. __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
  145. __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
  146. __IO uint8_t DSRImpl; /*!< DSR implemented */
  147. __IO uint8_t Reserved2; /*!< Reserved */
  148. __IO uint32_t DeviceSize; /*!< Device Size */
  149. __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
  150. __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
  151. __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
  152. __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
  153. __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
  154. __IO uint8_t EraseGrSize; /*!< Erase group size */
  155. __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
  156. __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
  157. __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
  158. __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
  159. __IO uint8_t WrSpeedFact; /*!< Write speed factor */
  160. __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
  161. __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
  162. __IO uint8_t Reserved3; /*!< Reserved */
  163. __IO uint8_t ContentProtectAppli; /*!< Content protection application */
  164. __IO uint8_t FileFormatGrouop; /*!< File format group */
  165. __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
  166. __IO uint8_t PermWrProtect; /*!< Permanent write protection */
  167. __IO uint8_t TempWrProtect; /*!< Temporary write protection */
  168. __IO uint8_t FileFormat; /*!< File format */
  169. __IO uint8_t ECC; /*!< ECC code */
  170. __IO uint8_t CSD_CRC; /*!< CSD CRC */
  171. __IO uint8_t Reserved4; /*!< Always 1 */
  172. }HAL_MMC_CardCSDTypeDef;
  173. /**
  174. * @}
  175. */
  176. /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register
  177. * @{
  178. */
  179. typedef struct
  180. {
  181. __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
  182. __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
  183. __IO uint32_t ProdName1; /*!< Product Name part1 */
  184. __IO uint8_t ProdName2; /*!< Product Name part2 */
  185. __IO uint8_t ProdRev; /*!< Product Revision */
  186. __IO uint32_t ProdSN; /*!< Product Serial Number */
  187. __IO uint8_t Reserved1; /*!< Reserved1 */
  188. __IO uint16_t ManufactDate; /*!< Manufacturing Date */
  189. __IO uint8_t CID_CRC; /*!< CID CRC */
  190. __IO uint8_t Reserved2; /*!< Always 1 */
  191. }HAL_MMC_CardCIDTypeDef;
  192. /**
  193. * @}
  194. */
  195. /**
  196. * @}
  197. */
  198. /* Exported constants --------------------------------------------------------*/
  199. /** @defgroup MMC_Exported_Constants Exported Constants
  200. * @{
  201. */
  202. #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */
  203. #define CAPACITY ((uint32_t)0x80000000U) /*!< 2 G bytes constant */
  204. /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition
  205. * @{
  206. */
  207. #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */
  208. #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */
  209. #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */
  210. #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */
  211. #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */
  212. #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */
  213. #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */
  214. #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */
  215. #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the
  216. number of transferred bytes does not match the block length */
  217. #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */
  218. #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */
  219. #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */
  220. #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock
  221. command or if there was an attempt to access a locked card */
  222. #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */
  223. #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */
  224. #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */
  225. #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */
  226. #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */
  227. #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */
  228. #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */
  229. #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */
  230. #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */
  231. #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */
  232. #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out
  233. of erase sequence command was received */
  234. #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */
  235. #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */
  236. #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */
  237. #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */
  238. #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */
  239. #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */
  240. #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */
  241. #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */
  242. #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */
  243. /**
  244. * @}
  245. */
  246. /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration
  247. * @{
  248. */
  249. #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */
  250. #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */
  251. #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */
  252. #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */
  253. #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */
  254. #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */
  255. #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */
  256. /**
  257. * @}
  258. */
  259. /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode
  260. * @{
  261. */
  262. /**
  263. * @brief
  264. */
  265. #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */
  266. #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */
  267. #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */
  268. #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */
  269. #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U
  270. /**
  271. * @}
  272. */
  273. /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards
  274. * @{
  275. */
  276. #define MMC_HIGH_VOLTAGE_CARD ((uint32_t)0x00000000U)
  277. #define MMC_DUAL_VOLTAGE_CARD ((uint32_t)0x00000001U)
  278. /**
  279. * @}
  280. */
  281. /**
  282. * @}
  283. */
  284. /* Exported macro ------------------------------------------------------------*/
  285. /** @defgroup MMC_Exported_macros MMC Exported Macros
  286. * @brief macros to handle interrupts and specific clock configurations
  287. * @{
  288. */
  289. /**
  290. * @brief Enable the MMC device.
  291. * @retval None
  292. */
  293. #define __HAL_MMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance)
  294. /**
  295. * @brief Disable the MMC device.
  296. * @retval None
  297. */
  298. #define __HAL_MMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance)
  299. /**
  300. * @brief Enable the SDMMC DMA transfer.
  301. * @retval None
  302. */
  303. #define __HAL_MMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance)
  304. /**
  305. * @brief Disable the SDMMC DMA transfer.
  306. * @retval None
  307. */
  308. #define __HAL_MMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance)
  309. /**
  310. * @brief Enable the MMC device interrupt.
  311. * @param __HANDLE__ MMC Handle
  312. * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled.
  313. * This parameter can be one or a combination of the following values:
  314. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  315. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  316. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  317. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  318. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  319. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  320. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  321. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  322. * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
  323. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  324. * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
  325. * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
  326. * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
  327. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  328. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  329. * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
  330. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  331. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  332. * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
  333. * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
  334. * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
  335. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  336. * @retval None
  337. */
  338. #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  339. /**
  340. * @brief Disable the MMC device interrupt.
  341. * @param __HANDLE__ MMC Handle
  342. * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled.
  343. * This parameter can be one or a combination of the following values:
  344. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  345. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  346. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  347. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  348. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  349. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  350. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  351. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  352. * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
  353. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  354. * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
  355. * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
  356. * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
  357. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  358. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  359. * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
  360. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  361. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  362. * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
  363. * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
  364. * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
  365. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  366. * @retval None
  367. */
  368. #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  369. /**
  370. * @brief Check whether the specified MMC flag is set or not.
  371. * @param __HANDLE__ MMC Handle
  372. * @param __FLAG__ specifies the flag to check.
  373. * This parameter can be one of the following values:
  374. * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
  375. * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
  376. * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
  377. * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
  378. * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
  379. * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
  380. * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
  381. * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
  382. * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
  383. * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
  384. * @arg SDMMC_FLAG_CMDACT: Command transfer in progress
  385. * @arg SDMMC_FLAG_TXACT: Data transmit in progress
  386. * @arg SDMMC_FLAG_RXACT: Data receive in progress
  387. * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty
  388. * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full
  389. * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full
  390. * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full
  391. * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty
  392. * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty
  393. * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO
  394. * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO
  395. * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
  396. * @retval The new state of MMC FLAG (SET or RESET).
  397. */
  398. #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
  399. /**
  400. * @brief Clear the MMC's pending flags.
  401. * @param __HANDLE__ MMC Handle
  402. * @param __FLAG__ specifies the flag to clear.
  403. * This parameter can be one or a combination of the following values:
  404. * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed)
  405. * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
  406. * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout
  407. * @arg SDMMC_FLAG_DTIMEOUT: Data timeout
  408. * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error
  409. * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error
  410. * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed)
  411. * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required)
  412. * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
  413. * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed)
  414. * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received
  415. * @retval None
  416. */
  417. #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
  418. /**
  419. * @brief Check whether the specified MMC interrupt has occurred or not.
  420. * @param __HANDLE__ MMC Handle
  421. * @param __INTERRUPT__ specifies the SDMMC interrupt source to check.
  422. * This parameter can be one of the following values:
  423. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  424. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  425. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  426. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  427. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  428. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  429. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  430. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  431. * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
  432. * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
  433. * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt
  434. * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt
  435. * @arg SDMMC_IT_RXACT: Data receive in progress interrupt
  436. * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
  437. * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt
  438. * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt
  439. * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt
  440. * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt
  441. * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt
  442. * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt
  443. * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt
  444. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  445. * @retval The new state of SD IT (SET or RESET).
  446. */
  447. #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  448. /**
  449. * @brief Clear the MMC's interrupt pending bits.
  450. * @param __HANDLE__ MMC Handle
  451. * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
  452. * This parameter can be one or a combination of the following values:
  453. * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
  454. * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
  455. * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt
  456. * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt
  457. * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt
  458. * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt
  459. * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt
  460. * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt
  461. * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt
  462. * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt
  463. * @retval None
  464. */
  465. #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
  466. /**
  467. * @}
  468. */
  469. /* Exported functions --------------------------------------------------------*/
  470. /** @defgroup MMC_Exported_Functions MMC Exported Functions
  471. * @{
  472. */
  473. /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions
  474. * @{
  475. */
  476. HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc);
  477. HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc);
  478. HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc);
  479. void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc);
  480. void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc);
  481. /**
  482. * @}
  483. */
  484. /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions
  485. * @{
  486. */
  487. /* Blocking mode: Polling */
  488. HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
  489. HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout);
  490. HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd);
  491. /* Non-Blocking mode: IT */
  492. HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  493. HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  494. /* Non-Blocking mode: DMA */
  495. HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  496. HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks);
  497. void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc);
  498. /* Callback in non blocking modes (DMA) */
  499. void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc);
  500. void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc);
  501. void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc);
  502. void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc);
  503. /**
  504. * @}
  505. */
  506. /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions
  507. * @{
  508. */
  509. HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode);
  510. /**
  511. * @}
  512. */
  513. /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions
  514. * @{
  515. */
  516. HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc);
  517. HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID);
  518. HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD);
  519. HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo);
  520. /**
  521. * @}
  522. */
  523. /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions
  524. * @{
  525. */
  526. HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc);
  527. uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc);
  528. /**
  529. * @}
  530. */
  531. /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management
  532. * @{
  533. */
  534. HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc);
  535. HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc);
  536. /**
  537. * @}
  538. */
  539. /* Private types -------------------------------------------------------------*/
  540. /** @defgroup MMC_Private_Types MMC Private Types
  541. * @{
  542. */
  543. /**
  544. * @}
  545. */
  546. /* Private defines -----------------------------------------------------------*/
  547. /** @defgroup MMC_Private_Defines MMC Private Defines
  548. * @{
  549. */
  550. /**
  551. * @}
  552. */
  553. /* Private variables ---------------------------------------------------------*/
  554. /** @defgroup MMC_Private_Variables MMC Private Variables
  555. * @{
  556. */
  557. /**
  558. * @}
  559. */
  560. /* Private constants ---------------------------------------------------------*/
  561. /** @defgroup MMC_Private_Constants MMC Private Constants
  562. * @{
  563. */
  564. /**
  565. * @}
  566. */
  567. /* Private macros ------------------------------------------------------------*/
  568. /** @defgroup MMC_Private_Macros MMC Private Macros
  569. * @{
  570. */
  571. /**
  572. * @}
  573. */
  574. /* Private functions prototypes ----------------------------------------------*/
  575. /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes
  576. * @{
  577. */
  578. /**
  579. * @}
  580. */
  581. /* Private functions ---------------------------------------------------------*/
  582. /** @defgroup MMC_Private_Functions MMC Private Functions
  583. * @{
  584. */
  585. /**
  586. * @}
  587. */
  588. /**
  589. * @}
  590. */
  591. /**
  592. * @}
  593. */
  594. /**
  595. * @}
  596. */
  597. #ifdef __cplusplus
  598. }
  599. #endif
  600. #endif /* __STM32F7xx_HAL_MMC_H */
  601. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/