stm32f7xx_hal_sram.h 6.9 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_sram.h
  4. * @author MCD Application Team
  5. * @brief Header file of SRAM HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F7xx_HAL_SRAM_H
  37. #define __STM32F7xx_HAL_SRAM_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f7xx_ll_fmc.h"
  43. /** @addtogroup STM32F7xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup SRAM
  47. * @{
  48. */
  49. /* Exported typedef ----------------------------------------------------------*/
  50. /** @defgroup SRAM_Exported_Types SRAM Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief HAL SRAM State structures definition
  55. */
  56. typedef enum
  57. {
  58. HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */
  59. HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
  60. HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
  61. HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
  62. HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */
  63. }HAL_SRAM_StateTypeDef;
  64. /**
  65. * @brief SRAM handle Structure definition
  66. */
  67. typedef struct
  68. {
  69. FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
  70. FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
  71. FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
  72. HAL_LockTypeDef Lock; /*!< SRAM locking object */
  73. __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
  74. DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
  75. }SRAM_HandleTypeDef;
  76. /**
  77. * @}
  78. */
  79. /* Exported constants --------------------------------------------------------*/
  80. /* Exported macro ------------------------------------------------------------*/
  81. /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
  82. * @{
  83. */
  84. /** @brief Reset SRAM handle state
  85. * @param __HANDLE__ SRAM handle
  86. * @retval None
  87. */
  88. #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
  89. /**
  90. * @}
  91. */
  92. /* Exported functions --------------------------------------------------------*/
  93. /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
  94. * @{
  95. */
  96. /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
  97. * @{
  98. */
  99. /* Initialization/de-initialization functions ********************************/
  100. HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
  101. HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
  102. void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
  103. void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
  104. /**
  105. * @}
  106. */
  107. /** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
  108. * @{
  109. */
  110. /* I/O operation functions ***************************************************/
  111. HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
  112. HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
  113. HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
  114. HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
  115. HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
  116. HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
  117. HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
  118. HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
  119. void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
  120. void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
  121. /**
  122. * @}
  123. */
  124. /** @addtogroup SRAM_Exported_Functions_Group3 Control functions
  125. * @{
  126. */
  127. /* SRAM Control functions ****************************************************/
  128. HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
  129. HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
  130. /**
  131. * @}
  132. */
  133. /** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
  134. * @{
  135. */
  136. /* SRAM State functions ******************************************************/
  137. HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
  138. /**
  139. * @}
  140. */
  141. /**
  142. * @}
  143. */
  144. /**
  145. * @}
  146. */
  147. /**
  148. * @}
  149. */
  150. #ifdef __cplusplus
  151. }
  152. #endif
  153. #endif /* __STM32F7xx_HAL_SRAM_H */
  154. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/