stm32f7xx_hal_i2s.c 50 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_i2s.c
  4. * @author MCD Application Team
  5. * @brief I2S HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Integrated Interchip Sound (I2S) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State and Errors functions
  11. @verbatim
  12. ===============================================================================
  13. ##### How to use this driver #####
  14. ===============================================================================
  15. [..]
  16. The I2S HAL driver can be used as follows:
  17. (#) Declare a I2S_HandleTypeDef handle structure.
  18. (#) Initialize the I2S low level resources by implement the HAL_I2S_MspInit() API:
  19. (##) Enable the SPIx interface clock.
  20. (##) I2S pins configuration:
  21. (+++) Enable the clock for the I2S GPIOs.
  22. (+++) Configure these I2S pins as alternate function pull-up.
  23. (##) NVIC configuration if you need to use interrupt process (HAL_I2S_Transmit_IT()
  24. and HAL_I2S_Receive_IT() APIs).
  25. (+++) Configure the I2Sx interrupt priority.
  26. (+++) Enable the NVIC I2S IRQ handle.
  27. (##) DMA Configuration if you need to use DMA process (HAL_I2S_Transmit_DMA()
  28. and HAL_I2S_Receive_DMA() APIs:
  29. (+++) Declare a DMA handle structure for the Tx/Rx channel.
  30. (+++) Enable the DMAx interface clock.
  31. (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
  32. (+++) Configure the DMA Tx/Rx Channel.
  33. (+++) Associate the initialized DMA handle to the I2S DMA Tx/Rx handle.
  34. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  35. DMA Tx/Rx Channel.
  36. (#) Program the Mode, Standard, Data Format, MCLK Output, Audio frequency and Polarity
  37. using HAL_I2S_Init() function.
  38. -@- The specific I2S interrupts (Transmission complete interrupt,
  39. RXNE interrupt and Error Interrupts) will be managed using the macros
  40. __HAL_I2S_ENABLE_IT() and __HAL_I2S_DISABLE_IT() inside the transmit and receive process.
  41. -@- Make sure that either:
  42. (+@) I2S clock is configured based on SYSCLK or
  43. (+@) External clock source is configured after setting correctly
  44. the define constant EXTERNAL_CLOCK_VALUE in the stm32f3xx_hal_conf.h file.
  45. (#) Three mode of operations are available within this driver :
  46. *** Polling mode IO operation ***
  47. =================================
  48. [..]
  49. (+) Send an amount of data in blocking mode using HAL_I2S_Transmit()
  50. (+) Receive an amount of data in blocking mode using HAL_I2S_Receive()
  51. *** Interrupt mode IO operation ***
  52. ===================================
  53. [..]
  54. (+) Send an amount of data in non blocking mode using HAL_I2S_Transmit_IT()
  55. (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  56. add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  57. (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  58. add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  59. (+) Receive an amount of data in non blocking mode using HAL_I2S_Receive_IT()
  60. (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  61. add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  62. (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  63. add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  64. (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  65. add his own code by customization of function pointer HAL_I2S_ErrorCallback
  66. *** DMA mode IO operation ***
  67. ==============================
  68. [..]
  69. (+) Send an amount of data in non blocking mode (DMA) using HAL_I2S_Transmit_DMA()
  70. (+) At transmission end of half transfer HAL_I2S_TxHalfCpltCallback is executed and user can
  71. add his own code by customization of function pointer HAL_I2S_TxHalfCpltCallback
  72. (+) At transmission end of transfer HAL_I2S_TxCpltCallback is executed and user can
  73. add his own code by customization of function pointer HAL_I2S_TxCpltCallback
  74. (+) Receive an amount of data in non blocking mode (DMA) using HAL_I2S_Receive_DMA()
  75. (+) At reception end of half transfer HAL_I2S_RxHalfCpltCallback is executed and user can
  76. add his own code by customization of function pointer HAL_I2S_RxHalfCpltCallback
  77. (+) At reception end of transfer HAL_I2S_RxCpltCallback is executed and user can
  78. add his own code by customization of function pointer HAL_I2S_RxCpltCallback
  79. (+) In case of transfer Error, HAL_I2S_ErrorCallback() function is executed and user can
  80. add his own code by customization of function pointer HAL_I2S_ErrorCallback
  81. (+) Pause the DMA Transfer using HAL_I2S_DMAPause()
  82. (+) Resume the DMA Transfer using HAL_I2S_DMAResume()
  83. (+) Stop the DMA Transfer using HAL_I2S_DMAStop()
  84. *** I2S HAL driver macros list ***
  85. =============================================
  86. [..]
  87. Below the list of most used macros in I2S HAL driver.
  88. (+) __HAL_I2S_ENABLE: Enable the specified SPI peripheral (in I2S mode)
  89. (+) __HAL_I2S_DISABLE: Disable the specified SPI peripheral (in I2S mode)
  90. (+) __HAL_I2S_ENABLE_IT : Enable the specified I2S interrupts
  91. (+) __HAL_I2S_DISABLE_IT : Disable the specified I2S interrupts
  92. (+) __HAL_I2S_GET_FLAG: Check whether the specified I2S flag is set or not
  93. [..]
  94. (@) You can refer to the I2S HAL driver header file for more useful macros
  95. @endverbatim
  96. ******************************************************************************
  97. * @attention
  98. *
  99. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  100. *
  101. * Redistribution and use in source and binary forms, with or without modification,
  102. * are permitted provided that the following conditions are met:
  103. * 1. Redistributions of source code must retain the above copyright notice,
  104. * this list of conditions and the following disclaimer.
  105. * 2. Redistributions in binary form must reproduce the above copyright notice,
  106. * this list of conditions and the following disclaimer in the documentation
  107. * and/or other materials provided with the distribution.
  108. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  109. * may be used to endorse or promote products derived from this software
  110. * without specific prior written permission.
  111. *
  112. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  113. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  114. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  115. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  116. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  117. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  118. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  119. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  120. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  121. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  122. *
  123. ******************************************************************************
  124. */
  125. /* Includes ------------------------------------------------------------------*/
  126. #include "stm32f7xx_hal.h"
  127. /** @addtogroup STM32F7xx_HAL_Driver
  128. * @{
  129. */
  130. /** @defgroup I2S I2S
  131. * @brief I2S HAL module driver
  132. * @{
  133. */
  134. #ifdef HAL_I2S_MODULE_ENABLED
  135. /* Private typedef -----------------------------------------------------------*/
  136. /* Private define ------------------------------------------------------------*/
  137. /* Private macro -------------------------------------------------------------*/
  138. /* Private variables ---------------------------------------------------------*/
  139. /* Private function prototypes -----------------------------------------------*/
  140. /** @defgroup I2S_Private_Functions I2S Private Functions
  141. * @{
  142. */
  143. static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
  144. static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
  145. static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
  146. static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  147. static void I2S_DMAError(DMA_HandleTypeDef *hdma);
  148. static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
  149. static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
  150. static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s);
  151. static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t State, uint32_t Timeout);
  152. /**
  153. * @}
  154. */
  155. /* Exported functions ---------------------------------------------------------*/
  156. /** @defgroup I2S_Exported_Functions I2S Exported Functions
  157. * @{
  158. */
  159. /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions
  160. * @brief Initialization and Configuration functions
  161. *
  162. @verbatim
  163. ===============================================================================
  164. ##### Initialization and de-initialization functions #####
  165. ===============================================================================
  166. [..] This subsection provides a set of functions allowing to initialize and
  167. de-initialize the I2Sx peripheral in simplex mode:
  168. (+) User must Implement HAL_I2S_MspInit() function in which he configures
  169. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  170. (+) Call the function HAL_I2S_Init() to configure the selected device with
  171. the selected configuration:
  172. (++) Mode
  173. (++) Standard
  174. (++) Data Format
  175. (++) MCLK Output
  176. (++) Audio frequency
  177. (++) Polarity
  178. (++) Full duplex mode
  179. (+) Call the function HAL_I2S_DeInit() to restore the default configuration
  180. of the selected I2Sx peripheral.
  181. @endverbatim
  182. * @{
  183. */
  184. /**
  185. * @brief Initializes the I2S according to the specified parameters
  186. * in the I2S_InitTypeDef and create the associated handle.
  187. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  188. * the configuration information for I2S module
  189. * @retval HAL status
  190. */
  191. HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s)
  192. {
  193. uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
  194. uint32_t tmp = 0, i2sclk = 0;
  195. /* Check the I2S handle allocation */
  196. if(hi2s == NULL)
  197. {
  198. return HAL_ERROR;
  199. }
  200. /* Check the parameters */
  201. assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
  202. assert_param(IS_I2S_MODE(hi2s->Init.Mode));
  203. assert_param(IS_I2S_STANDARD(hi2s->Init.Standard));
  204. assert_param(IS_I2S_DATA_FORMAT(hi2s->Init.DataFormat));
  205. assert_param(IS_I2S_MCLK_OUTPUT(hi2s->Init.MCLKOutput));
  206. assert_param(IS_I2S_AUDIO_FREQ(hi2s->Init.AudioFreq));
  207. assert_param(IS_I2S_CPOL(hi2s->Init.CPOL));
  208. assert_param(IS_I2S_CLOCKSOURCE(hi2s->Init.ClockSource));
  209. if(hi2s->State == HAL_I2S_STATE_RESET)
  210. {
  211. /* Allocate lock resource and initialize it */
  212. hi2s->Lock = HAL_UNLOCKED;
  213. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  214. HAL_I2S_MspInit(hi2s);
  215. }
  216. hi2s->State = HAL_I2S_STATE_BUSY;
  217. /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
  218. /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
  219. hi2s->Instance->I2SCFGR &= ~(SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CKPOL | \
  220. SPI_I2SCFGR_I2SSTD | SPI_I2SCFGR_PCMSYNC | SPI_I2SCFGR_I2SCFG | \
  221. SPI_I2SCFGR_I2SE | SPI_I2SCFGR_I2SMOD);
  222. hi2s->Instance->I2SPR = 0x0002;
  223. /* Get the I2SCFGR register value */
  224. tmpreg = hi2s->Instance->I2SCFGR;
  225. /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
  226. if(hi2s->Init.AudioFreq == I2S_AUDIOFREQ_DEFAULT)
  227. {
  228. i2sodd = (uint16_t)0;
  229. i2sdiv = (uint16_t)2;
  230. }
  231. /* If the requested audio frequency is not the default, compute the prescaler */
  232. else
  233. {
  234. /* Check the frame length (For the Prescaler computing) *******************/
  235. if(hi2s->Init.DataFormat == I2S_DATAFORMAT_16B)
  236. {
  237. /* Packet length is 16 bits */
  238. packetlength = 1;
  239. }
  240. else
  241. {
  242. /* Packet length is 32 bits */
  243. packetlength = 2;
  244. }
  245. /* Get I2S source Clock frequency ****************************************/
  246. /* If an external I2S clock has to be used, the specific define should be set
  247. in the project configuration or in the stm32f3xx_conf.h file */
  248. if(hi2s->Init.ClockSource == I2S_CLOCK_EXTERNAL)
  249. {
  250. /* Set the I2S clock to the external clock value */
  251. i2sclk = EXTERNAL_CLOCK_VALUE;
  252. }
  253. else
  254. {
  255. /* Get the I2S source clock value */
  256. i2sclk = I2S_GetClockFreq(hi2s);
  257. }
  258. /* Compute the Real divider depending on the MCLK output state, with a floating point */
  259. if(hi2s->Init.MCLKOutput == I2S_MCLKOUTPUT_ENABLE)
  260. {
  261. /* MCLK output is enabled */
  262. tmp = (uint16_t)(((((i2sclk / 256) * 10) / hi2s->Init.AudioFreq)) + 5);
  263. }
  264. else
  265. {
  266. /* MCLK output is disabled */
  267. tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / hi2s->Init.AudioFreq)) + 5);
  268. }
  269. /* Remove the flatting point */
  270. tmp = tmp / 10;
  271. /* Check the parity of the divider */
  272. i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
  273. /* Compute the i2sdiv prescaler */
  274. i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
  275. /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
  276. i2sodd = (uint16_t) (i2sodd << 8);
  277. }
  278. /* Test if the divider is 1 or 0 or greater than 0xFF */
  279. if((i2sdiv < 2) || (i2sdiv > 0xFF))
  280. {
  281. /* Set the default values */
  282. i2sdiv = 2;
  283. i2sodd = 0;
  284. }
  285. /* Write to SPIx I2SPR register the computed value */
  286. hi2s->Instance->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)hi2s->Init.MCLKOutput));
  287. /* Configure the I2S with the I2S_InitStruct values */
  288. tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(hi2s->Init.Mode | \
  289. (uint16_t)(hi2s->Init.Standard | (uint16_t)(hi2s->Init.DataFormat | \
  290. (uint16_t)hi2s->Init.CPOL))));
  291. /* Write to SPIx I2SCFGR */
  292. hi2s->Instance->I2SCFGR = tmpreg;
  293. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  294. hi2s->State= HAL_I2S_STATE_READY;
  295. return HAL_OK;
  296. }
  297. /**
  298. * @brief DeInitializes the I2S peripheral
  299. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  300. * the configuration information for I2S module
  301. * @retval HAL status
  302. */
  303. HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s)
  304. {
  305. /* Check the I2S handle allocation */
  306. if(hi2s == NULL)
  307. {
  308. return HAL_ERROR;
  309. }
  310. /* Check the parameters */
  311. assert_param(IS_I2S_ALL_INSTANCE(hi2s->Instance));
  312. hi2s->State = HAL_I2S_STATE_BUSY;
  313. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  314. HAL_I2S_MspDeInit(hi2s);
  315. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  316. hi2s->State = HAL_I2S_STATE_RESET;
  317. /* Release Lock */
  318. __HAL_UNLOCK(hi2s);
  319. return HAL_OK;
  320. }
  321. /**
  322. * @brief I2S MSP Init
  323. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  324. * the configuration information for I2S module
  325. * @retval None
  326. */
  327. __weak void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s)
  328. {
  329. /* Prevent unused argument(s) compilation warning */
  330. UNUSED(hi2s);
  331. /* NOTE : This function Should not be modified, when the callback is needed,
  332. the HAL_I2S_MspInit could be implemented in the user file
  333. */
  334. }
  335. /**
  336. * @brief I2S MSP DeInit
  337. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  338. * the configuration information for I2S module
  339. * @retval None
  340. */
  341. __weak void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s)
  342. {
  343. /* Prevent unused argument(s) compilation warning */
  344. UNUSED(hi2s);
  345. /* NOTE : This function Should not be modified, when the callback is needed,
  346. the HAL_I2S_MspDeInit could be implemented in the user file
  347. */
  348. }
  349. /**
  350. * @}
  351. */
  352. /** @defgroup I2S_Exported_Functions_Group2 Input and Output operation functions
  353. * @brief Data transfers functions
  354. *
  355. @verbatim
  356. ===============================================================================
  357. ##### IO operation functions #####
  358. ===============================================================================
  359. [..]
  360. This subsection provides a set of functions allowing to manage the I2S data
  361. transfers.
  362. (#) There are two modes of transfer:
  363. (++) Blocking mode : The communication is performed in the polling mode.
  364. The status of all data processing is returned by the same function
  365. after finishing transfer.
  366. (++) No-Blocking mode : The communication is performed using Interrupts
  367. or DMA. These functions return the status of the transfer startup.
  368. The end of the data processing will be indicated through the
  369. dedicated I2S IRQ when using Interrupt mode or the DMA IRQ when
  370. using DMA mode.
  371. (#) Blocking mode functions are :
  372. (++) HAL_I2S_Transmit()
  373. (++) HAL_I2S_Receive()
  374. (#) No-Blocking mode functions with Interrupt are :
  375. (++) HAL_I2S_Transmit_IT()
  376. (++) HAL_I2S_Receive_IT()
  377. (#) No-Blocking mode functions with DMA are :
  378. (++) HAL_I2S_Transmit_DMA()
  379. (++) HAL_I2S_Receive_DMA()
  380. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  381. (++) HAL_I2S_TxCpltCallback()
  382. (++) HAL_I2S_RxCpltCallback()
  383. (++) HAL_I2S_ErrorCallback()
  384. @endverbatim
  385. * @{
  386. */
  387. /**
  388. * @brief Transmit an amount of data in blocking mode
  389. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  390. * the configuration information for I2S module
  391. * @param pData a 16-bit pointer to data buffer.
  392. * @param Size number of data sample to be sent:
  393. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  394. * configuration phase, the Size parameter means the number of 16-bit data length
  395. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  396. * the Size parameter means the number of 16-bit data length.
  397. * @param Timeout Timeout duration
  398. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  399. * between Master and Slave(example: audio streaming).
  400. * @retval HAL status
  401. */
  402. HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  403. {
  404. if((pData == NULL ) || (Size == 0))
  405. {
  406. return HAL_ERROR;
  407. }
  408. if(hi2s->State == HAL_I2S_STATE_READY)
  409. {
  410. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  411. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  412. {
  413. hi2s->TxXferSize = (Size << 1);
  414. hi2s->TxXferCount = (Size << 1);
  415. }
  416. else
  417. {
  418. hi2s->TxXferSize = Size;
  419. hi2s->TxXferCount = Size;
  420. }
  421. /* Process Locked */
  422. __HAL_LOCK(hi2s);
  423. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  424. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  425. /* Check if the I2S is already enabled */
  426. if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  427. {
  428. /* Enable I2S peripheral */
  429. __HAL_I2S_ENABLE(hi2s);
  430. }
  431. while(hi2s->TxXferCount > 0)
  432. {
  433. hi2s->Instance->DR = (*pData++);
  434. hi2s->TxXferCount--;
  435. /* Wait until TXE flag is set */
  436. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_TXE, SET, Timeout) != HAL_OK)
  437. {
  438. /* Set the error code and execute error callback*/
  439. hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
  440. HAL_I2S_ErrorCallback(hi2s);
  441. return HAL_TIMEOUT;
  442. }
  443. /* Check if an underrun occurs */
  444. if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_UDR) == SET)
  445. {
  446. /* Set the I2S State ready */
  447. hi2s->State = HAL_I2S_STATE_READY;
  448. /* Process Unlocked */
  449. __HAL_UNLOCK(hi2s);
  450. /* Set the error code and execute error callback*/
  451. hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
  452. HAL_I2S_ErrorCallback(hi2s);
  453. return HAL_ERROR;
  454. }
  455. }
  456. /* Check if Slave mode is selected */
  457. if(((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_TX) || ((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_SLAVE_RX))
  458. {
  459. /* Wait until Busy flag is reset */
  460. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_BSY, SET, Timeout) != HAL_OK)
  461. {
  462. /* Set the error code and execute error callback*/
  463. hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
  464. HAL_I2S_ErrorCallback(hi2s);
  465. return HAL_TIMEOUT;
  466. }
  467. }
  468. hi2s->State = HAL_I2S_STATE_READY;
  469. /* Process Unlocked */
  470. __HAL_UNLOCK(hi2s);
  471. return HAL_OK;
  472. }
  473. else
  474. {
  475. return HAL_BUSY;
  476. }
  477. }
  478. /**
  479. * @brief Receive an amount of data in blocking mode
  480. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  481. * the configuration information for I2S module
  482. * @param pData a 16-bit pointer to data buffer.
  483. * @param Size number of data sample to be sent:
  484. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  485. * configuration phase, the Size parameter means the number of 16-bit data length
  486. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  487. * the Size parameter means the number of 16-bit data length.
  488. * @param Timeout Timeout duration
  489. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  490. * between Master and Slave(example: audio streaming).
  491. * @note In I2S Master Receiver mode, just after enabling the peripheral the clock will be generate
  492. * in continuous way and as the I2S is not disabled at the end of the I2S transaction.
  493. * @retval HAL status
  494. */
  495. HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout)
  496. {
  497. if((pData == NULL ) || (Size == 0))
  498. {
  499. return HAL_ERROR;
  500. }
  501. if(hi2s->State == HAL_I2S_STATE_READY)
  502. {
  503. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  504. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  505. {
  506. hi2s->RxXferSize = (Size << 1);
  507. hi2s->RxXferCount = (Size << 1);
  508. }
  509. else
  510. {
  511. hi2s->RxXferSize = Size;
  512. hi2s->RxXferCount = Size;
  513. }
  514. /* Process Locked */
  515. __HAL_LOCK(hi2s);
  516. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  517. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  518. /* Check if the I2S is already enabled */
  519. if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  520. {
  521. /* Enable I2S peripheral */
  522. __HAL_I2S_ENABLE(hi2s);
  523. }
  524. /* Check if Master Receiver mode is selected */
  525. if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
  526. {
  527. /* Clear the Overrun Flag by a read operation on the SPI_DR register followed by a read
  528. access to the SPI_SR register. */
  529. __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  530. }
  531. /* Receive data */
  532. while(hi2s->RxXferCount > 0)
  533. {
  534. /* Wait until RXNE flag is set */
  535. if (I2S_WaitFlagStateUntilTimeout(hi2s, I2S_FLAG_RXNE, SET, Timeout) != HAL_OK)
  536. {
  537. /* Set the error code and execute error callback*/
  538. hi2s->ErrorCode |= HAL_I2S_ERROR_TIMEOUT;
  539. HAL_I2S_ErrorCallback(hi2s);
  540. return HAL_TIMEOUT;
  541. }
  542. /* Check if an overrun occurs */
  543. if(__HAL_I2S_GET_FLAG(hi2s, I2S_FLAG_OVR) == SET)
  544. {
  545. /* Set the I2S State ready */
  546. hi2s->State = HAL_I2S_STATE_READY;
  547. /* Process Unlocked */
  548. __HAL_UNLOCK(hi2s);
  549. /* Set the error code and execute error callback*/
  550. hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
  551. HAL_I2S_ErrorCallback(hi2s);
  552. return HAL_ERROR;
  553. }
  554. (*pData++) = hi2s->Instance->DR;
  555. hi2s->RxXferCount--;
  556. }
  557. hi2s->State = HAL_I2S_STATE_READY;
  558. /* Process Unlocked */
  559. __HAL_UNLOCK(hi2s);
  560. return HAL_OK;
  561. }
  562. else
  563. {
  564. return HAL_BUSY;
  565. }
  566. }
  567. /**
  568. * @brief Transmit an amount of data in non-blocking mode with Interrupt
  569. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  570. * the configuration information for I2S module
  571. * @param pData a 16-bit pointer to data buffer.
  572. * @param Size number of data sample to be sent:
  573. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  574. * configuration phase, the Size parameter means the number of 16-bit data length
  575. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  576. * the Size parameter means the number of 16-bit data length.
  577. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  578. * between Master and Slave(example: audio streaming).
  579. * @retval HAL status
  580. */
  581. HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  582. {
  583. if(hi2s->State == HAL_I2S_STATE_READY)
  584. {
  585. if((pData == NULL) || (Size == 0))
  586. {
  587. return HAL_ERROR;
  588. }
  589. hi2s->pTxBuffPtr = pData;
  590. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  591. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  592. {
  593. hi2s->TxXferSize = (Size << 1);
  594. hi2s->TxXferCount = (Size << 1);
  595. }
  596. else
  597. {
  598. hi2s->TxXferSize = Size;
  599. hi2s->TxXferCount = Size;
  600. }
  601. /* Process Locked */
  602. __HAL_LOCK(hi2s);
  603. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  604. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  605. /* Enable TXE and ERR interrupt */
  606. __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  607. /* Check if the I2S is already enabled */
  608. if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  609. {
  610. /* Enable I2S peripheral */
  611. __HAL_I2S_ENABLE(hi2s);
  612. }
  613. /* Process Unlocked */
  614. __HAL_UNLOCK(hi2s);
  615. return HAL_OK;
  616. }
  617. else
  618. {
  619. return HAL_BUSY;
  620. }
  621. }
  622. /**
  623. * @brief Receive an amount of data in non-blocking mode with Interrupt
  624. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  625. * the configuration information for I2S module
  626. * @param pData a 16-bit pointer to the Receive data buffer.
  627. * @param Size number of data sample to be sent:
  628. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  629. * configuration phase, the Size parameter means the number of 16-bit data length
  630. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  631. * the Size parameter means the number of 16-bit data length.
  632. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  633. * between Master and Slave(example: audio streaming).
  634. * @note It is recommended to use DMA for the I2S receiver to avoid de-synchronisation
  635. * between Master and Slave otherwise the I2S interrupt should be optimized.
  636. * @retval HAL status
  637. */
  638. HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  639. {
  640. if(hi2s->State == HAL_I2S_STATE_READY)
  641. {
  642. if((pData == NULL) || (Size == 0))
  643. {
  644. return HAL_ERROR;
  645. }
  646. hi2s->pRxBuffPtr = pData;
  647. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  648. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  649. {
  650. hi2s->RxXferSize = (Size << 1);
  651. hi2s->RxXferCount = (Size << 1);
  652. }
  653. else
  654. {
  655. hi2s->RxXferSize = Size;
  656. hi2s->RxXferCount = Size;
  657. }
  658. /* Process Locked */
  659. __HAL_LOCK(hi2s);
  660. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  661. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  662. /* Enable TXE and ERR interrupt */
  663. __HAL_I2S_ENABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  664. /* Check if the I2S is already enabled */
  665. if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  666. {
  667. /* Enable I2S peripheral */
  668. __HAL_I2S_ENABLE(hi2s);
  669. }
  670. /* Process Unlocked */
  671. __HAL_UNLOCK(hi2s);
  672. return HAL_OK;
  673. }
  674. else
  675. {
  676. return HAL_BUSY;
  677. }
  678. }
  679. /**
  680. * @brief Transmit an amount of data in non-blocking mode with DMA
  681. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  682. * the configuration information for I2S module
  683. * @param pData a 16-bit pointer to the Transmit data buffer.
  684. * @param Size number of data sample to be sent:
  685. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  686. * configuration phase, the Size parameter means the number of 16-bit data length
  687. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  688. * the Size parameter means the number of 16-bit data length.
  689. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  690. * between Master and Slave(example: audio streaming).
  691. * @retval HAL status
  692. */
  693. HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  694. {
  695. uint32_t *tmp;
  696. if((pData == NULL) || (Size == 0))
  697. {
  698. return HAL_ERROR;
  699. }
  700. if(hi2s->State == HAL_I2S_STATE_READY)
  701. {
  702. hi2s->pTxBuffPtr = pData;
  703. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  704. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  705. {
  706. hi2s->TxXferSize = (Size << 1);
  707. hi2s->TxXferCount = (Size << 1);
  708. }
  709. else
  710. {
  711. hi2s->TxXferSize = Size;
  712. hi2s->TxXferCount = Size;
  713. }
  714. /* Process Locked */
  715. __HAL_LOCK(hi2s);
  716. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  717. hi2s->State = HAL_I2S_STATE_BUSY_TX;
  718. /* Set the I2S Tx DMA Half transfer complete callback */
  719. hi2s->hdmatx->XferHalfCpltCallback = I2S_DMATxHalfCplt;
  720. /* Set the I2S TxDMA transfer complete callback */
  721. hi2s->hdmatx->XferCpltCallback = I2S_DMATxCplt;
  722. /* Set the DMA error callback */
  723. hi2s->hdmatx->XferErrorCallback = I2S_DMAError;
  724. /* Enable the Tx DMA Channel */
  725. tmp = (uint32_t*)&pData;
  726. HAL_DMA_Start_IT(hi2s->hdmatx, *(uint32_t*)tmp, (uint32_t)&hi2s->Instance->DR, hi2s->TxXferSize);
  727. /* Check if the I2S is already enabled */
  728. if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  729. {
  730. /* Enable I2S peripheral */
  731. __HAL_I2S_ENABLE(hi2s);
  732. }
  733. /* Enable Tx DMA Request */
  734. hi2s->Instance->CR2 |= SPI_CR2_TXDMAEN;
  735. /* Process Unlocked */
  736. __HAL_UNLOCK(hi2s);
  737. return HAL_OK;
  738. }
  739. else
  740. {
  741. return HAL_BUSY;
  742. }
  743. }
  744. /**
  745. * @brief Receive an amount of data in non-blocking mode with DMA
  746. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  747. * the configuration information for I2S module
  748. * @param pData a 16-bit pointer to the Receive data buffer.
  749. * @param Size number of data sample to be sent:
  750. * @note When a 16-bit data frame or a 16-bit data frame extended is selected during the I2S
  751. * configuration phase, the Size parameter means the number of 16-bit data length
  752. * in the transaction and when a 24-bit data frame or a 32-bit data frame is selected
  753. * the Size parameter means the number of 16-bit data length.
  754. * @note The I2S is kept enabled at the end of transaction to avoid the clock de-synchronization
  755. * between Master and Slave(example: audio streaming).
  756. * @retval HAL status
  757. */
  758. HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size)
  759. {
  760. uint32_t *tmp;
  761. if((pData == NULL) || (Size == 0))
  762. {
  763. return HAL_ERROR;
  764. }
  765. if(hi2s->State == HAL_I2S_STATE_READY)
  766. {
  767. hi2s->pRxBuffPtr = pData;
  768. if(((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_24B)||\
  769. ((hi2s->Instance->I2SCFGR & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) == I2S_DATAFORMAT_32B))
  770. {
  771. hi2s->RxXferSize = (Size << 1);
  772. hi2s->RxXferCount = (Size << 1);
  773. }
  774. else
  775. {
  776. hi2s->RxXferSize = Size;
  777. hi2s->RxXferCount = Size;
  778. }
  779. /* Process Locked */
  780. __HAL_LOCK(hi2s);
  781. hi2s->ErrorCode = HAL_I2S_ERROR_NONE;
  782. hi2s->State = HAL_I2S_STATE_BUSY_RX;
  783. /* Set the I2S Rx DMA Half transfer complete callback */
  784. hi2s->hdmarx->XferHalfCpltCallback = I2S_DMARxHalfCplt;
  785. /* Set the I2S Rx DMA transfer complete callback */
  786. hi2s->hdmarx->XferCpltCallback = I2S_DMARxCplt;
  787. /* Set the DMA error callback */
  788. hi2s->hdmarx->XferErrorCallback = I2S_DMAError;
  789. /* Check if Master Receiver mode is selected */
  790. if((hi2s->Instance->I2SCFGR & SPI_I2SCFGR_I2SCFG) == I2S_MODE_MASTER_RX)
  791. {
  792. /* Clear the Overrun Flag by a read operation to the SPI_DR register followed by a read
  793. access to the SPI_SR register. */
  794. __HAL_I2S_CLEAR_OVRFLAG(hi2s);
  795. }
  796. /* Enable the Rx DMA Channel */
  797. tmp = (uint32_t*)&pData;
  798. HAL_DMA_Start_IT(hi2s->hdmarx, (uint32_t)&hi2s->Instance->DR, *(uint32_t*)tmp, hi2s->RxXferSize);
  799. /* Check if the I2S is already enabled */
  800. if((hi2s->Instance->I2SCFGR &SPI_I2SCFGR_I2SE) != SPI_I2SCFGR_I2SE)
  801. {
  802. /* Enable I2S peripheral */
  803. __HAL_I2S_ENABLE(hi2s);
  804. }
  805. /* Enable Rx DMA Request */
  806. hi2s->Instance->CR2 |= SPI_CR2_RXDMAEN;
  807. /* Process Unlocked */
  808. __HAL_UNLOCK(hi2s);
  809. return HAL_OK;
  810. }
  811. else
  812. {
  813. return HAL_BUSY;
  814. }
  815. }
  816. /**
  817. * @brief Pauses the audio stream playing from the Media.
  818. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  819. * the configuration information for I2S module
  820. * @retval HAL status
  821. */
  822. HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s)
  823. {
  824. /* Process Locked */
  825. __HAL_LOCK(hi2s);
  826. if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  827. {
  828. /* Disable the I2S DMA Tx request */
  829. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  830. }
  831. else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  832. {
  833. /* Disable the I2S DMA Rx request */
  834. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  835. }
  836. else if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
  837. {
  838. if((hi2s->Init.Mode == I2S_MODE_SLAVE_TX)||(hi2s->Init.Mode == I2S_MODE_MASTER_TX))
  839. {
  840. /* Disable the I2S DMA Tx request */
  841. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  842. }
  843. else
  844. {
  845. /* Disable the I2S DMA Rx request */
  846. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  847. }
  848. }
  849. /* Process Unlocked */
  850. __HAL_UNLOCK(hi2s);
  851. return HAL_OK;
  852. }
  853. /**
  854. * @brief Resumes the audio stream playing from the Media.
  855. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  856. * the configuration information for I2S module
  857. * @retval HAL status
  858. */
  859. HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s)
  860. {
  861. /* Process Locked */
  862. __HAL_LOCK(hi2s);
  863. if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  864. {
  865. /* Enable the I2S DMA Tx request */
  866. SET_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
  867. }
  868. else if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  869. {
  870. /* Enable the I2S DMA Rx request */
  871. SET_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
  872. }
  873. /* If the I2S peripheral is still not enabled, enable it */
  874. if(HAL_IS_BIT_CLR(hi2s->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
  875. {
  876. /* Enable I2S peripheral */
  877. __HAL_I2S_ENABLE(hi2s);
  878. }
  879. /* Process Unlocked */
  880. __HAL_UNLOCK(hi2s);
  881. return HAL_OK;
  882. }
  883. /**
  884. * @brief Stops the audio stream playing from the Media.
  885. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  886. * the configuration information for I2S module
  887. * @retval HAL status
  888. */
  889. HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s)
  890. {
  891. /* Process Locked */
  892. __HAL_LOCK(hi2s);
  893. /* Disable the I2S Tx/Rx DMA requests */
  894. CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_TXDMAEN);
  895. CLEAR_BIT(hi2s->Instance->CR2, SPI_CR2_RXDMAEN);
  896. /* Abort the I2S DMA Channel tx */
  897. if(hi2s->hdmatx != NULL)
  898. {
  899. /* Disable the I2S DMA channel */
  900. __HAL_DMA_DISABLE(hi2s->hdmatx);
  901. HAL_DMA_Abort(hi2s->hdmatx);
  902. }
  903. /* Abort the I2S DMA Channel rx */
  904. if(hi2s->hdmarx != NULL)
  905. {
  906. /* Disable the I2S DMA channel */
  907. __HAL_DMA_DISABLE(hi2s->hdmarx);
  908. HAL_DMA_Abort(hi2s->hdmarx);
  909. }
  910. /* Disable I2S peripheral */
  911. __HAL_I2S_DISABLE(hi2s);
  912. hi2s->State = HAL_I2S_STATE_READY;
  913. /* Process Unlocked */
  914. __HAL_UNLOCK(hi2s);
  915. return HAL_OK;
  916. }
  917. /**
  918. * @brief This function handles I2S interrupt request.
  919. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  920. * the configuration information for I2S module
  921. * @retval HAL status
  922. */
  923. void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s)
  924. {
  925. __IO uint32_t i2ssr = hi2s->Instance->SR;
  926. if(hi2s->State == HAL_I2S_STATE_BUSY_RX)
  927. {
  928. /* I2S in mode Receiver ----------------------------------------------------*/
  929. if(((i2ssr & I2S_FLAG_RXNE) == I2S_FLAG_RXNE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_RXNE) != RESET))
  930. {
  931. I2S_Receive_IT(hi2s);
  932. }
  933. /* I2S Overrun error interrupt occurred -------------------------------------*/
  934. if(((i2ssr & I2S_FLAG_OVR) == I2S_FLAG_OVR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
  935. {
  936. /* Disable RXNE and ERR interrupt */
  937. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  938. /* Set the I2S State ready */
  939. hi2s->State = HAL_I2S_STATE_READY;
  940. /* Set the error code and execute error callback*/
  941. hi2s->ErrorCode |= HAL_I2S_ERROR_OVR;
  942. HAL_I2S_ErrorCallback(hi2s);
  943. }
  944. }
  945. else if(hi2s->State == HAL_I2S_STATE_BUSY_TX)
  946. {
  947. /* I2S in mode Transmitter ---------------------------------------------------*/
  948. if(((i2ssr & I2S_FLAG_TXE) == I2S_FLAG_TXE) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_TXE) != RESET))
  949. {
  950. I2S_Transmit_IT(hi2s);
  951. }
  952. /* I2S Underrun error interrupt occurred ------------------------------------*/
  953. if(((i2ssr & I2S_FLAG_UDR) == I2S_FLAG_UDR) && (__HAL_I2S_GET_IT_SOURCE(hi2s, I2S_IT_ERR) != RESET))
  954. {
  955. /* Disable TXE and ERR interrupt */
  956. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  957. /* Set the I2S State ready */
  958. hi2s->State = HAL_I2S_STATE_READY;
  959. /* Set the error code and execute error callback*/
  960. hi2s->ErrorCode |= HAL_I2S_ERROR_UDR;
  961. HAL_I2S_ErrorCallback(hi2s);
  962. }
  963. }
  964. }
  965. /**
  966. * @}
  967. */
  968. /**
  969. * @}
  970. */
  971. /** @addtogroup I2S_Private_Functions I2S Private Functions
  972. * @{
  973. */
  974. /**
  975. * @brief This function handles I2S Communication Timeout.
  976. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  977. * the configuration information for I2S module
  978. * @param Flag Flag checked
  979. * @param State Value of the flag expected
  980. * @param Timeout Duration of the timeout
  981. * @retval HAL status
  982. */
  983. static HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag,
  984. uint32_t State, uint32_t Timeout)
  985. {
  986. uint32_t tickstart = 0;
  987. /* Get tick */
  988. tickstart = HAL_GetTick();
  989. /* Wait until flag is set */
  990. if(State == RESET)
  991. {
  992. while(__HAL_I2S_GET_FLAG(hi2s, Flag) == RESET)
  993. {
  994. if(Timeout != HAL_MAX_DELAY)
  995. {
  996. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  997. {
  998. /* Set the I2S State ready */
  999. hi2s->State= HAL_I2S_STATE_READY;
  1000. /* Process Unlocked */
  1001. __HAL_UNLOCK(hi2s);
  1002. return HAL_TIMEOUT;
  1003. }
  1004. }
  1005. }
  1006. }
  1007. else
  1008. {
  1009. while(__HAL_I2S_GET_FLAG(hi2s, Flag) != RESET)
  1010. {
  1011. if(Timeout != HAL_MAX_DELAY)
  1012. {
  1013. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  1014. {
  1015. /* Set the I2S State ready */
  1016. hi2s->State= HAL_I2S_STATE_READY;
  1017. /* Process Unlocked */
  1018. __HAL_UNLOCK(hi2s);
  1019. return HAL_TIMEOUT;
  1020. }
  1021. }
  1022. }
  1023. }
  1024. return HAL_OK;
  1025. }
  1026. /**
  1027. * @}
  1028. */
  1029. /** @addtogroup I2S_Exported_Functions I2S Exported Functions
  1030. * @{
  1031. */
  1032. /** @addtogroup I2S_Exported_Functions_Group2 Input and Output operation functions
  1033. * @{
  1034. */
  1035. /**
  1036. * @brief Tx Transfer Half completed callbacks
  1037. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1038. * the configuration information for I2S module
  1039. * @retval None
  1040. */
  1041. __weak void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1042. {
  1043. /* Prevent unused argument(s) compilation warning */
  1044. UNUSED(hi2s);
  1045. /* NOTE : This function Should not be modified, when the callback is needed,
  1046. the HAL_I2S_TxHalfCpltCallback could be implemented in the user file
  1047. */
  1048. }
  1049. /**
  1050. * @brief Tx Transfer completed callbacks
  1051. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1052. * the configuration information for I2S module
  1053. * @retval None
  1054. */
  1055. __weak void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s)
  1056. {
  1057. /* Prevent unused argument(s) compilation warning */
  1058. UNUSED(hi2s);
  1059. /* NOTE : This function Should not be modified, when the callback is needed,
  1060. the HAL_I2S_TxCpltCallback could be implemented in the user file
  1061. */
  1062. }
  1063. /**
  1064. * @brief Rx Transfer half completed callbacks
  1065. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1066. * the configuration information for I2S module
  1067. * @retval None
  1068. */
  1069. __weak void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s)
  1070. {
  1071. /* Prevent unused argument(s) compilation warning */
  1072. UNUSED(hi2s);
  1073. /* NOTE : This function Should not be modified, when the callback is needed,
  1074. the HAL_I2S_RxCpltCallback could be implemented in the user file
  1075. */
  1076. }
  1077. /**
  1078. * @brief Rx Transfer completed callbacks
  1079. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1080. * the configuration information for I2S module
  1081. * @retval None
  1082. */
  1083. __weak void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s)
  1084. {
  1085. /* Prevent unused argument(s) compilation warning */
  1086. UNUSED(hi2s);
  1087. /* NOTE : This function Should not be modified, when the callback is needed,
  1088. the HAL_I2S_RxCpltCallback could be implemented in the user file
  1089. */
  1090. }
  1091. /**
  1092. * @brief I2S error callbacks
  1093. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1094. * the configuration information for I2S module
  1095. * @retval None
  1096. */
  1097. __weak void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s)
  1098. {
  1099. /* Prevent unused argument(s) compilation warning */
  1100. UNUSED(hi2s);
  1101. /* NOTE : This function Should not be modified, when the callback is needed,
  1102. the HAL_I2S_ErrorCallback could be implemented in the user file
  1103. */
  1104. }
  1105. /**
  1106. * @}
  1107. */
  1108. /** @defgroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions
  1109. * @brief Peripheral State functions
  1110. *
  1111. @verbatim
  1112. ===============================================================================
  1113. ##### Peripheral State and Errors functions #####
  1114. ===============================================================================
  1115. [..]
  1116. This subsection permits to get in run-time the status of the peripheral
  1117. and the data flow.
  1118. @endverbatim
  1119. * @{
  1120. */
  1121. /**
  1122. * @brief Return the I2S state
  1123. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1124. * the configuration information for I2S module
  1125. * @retval HAL state
  1126. */
  1127. HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s)
  1128. {
  1129. return hi2s->State;
  1130. }
  1131. /**
  1132. * @brief Return the I2S error code
  1133. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1134. * the configuration information for I2S module
  1135. * @retval I2S Error Code
  1136. */
  1137. uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s)
  1138. {
  1139. return hi2s->ErrorCode;
  1140. }
  1141. /**
  1142. * @}
  1143. */
  1144. /**
  1145. * @}
  1146. */
  1147. /**
  1148. * @brief Get I2S Input Clock based on I2S source clock selection
  1149. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1150. * the configuration information for I2S module.
  1151. * @retval I2S Clock Input
  1152. */
  1153. static uint32_t I2S_GetClockFreq(I2S_HandleTypeDef *hi2s)
  1154. {
  1155. uint32_t tmpreg = 0;
  1156. /* This variable used to store the VCO Input (value in Hz) */
  1157. uint32_t vcoinput = 0;
  1158. /* This variable used to store the I2S_CK_x (value in Hz) */
  1159. uint32_t i2sclocksource = 0;
  1160. /* Configure I2S Clock based on I2S source clock selection */
  1161. /* I2S_CLK_x : I2S Block Clock configuration for different clock sources selected */
  1162. switch(hi2s->Init.ClockSource)
  1163. {
  1164. case I2S_CLOCK_PLL :
  1165. {
  1166. /* Configure the PLLI2S division factor */
  1167. /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
  1168. if((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLSOURCE_HSI)
  1169. {
  1170. /* In Case the PLL Source is HSI (Internal Clock) */
  1171. vcoinput = (HSI_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM));
  1172. }
  1173. else
  1174. {
  1175. /* In Case the PLL Source is HSE (External Clock) */
  1176. vcoinput = ((HSE_VALUE / (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM)));
  1177. }
  1178. /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
  1179. /* I2S_CLK(first level) = PLLI2S_VCO Output/PLLI2SR */
  1180. tmpreg = (RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28;
  1181. i2sclocksource = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg);
  1182. break;
  1183. }
  1184. case I2S_CLOCK_EXTERNAL :
  1185. {
  1186. i2sclocksource = EXTERNAL_CLOCK_VALUE;
  1187. break;
  1188. }
  1189. default :
  1190. {
  1191. break;
  1192. }
  1193. }
  1194. /* the return result is the value of I2S clock */
  1195. return i2sclocksource;
  1196. }
  1197. /** @addtogroup I2S_Private_Functions I2S Private Functions
  1198. * @{
  1199. */
  1200. /**
  1201. * @brief DMA I2S transmit process complete callback
  1202. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1203. * the configuration information for the specified DMA module.
  1204. * @retval None
  1205. */
  1206. static void I2S_DMATxCplt(DMA_HandleTypeDef *hdma)
  1207. {
  1208. I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1209. if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
  1210. {
  1211. hi2s->TxXferCount = 0;
  1212. /* Disable Tx DMA Request */
  1213. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
  1214. if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
  1215. {
  1216. if(hi2s->RxXferCount == 0)
  1217. {
  1218. hi2s->State = HAL_I2S_STATE_READY;
  1219. }
  1220. }
  1221. else
  1222. {
  1223. hi2s->State = HAL_I2S_STATE_READY;
  1224. }
  1225. }
  1226. HAL_I2S_TxCpltCallback(hi2s);
  1227. }
  1228. /**
  1229. * @brief DMA I2S transmit process half complete callback
  1230. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1231. * the configuration information for the specified DMA module.
  1232. * @retval None
  1233. */
  1234. static void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
  1235. {
  1236. I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1237. HAL_I2S_TxHalfCpltCallback(hi2s);
  1238. }
  1239. /**
  1240. * @brief DMA I2S receive process complete callback
  1241. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1242. * the configuration information for the specified DMA module.
  1243. * @retval None
  1244. */
  1245. static void I2S_DMARxCplt(DMA_HandleTypeDef *hdma)
  1246. {
  1247. I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1248. if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
  1249. {
  1250. /* Disable Rx DMA Request */
  1251. hi2s->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
  1252. hi2s->RxXferCount = 0;
  1253. if(hi2s->State == HAL_I2S_STATE_BUSY_TX_RX)
  1254. {
  1255. if(hi2s->TxXferCount == 0)
  1256. {
  1257. hi2s->State = HAL_I2S_STATE_READY;
  1258. }
  1259. }
  1260. else
  1261. {
  1262. hi2s->State = HAL_I2S_STATE_READY;
  1263. }
  1264. }
  1265. HAL_I2S_RxCpltCallback(hi2s);
  1266. }
  1267. /**
  1268. * @brief DMA I2S receive process half complete callback
  1269. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1270. * the configuration information for the specified DMA module.
  1271. * @retval None
  1272. */
  1273. static void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  1274. {
  1275. I2S_HandleTypeDef* hi2s = (I2S_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  1276. HAL_I2S_RxHalfCpltCallback(hi2s);
  1277. }
  1278. /**
  1279. * @brief DMA I2S communication error callback
  1280. * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  1281. * the configuration information for the specified DMA module.
  1282. * @retval None
  1283. */
  1284. static void I2S_DMAError(DMA_HandleTypeDef *hdma)
  1285. {
  1286. I2S_HandleTypeDef* hi2s = ( I2S_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  1287. /* Disable Rx and Tx DMA Request */
  1288. hi2s->Instance->CR2 &= (uint32_t)(~(SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN));
  1289. hi2s->TxXferCount = 0;
  1290. hi2s->RxXferCount = 0;
  1291. hi2s->State= HAL_I2S_STATE_READY;
  1292. /* Set the error code and execute error callback*/
  1293. hi2s->ErrorCode |= HAL_I2S_ERROR_DMA;
  1294. HAL_I2S_ErrorCallback(hi2s);
  1295. }
  1296. /**
  1297. * @brief Transmit an amount of data in non-blocking mode with Interrupt
  1298. * @param hi2s pointer to a I2S_HandleTypeDef structure that contains
  1299. * the configuration information for I2S module
  1300. * @retval None
  1301. */
  1302. static void I2S_Transmit_IT(I2S_HandleTypeDef *hi2s)
  1303. {
  1304. /* Transmit data */
  1305. hi2s->Instance->DR = (*hi2s->pTxBuffPtr++);
  1306. hi2s->TxXferCount--;
  1307. if(hi2s->TxXferCount == 0)
  1308. {
  1309. /* Disable TXE and ERR interrupt */
  1310. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_TXE | I2S_IT_ERR));
  1311. hi2s->State = HAL_I2S_STATE_READY;
  1312. HAL_I2S_TxCpltCallback(hi2s);
  1313. }
  1314. }
  1315. /**
  1316. * @brief Receive an amount of data in non-blocking mode with Interrupt
  1317. * @param hi2s I2S handle
  1318. * @retval None
  1319. */
  1320. static void I2S_Receive_IT(I2S_HandleTypeDef *hi2s)
  1321. {
  1322. /* Receive data */
  1323. (*hi2s->pRxBuffPtr++) = hi2s->Instance->DR;
  1324. hi2s->RxXferCount--;
  1325. if(hi2s->RxXferCount == 0)
  1326. {
  1327. /* Disable RXNE and ERR interrupt */
  1328. __HAL_I2S_DISABLE_IT(hi2s, (I2S_IT_RXNE | I2S_IT_ERR));
  1329. hi2s->State = HAL_I2S_STATE_READY;
  1330. HAL_I2S_RxCpltCallback(hi2s);
  1331. }
  1332. }
  1333. /**
  1334. * @}
  1335. */
  1336. #endif /* HAL_I2S_MODULE_ENABLED */
  1337. /**
  1338. * @}
  1339. */
  1340. /**
  1341. * @}
  1342. */
  1343. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/