drv_uart.c 14 KB

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  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2015-11-19 Urey the first version
  23. */
  24. #include <rthw.h>
  25. #include <rtthread.h>
  26. #include <rtdevice.h>
  27. #include <string.h>
  28. #include "board.h"
  29. #include "drv_uart.h"
  30. #include "drv_gpio.h"
  31. #include "drv_clock.h"
  32. struct jz_uart_s
  33. {
  34. rt_uint32_t hw_base;
  35. rt_uint32_t irqno;
  36. char name[RT_NAME_MAX];
  37. };
  38. static rt_err_t uart_configure (struct rt_serial_device *serial, struct serial_configure *cfg);
  39. static rt_err_t uart_control (struct rt_serial_device *serial, int cmd, void *arg);
  40. static int uart_putc (struct rt_serial_device *serial, char c);
  41. static int uart_getc (struct rt_serial_device *serial);
  42. static rt_size_t uart_dma_transmit (struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
  43. static void uart_irq_handler (int irqno, void *param);
  44. const struct rt_uart_ops _uart_ops =
  45. {
  46. uart_configure,
  47. uart_control,
  48. uart_putc,
  49. uart_getc,
  50. uart_dma_transmit
  51. };
  52. struct baudtoregs_t
  53. {
  54. unsigned int baud;
  55. unsigned short div;
  56. unsigned int umr:5;
  57. unsigned int uacr:12;
  58. };
  59. static struct baudtoregs_t baudtoregs[] =
  60. {
  61. /*
  62. The data is generated by a python,
  63. the script is tools/tty/get_divisor.py
  64. */
  65. #if (BOARD_EXTAL_CLK == 24000000)
  66. {50,0x7530,0x10,0x0},
  67. {75,0x4e20,0x10,0x0},
  68. {110,0x3521,0x10,0x0},
  69. {134,0x2b9d,0x10,0x0},
  70. {150,0x2710,0x10,0x0},
  71. {200,0x1d4c,0x10,0x0},
  72. {300,0x1388,0x10,0x0},
  73. {600,0x9c4,0x10,0x0},
  74. {1200,0x4e2,0x10,0x0},
  75. {1800,0x340,0x10,0x0},
  76. {2400,0x271,0x10,0x0},
  77. {4800,0x138,0x10,0x0},
  78. {9600,0x9c,0x10,0x0},
  79. {19200,0x4e,0x10,0x0},
  80. {38400,0x27,0x10,0x0},
  81. {57600,0x1a,0x10,0x0},
  82. {115200,0xd,0x10,0x0},
  83. {230400,0x6,0x11,0x550},
  84. {460800,0x3,0x11,0x550},
  85. {500000,0x3,0x10,0x0},
  86. {576000,0x3,0xd,0x0},
  87. {921600,0x2,0xd,0x0},
  88. {1000000,0x2,0xc,0x0},
  89. {1152000,0x1,0x14,0x400},
  90. {1500000,0x1,0x10,0x0},
  91. {2000000,0x1,0xc,0x0},
  92. {2500000,0x1,0x9,0x780},
  93. {3000000,0x1,0x8,0x0},
  94. {3500000,0x1,0x6,0x400},
  95. {4000000,0x1,0x6,0x0},
  96. #elif (BOARD_EXTAL_CLK == 26000000)
  97. {50,0x7ef4,0x10,0x0},
  98. {75,0x546b,0x10,0x0},
  99. {110,0x398f,0x10,0x0},
  100. {134,0x2f40,0x10,0x0},
  101. {150,0x2a36,0x10,0x0},
  102. {200,0x1fbd,0x10,0x0},
  103. {300,0x151b,0x10,0x0},
  104. {600,0xa8e,0x10,0x0},
  105. {1200,0x547,0x10,0x0},
  106. {1800,0x385,0x10,0x0},
  107. {2400,0x2a4,0x10,0x0},
  108. {4800,0x152,0x10,0x0},
  109. {9600,0xa9,0x10,0x0},
  110. {19200,0x54,0x10,0x2},
  111. {38400,0x2a,0x10,0x2},
  112. {57600,0x1c,0x10,0x2},
  113. {115200,0xe,0x10,0x2},
  114. {230400,0x7,0x10,0x2},
  115. {460800,0x4,0xe,0x2},
  116. {500000,0x3,0x11,0x550},
  117. {576000,0x3,0xf,0x2},
  118. {921600,0x2,0xe,0x2},
  119. {1000000,0x2,0xd,0x0},
  120. {1152000,0x2,0xb,0x248},
  121. {1500000,0x1,0x11,0x550},
  122. {2000000,0x1,0xd,0x0},
  123. {2500000,0x1,0xa,0x2a0},
  124. {3000000,0x1,0x8,0x700},
  125. {3500000,0x1,0x7,0x2a0},
  126. {4000000,0x1,0x6,0x7c0},
  127. #elif (BOARD_EXTAL_CLK == 48000000)
  128. {50,0xea60,0x10,0x0},
  129. {75,0x9c40,0x10,0x0},
  130. {110,0x6a42,0x10,0x0},
  131. {134,0x573a,0x10,0x0},
  132. {150,0x4e20,0x10,0x0},
  133. {200,0x3a98,0x10,0x0},
  134. {300,0x2710,0x10,0x0},
  135. {600,0x1388,0x10,0x0},
  136. {1200,0x9c4,0x10,0x0},
  137. {1800,0x67f,0x10,0x0},
  138. {2400,0x4e2,0x10,0x0},
  139. {4800,0x271,0x10,0x0},
  140. {9600,0x138,0x10,0x0},
  141. {19200,0x9c,0x10,0x0},
  142. {38400,0x4e,0x10,0x0},
  143. {57600,0x34,0x10,0x0},
  144. {115200,0x1a,0x10,0x0},
  145. {230400,0xd,0x10,0x0},
  146. {460800,0x6,0x11,0x550},
  147. {500000,0x6,0x10,0x0},
  148. {576000,0x5,0x10,0x700},
  149. {921600,0x3,0x11,0x550},
  150. {1000000,0x3,0x10,0x0},
  151. {1152000,0x3,0xd,0x0},
  152. {1500000,0x2,0x10,0x0},
  153. {2000000,0x2,0xc,0x0},
  154. {2500000,0x1,0x13,0x84},
  155. {3000000,0x1,0x10,0x0},
  156. {3500000,0x1,0xd,0x600},
  157. {4000000,0x1,0xc,0x0},
  158. #endif
  159. };
  160. static unsigned short quot1[3] = {0}; /* quot[0]:baud_div, quot[1]:umr, quot[2]:uacr */
  161. static unsigned short *get_divisor(unsigned int baud)
  162. {
  163. struct baudtoregs_t *bt;
  164. int index;
  165. for (index = 0; index < sizeof(baudtoregs)/sizeof(baudtoregs[0]); index ++)
  166. {
  167. bt = &baudtoregs[index];
  168. if (bt->baud == baud)
  169. {
  170. break;
  171. }
  172. }
  173. if (index < sizeof(baudtoregs)/sizeof(baudtoregs[0]))
  174. {
  175. quot1[0] = bt->div;
  176. quot1[1] = bt->umr;
  177. quot1[2] = bt->uacr;
  178. return quot1;
  179. }
  180. return NULL;
  181. }
  182. /*
  183. * UART Initiation
  184. */
  185. void rt_hw_uart_init(void)
  186. {
  187. struct rt_serial_device *serial;
  188. struct jz_uart_s *uart;
  189. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  190. #ifdef RT_USING_UART0 /* for BT */
  191. {
  192. static struct rt_serial_device serial0;
  193. static struct jz_uart_s uart0;
  194. serial = &serial0;
  195. uart = &uart0;
  196. serial->ops = &_uart_ops;
  197. serial->config = config;
  198. serial->config.bufsz = 2048;
  199. serial->config.baud_rate = 115200;
  200. uart->hw_base = UART0_BASE;
  201. uart->irqno = IRQ_UART0;
  202. strcpy(uart->name, "uart0");
  203. /* PC10/11/12/13 as RXD/TXD/RTS/CTS */
  204. gpio_set_func(GPIO_PORT_C, GPIO_Pin_10, GPIO_FUNC_0);
  205. gpio_set_func(GPIO_PORT_C, GPIO_Pin_11, GPIO_FUNC_0);
  206. gpio_set_func(GPIO_PORT_C, GPIO_Pin_12, GPIO_FUNC_0);
  207. gpio_set_func(GPIO_PORT_C, GPIO_Pin_13, GPIO_FUNC_0);
  208. clk_enable(clk_get("uart0"));
  209. {
  210. extern int uart0_clk(void);
  211. uart0_clk();
  212. }
  213. rt_hw_serial_register(serial,
  214. "uart0",
  215. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  216. uart);
  217. }
  218. #endif
  219. #ifdef RT_USING_UART1
  220. {
  221. static struct rt_serial_device serial1;
  222. static struct jz_uart_s uart1;
  223. serial = &serial1;
  224. uart = &uart1;
  225. strcpy(uart->name, "uart1");
  226. serial->ops = &_uart_ops;
  227. serial->config = config;
  228. serial->config.baud_rate = 115200;
  229. uart->hw_base = UART1_BASE;
  230. uart->irqno = IRQ_UART1;
  231. /* PD2/3/4/5 as RXD/TXD/RTS/CTS */
  232. gpio_set_func(GPIO_PORT_D, GPIO_Pin_2, GPIO_FUNC_1);
  233. gpio_set_func(GPIO_PORT_D, GPIO_Pin_3, GPIO_FUNC_1);
  234. gpio_set_func(GPIO_PORT_D, GPIO_Pin_4, GPIO_FUNC_1);
  235. gpio_set_func(GPIO_PORT_D, GPIO_Pin_5, GPIO_FUNC_1);
  236. clk_enable(clk_get("uart1"));
  237. {
  238. extern int uart1_clk(void);
  239. uart1_clk();
  240. }
  241. rt_hw_serial_register(serial,
  242. "uart1",
  243. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  244. uart);
  245. }
  246. #endif
  247. #ifdef RT_USING_UART2
  248. {
  249. static struct rt_serial_device serial2;
  250. static struct jz_uart_s uart2;
  251. serial = &serial2;
  252. uart = &uart2;
  253. strcpy(uart->name, "uart2");
  254. #ifdef CONFIG_SYS_UART2_PD
  255. gpio_set_func(GPIO_PORT_D,GPIO_Pin_4,GPIO_FUNC_0);
  256. gpio_set_func(GPIO_PORT_D,GPIO_Pin_5,GPIO_FUNC_0);
  257. #else
  258. //USE JTAG IO for UART2
  259. gpio_set_func(GPIO_PORT_C,GPIO_Pin_31,GPIO_FUNC_1);
  260. #endif
  261. serial->ops = &_uart_ops;
  262. serial->config = config;
  263. serial->config.baud_rate = 115200;
  264. uart->hw_base = UART2_BASE;
  265. uart->irqno = IRQ_UART2;
  266. clk_enable(clk_get("uart2"));
  267. rt_hw_serial_register(serial,
  268. "uart2",
  269. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  270. uart);
  271. }
  272. #endif
  273. }
  274. /*
  275. * UART interface
  276. */
  277. static rt_err_t uart_configure (struct rt_serial_device *serial, struct serial_configure *cfg)
  278. {
  279. rt_uint32_t baud_div;
  280. unsigned short *quot1;
  281. struct jz_uart_s * uart;
  282. RT_ASSERT(serial != RT_NULL);
  283. serial->config = *cfg;
  284. uart = serial->parent.user_data;
  285. RT_ASSERT(uart != RT_NULL);
  286. /* Init UART Hardware */
  287. UART_IER(uart->hw_base) = 0; /* clear interrupt */
  288. UART_FCR(uart->hw_base) = ~UARTFCR_UUE; /* disable UART unite */
  289. /* Enable UART clock */
  290. /* Set both receiver and transmitter in UART mode (not SIR) */
  291. UART_SIRCR(uart->hw_base) = ~(SIRCR_RSIRE | SIRCR_TSIRE);
  292. /* Set databits, stopbits and parity. (8-bit data, 1 stopbit, no parity) */
  293. UART_LCR(uart->hw_base) = UARTLCR_WLEN_8;
  294. /* set baudrate */
  295. quot1 = get_divisor(cfg->baud_rate);
  296. if (quot1 == RT_NULL)
  297. {
  298. #if defined(RT_USING_JZ4750) || defined(RT_USING_JZ4755) || defined(RT_USING_JZ4760)
  299. if(REG_CPM_CPCCR & (1UL << 30))
  300. {
  301. /* CPCCR.ECS = 1: clock source is EXCLK/2 */
  302. baud_div = BOARD_EXTAL_CLK / 2 / 16 / cfg->baud_rate;
  303. }
  304. else
  305. #endif
  306. {
  307. /* CPCCR.ECS = 0: clock source is EXCLK */
  308. baud_div = BOARD_EXTAL_CLK / 16 / cfg->baud_rate;
  309. }
  310. UART_DLHR(uart->hw_base) = (baud_div >> 8) & 0xff;
  311. UART_DLLR(uart->hw_base) = baud_div & 0xff;
  312. UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
  313. }
  314. else
  315. {
  316. UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
  317. UART_DLHR(uart->hw_base) = (quot1[0] >> 8) & 0xff;
  318. UART_DLLR(uart->hw_base) = quot1[0] & 0xff;
  319. UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
  320. UART_UMR(uart->hw_base) = quot1[1] & 0xff;
  321. UART_UACR(uart->hw_base) = quot1[2] & 0xff;
  322. }
  323. if (uart->hw_base == UART0_BASE)
  324. {
  325. rt_kprintf("enable uart0 CTS/RTS and hw flow control\n");
  326. rt_kprintf("baudrate => %d\n", cfg->baud_rate);
  327. rt_kprintf("div: %d, umr %d, uacr %d\n", quot1[0], quot1[1], quot1[2]);
  328. /* configure CTS/RTS and hardware flow control */
  329. UART_MCR(uart->hw_base) |= (UARTMCR_MCE | UARTMCR_FCM);
  330. }
  331. else if (uart->hw_base == UART1_BASE)
  332. {
  333. rt_kprintf("enable uart1 CTS/RTS and hw flow control\n");
  334. rt_kprintf("baudrate => %d\n", cfg->baud_rate);
  335. rt_kprintf("div: %d, umr %d, uacr %d\n", quot1[0], quot1[1], quot1[2]);
  336. /* configure CTS/RTS and hardware flow control */
  337. UART_MCR(uart->hw_base) |= (UARTMCR_MCE | UARTMCR_FCM);
  338. }
  339. /* Enable UART unit, enable and clear FIFO */
  340. UART_FCR(uart->hw_base) = UARTFCR_UUE | UARTFCR_FE | UARTFCR_TFLS | UARTFCR_RFLS;
  341. return (RT_EOK);
  342. }
  343. int uart_set_baudrate(int baudrate)
  344. {
  345. unsigned short *quot1;
  346. struct jz_uart_s * uart;
  347. struct rt_serial_device *serial;
  348. serial = (struct rt_serial_device *)rt_device_find("uart0");
  349. uart = serial->parent.user_data;
  350. RT_ASSERT(uart != RT_NULL);
  351. /* set baudrate */
  352. quot1 = get_divisor(baudrate);
  353. if (quot1)
  354. {
  355. UART_LCR(uart->hw_base) |= UARTLCR_DLAB;
  356. UART_DLHR(uart->hw_base) = (quot1[0] >> 8) & 0xff;
  357. UART_DLLR(uart->hw_base) = quot1[0] & 0xff;
  358. UART_LCR(uart->hw_base) &= ~UARTLCR_DLAB;
  359. UART_UMR(uart->hw_base) = quot1[1] & 0xff;
  360. UART_UACR(uart->hw_base) = quot1[2] & 0xff;
  361. }
  362. rt_kprintf("change baudrate done!\n");
  363. return 0;
  364. }
  365. static rt_err_t uart_control (struct rt_serial_device *serial, int cmd, void *arg)
  366. {
  367. struct jz_uart_s * uart;
  368. uart = serial->parent.user_data;
  369. RT_ASSERT(uart != RT_NULL);
  370. switch (cmd)
  371. {
  372. case RT_DEVICE_CTRL_CLR_INT:
  373. /* Disable the UART Interrupt */
  374. UART_IER(uart->hw_base) &= ~(UARTIER_RIE | UARTIER_RTIE);
  375. rt_hw_interrupt_mask(uart->irqno);
  376. break;
  377. case RT_DEVICE_CTRL_SET_INT:
  378. /* install interrupt */
  379. rt_hw_interrupt_install(uart->irqno, uart_irq_handler,
  380. serial, uart->name);
  381. rt_hw_interrupt_umask(uart->irqno);
  382. /* Enable the UART Interrupt */
  383. UART_IER(uart->hw_base) |= (UARTIER_RIE | UARTIER_RTIE);
  384. break;
  385. }
  386. return (RT_EOK);
  387. }
  388. static int uart_putc (struct rt_serial_device *serial, char c)
  389. {
  390. struct jz_uart_s* uart;
  391. int i = 0;
  392. uart = serial->parent.user_data;
  393. /* FIFO status, contain valid data */
  394. while (!((UART_LSR(uart->hw_base) & (UARTLSR_TDRQ | UARTLSR_TEMT)) == 0x60))
  395. {
  396. i ++;
  397. if (i > 0xfffff)
  398. {
  399. rt_kprintf("uart lst=>0x%02x\n", UART_LSR(uart->hw_base));
  400. i = 0;
  401. }
  402. }
  403. /* write data */
  404. UART_TDR(uart->hw_base) = c;
  405. return (1);
  406. }
  407. static int uart_getc (struct rt_serial_device *serial)
  408. {
  409. struct jz_uart_s* uart = serial->parent.user_data;
  410. /* Receive Data Available */
  411. if (UART_LSR(uart->hw_base) & UARTLSR_DR)
  412. {
  413. return UART_RDR(uart->hw_base);
  414. }
  415. return (-1);
  416. }
  417. static rt_size_t uart_dma_transmit (struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  418. {
  419. return (0);
  420. }
  421. /* UART interrupt handler */
  422. static void uart_irq_handler(int irqno, void *param)
  423. {
  424. rt_ubase_t isr;
  425. struct rt_serial_device *serial = (struct rt_serial_device*)param;
  426. struct jz_uart_s* uart = serial->parent.user_data;
  427. /* read interrupt status and clear it */
  428. isr = UART_ISR(uart->hw_base);
  429. if (isr & UARTISR_IID_RDI) /* Receive Data Available */
  430. {
  431. rt_hw_serial_isr(serial,RT_SERIAL_EVENT_RX_IND);
  432. }
  433. if(isr & UARTISR_IID_THRI)
  434. {
  435. rt_hw_serial_isr(serial,RT_SERIAL_EVENT_TX_DONE);
  436. }
  437. }