drv_slcd_otm4802.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247
  1. /*
  2. * File : drv_slcdc_OTM4802.c
  3. * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
  4. *
  5. * Change Logs:
  6. * Date Author Notes
  7. * 2017Äê5ÔÂ6ÈÕ Urey the first version
  8. */
  9. #include <rtthread.h>
  10. #include <cache.h>
  11. #include "board.h"
  12. #include "drv_slcdc.h"
  13. #include <drv_gpio.h>
  14. #ifdef RT_USING_OTM4802
  15. #define LCD_WIDTH 480
  16. #define LCD_HEIGHT 320
  17. rt_uint32_t _lcm_cmd_table[]=
  18. {
  19. 0x2C2C2C2C,
  20. };
  21. const struct slcd_data_table _lcm_data_table[] =
  22. {
  23. /* LCD init code */
  24. {SMART_CONFIG_CMD, 0xff}, //Command 2 Enable
  25. {SMART_CONFIG_DATA, 0x48},
  26. {SMART_CONFIG_DATA, 0x02},
  27. {SMART_CONFIG_DATA, 0x01},
  28. {SMART_CONFIG_CMD, 0x00},
  29. {SMART_CONFIG_DATA, 0x80},
  30. {SMART_CONFIG_CMD, 0xff}, //ORISE Command Enable
  31. {SMART_CONFIG_DATA, 0x48},
  32. {SMART_CONFIG_DATA, 0x02},
  33. {SMART_CONFIG_CMD, 0x00},
  34. {SMART_CONFIG_DATA, 0x90},
  35. {SMART_CONFIG_CMD, 0xFF}, //MPU 16bit setting
  36. {SMART_CONFIG_DATA, 0x01}, //02-16BIT MCU,01-8BIT MCU
  37. {SMART_CONFIG_CMD, 0x00},
  38. {SMART_CONFIG_DATA, 0x93},
  39. {SMART_CONFIG_CMD, 0xFF}, //SW MPU enable
  40. {SMART_CONFIG_DATA, 0x20},
  41. {SMART_CONFIG_CMD, 0x00},
  42. {SMART_CONFIG_DATA, 0x00},
  43. {SMART_CONFIG_CMD, 0x51}, //Wright Display brightness
  44. {SMART_CONFIG_DATA, 0xf0},
  45. {SMART_CONFIG_CMD, 0x00},
  46. {SMART_CONFIG_DATA, 0x00},
  47. {SMART_CONFIG_CMD, 0x53}, // Wright CTRL Display
  48. {SMART_CONFIG_DATA, 0x24},
  49. {SMART_CONFIG_CMD, 0x00},
  50. {SMART_CONFIG_DATA, 0xb1},
  51. {SMART_CONFIG_CMD, 0xc5}, //VSEL setting
  52. {SMART_CONFIG_DATA, 0x00},
  53. {SMART_CONFIG_CMD, 0x00},
  54. {SMART_CONFIG_DATA, 0xB0},
  55. {SMART_CONFIG_CMD, 0xc4}, //Gate Timing control
  56. {SMART_CONFIG_DATA, 0x02},
  57. {SMART_CONFIG_DATA, 0x08},
  58. {SMART_CONFIG_DATA, 0x05},
  59. {SMART_CONFIG_DATA, 0x00},
  60. {SMART_CONFIG_CMD, 0x00},
  61. {SMART_CONFIG_DATA, 0x90},
  62. {SMART_CONFIG_CMD, 0xc0}, //TCON MCLK Shift Control
  63. {SMART_CONFIG_DATA, 0x00},
  64. {SMART_CONFIG_DATA, 0x0f},
  65. {SMART_CONFIG_DATA, 0x00},
  66. {SMART_CONFIG_DATA, 0x15},
  67. {SMART_CONFIG_DATA, 0x00},
  68. {SMART_CONFIG_DATA, 0x17},
  69. {SMART_CONFIG_CMD, 0x00},
  70. {SMART_CONFIG_DATA, 0x82},
  71. {SMART_CONFIG_CMD, 0xc5}, //Adjust pump phase
  72. {SMART_CONFIG_DATA, 0x01},
  73. {SMART_CONFIG_CMD, 0x00},
  74. {SMART_CONFIG_DATA, 0x90},
  75. {SMART_CONFIG_CMD, 0xc5}, //Adjust pump phase
  76. {SMART_CONFIG_DATA, 0x47},
  77. {SMART_CONFIG_CMD, 0x00},
  78. {SMART_CONFIG_DATA, 0x00},
  79. {SMART_CONFIG_CMD, 0xd8}, //GVDD/NGVDD Setting
  80. {SMART_CONFIG_DATA, 0x58}, //58,17V
  81. {SMART_CONFIG_DATA, 0x58}, //58
  82. {SMART_CONFIG_CMD, 0x00},
  83. {SMART_CONFIG_DATA, 0x00},
  84. {SMART_CONFIG_CMD, 0xd9}, //VCOM Setting
  85. {SMART_CONFIG_DATA, 0xb0}, //
  86. {SMART_CONFIG_CMD, 0x00},
  87. {SMART_CONFIG_DATA, 0x91},
  88. {SMART_CONFIG_CMD, 0xb3}, //Display setting
  89. {SMART_CONFIG_DATA, 0xC0},
  90. {SMART_CONFIG_DATA, 0x25},
  91. {SMART_CONFIG_CMD, 0x00},
  92. {SMART_CONFIG_DATA, 0x81},
  93. {SMART_CONFIG_CMD, 0xC1}, //Osillator Adjustment:70Hz
  94. {SMART_CONFIG_DATA, 0x77},
  95. {SMART_CONFIG_CMD, 0x00},
  96. {SMART_CONFIG_DATA, 0x00},
  97. {SMART_CONFIG_CMD, 0xe1}, //Gamma setting(positive)
  98. {SMART_CONFIG_DATA, 0x00},
  99. {SMART_CONFIG_DATA, 0x05},
  100. {SMART_CONFIG_DATA, 0x09},
  101. {SMART_CONFIG_DATA, 0x04},
  102. {SMART_CONFIG_DATA, 0x02},
  103. {SMART_CONFIG_DATA, 0x0b},
  104. {SMART_CONFIG_DATA, 0x0a},
  105. {SMART_CONFIG_DATA, 0x09},
  106. {SMART_CONFIG_DATA, 0x05},
  107. {SMART_CONFIG_DATA, 0x08},
  108. {SMART_CONFIG_DATA, 0x10},
  109. {SMART_CONFIG_DATA, 0x05},
  110. {SMART_CONFIG_DATA, 0x06},
  111. {SMART_CONFIG_DATA, 0x11},
  112. {SMART_CONFIG_DATA, 0x09},
  113. {SMART_CONFIG_DATA, 0x01},
  114. {SMART_CONFIG_CMD, 0x00},
  115. {SMART_CONFIG_DATA, 0x00},
  116. {SMART_CONFIG_CMD, 0xe2}, //Gamma setting(negative)
  117. {SMART_CONFIG_DATA, 0x00},
  118. {SMART_CONFIG_DATA, 0x05},
  119. {SMART_CONFIG_DATA, 0x09},
  120. {SMART_CONFIG_DATA, 0x04},
  121. {SMART_CONFIG_DATA, 0x02},
  122. {SMART_CONFIG_DATA, 0x0b},
  123. {SMART_CONFIG_DATA, 0x0a},
  124. {SMART_CONFIG_DATA, 0x09},
  125. {SMART_CONFIG_DATA, 0x05},
  126. {SMART_CONFIG_DATA, 0x08},
  127. {SMART_CONFIG_DATA, 0x10},
  128. {SMART_CONFIG_DATA, 0x05},
  129. {SMART_CONFIG_DATA, 0x06},
  130. {SMART_CONFIG_DATA, 0x11},
  131. {SMART_CONFIG_DATA, 0x09},
  132. {SMART_CONFIG_DATA, 0x01},
  133. {SMART_CONFIG_CMD, 0x00},
  134. {SMART_CONFIG_DATA, 0x00},
  135. {SMART_CONFIG_CMD, 0x00}, //End Gamma setting
  136. {SMART_CONFIG_DATA, 0x00},
  137. {SMART_CONFIG_CMD, 0x00},
  138. {SMART_CONFIG_DATA, 0x80},
  139. {SMART_CONFIG_CMD, 0xff}, //Orise mode command Disable
  140. {SMART_CONFIG_DATA, 0x00},
  141. {SMART_CONFIG_DATA, 0x00},
  142. {SMART_CONFIG_CMD, 0x00},
  143. {SMART_CONFIG_DATA, 0x00},
  144. {SMART_CONFIG_CMD, 0xff}, //Command 2 Disable
  145. {SMART_CONFIG_DATA, 0xff},
  146. {SMART_CONFIG_DATA, 0xff},
  147. {SMART_CONFIG_DATA, 0xff},
  148. //{SMART_CONFIG_CMD, 0x35}, //TE ON
  149. //{SMART_CONFIG_DATA, 0x00},
  150. {SMART_CONFIG_CMD, 0x36}, //set X Y refresh direction
  151. {SMART_CONFIG_DATA, 0x60},
  152. {SMART_CONFIG_CMD, 0x3A}, //16-bit/pixe 565
  153. {SMART_CONFIG_DATA, 0x05},
  154. {SMART_CONFIG_CMD, 0x2A}, //Frame rate control 320
  155. {SMART_CONFIG_DATA, 0x00},
  156. {SMART_CONFIG_DATA, 0x00},
  157. {SMART_CONFIG_DATA, (LCD_WIDTH -1 ) >> 8},
  158. {SMART_CONFIG_DATA, (LCD_WIDTH -1 ) & 0xFF},
  159. {SMART_CONFIG_CMD, 0x2B}, //Display function control 480
  160. {SMART_CONFIG_DATA, 0x00},
  161. {SMART_CONFIG_DATA, 0x00},
  162. {SMART_CONFIG_DATA, (LCD_WIDTH -1 ) >> 8},
  163. {SMART_CONFIG_DATA, (LCD_HEIGHT -1 ) & 0xFF},
  164. {SMART_CONFIG_CMD, 0x11},
  165. {SMART_CONFIG_UDELAY, 120},
  166. {SMART_CONFIG_CMD, 0x29}, //display on
  167. {SMART_CONFIG_CMD, 0x2c},
  168. };
  169. struct slcd_configure _lcm_config =
  170. {
  171. .rsply_cmd_high = 0,
  172. .csply_active_high = 0,
  173. .newcfg_fmt_conv = 1,
  174. .width = LCD_WIDTH,
  175. .height = LCD_HEIGHT,
  176. .fmt = RTGRAPHIC_PIXEL_FORMAT_RGB565,
  177. .bpp = 16,
  178. .bus_width = 8,
  179. .reg_width = 8,
  180. .refresh = 60,
  181. .data_table = &_lcm_data_table[0],
  182. .data_table_num = sizeof(_lcm_data_table)/sizeof(_lcm_data_table[0]),
  183. .cmd_table = &_lcm_cmd_table[0],
  184. .cmd_table_num = sizeof(_lcm_cmd_table)/sizeof(_lcm_cmd_table[0])
  185. };
  186. int rt_hw_otm4802_init(void)
  187. {
  188. rt_thread_delay(rt_tick_from_millisecond(500));
  189. /* Power ON */
  190. gpio_direction_output(GPIO_PORT_B,GPIO_Pin_16,1); //RD = 1
  191. gpio_direction_output(GPIO_PORT_B,GPIO_Pin_18,1); //CS = 1
  192. gpio_set_value(LCD_RST_PORT, LCD_RST_PIN, 0);
  193. rt_thread_delay(rt_tick_from_millisecond(20));
  194. gpio_set_value(LCD_RST_PORT, LCD_RST_PIN, 1);
  195. rt_thread_delay(rt_tick_from_millisecond(500));
  196. gpio_set_value(GPIO_PORT_B, GPIO_Pin_18, 0); //CS = 0
  197. /* enable backlight */
  198. gpio_direction_output(LCD_BL_PORT, LCD_BL_PIN,1);
  199. /* init lcd & register lcd device */
  200. rt_hw_slcd_init(&_lcm_config);
  201. return 0;
  202. }
  203. #endif