dump_slcd.c 5.5 KB

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  1. /*
  2. * File : dump_slcd.c
  3. * COPYRIGHT (C) 2008 - 2016, RT-Thread Development Team
  4. *
  5. * Change Logs:
  6. * Date Author Notes
  7. * 2017Äê4ÔÂ11ÈÕ Urey the first version
  8. */
  9. #include <rtthread.h>
  10. #include <finsh.h>
  11. #include <x1000.h>
  12. #include "x1000_slcdc.h"
  13. /* SLCDC reg ops */
  14. #define slcd_reg_write(addr,config) writel(config,addr)
  15. #define slcd_reg_read(addr) readl(addr)
  16. int dump_slcd_regs(void)
  17. {
  18. int tmp;
  19. rt_kprintf("$$$dump_lcd_reg\n");
  20. rt_kprintf("LCDC_CFG:(0x%08x) \t0x%08x\n", LCDC_CFG,slcd_reg_read(LCDC_CFG));
  21. rt_kprintf("LCDC_CTRL:(0x%08x)\t0x%08x\n",LCDC_CTRL,slcd_reg_read(LCDC_CTRL));
  22. rt_kprintf("LCDC_STATE:(0x%08x)\t0x%08x\n",LCDC_STATE,slcd_reg_read(LCDC_STATE));
  23. rt_kprintf("LCDC_OSDC:(0x%08x)\t0x%08x\n", LCDC_OSDC,slcd_reg_read(LCDC_OSDC));
  24. rt_kprintf("LCDC_OSDCTRL:(0x%08x)\t0x%08x\n",LCDC_OSDCTRL,slcd_reg_read(LCDC_OSDCTRL));
  25. rt_kprintf("LCDC_OSDS:(0x%08x)\t0x%08x\n",LCDC_OSDS,slcd_reg_read(LCDC_OSDS));
  26. rt_kprintf("LCDC_BGC0:(0x%08x)\t0x%08x\n",LCDC_BGC0,slcd_reg_read(LCDC_BGC0));
  27. rt_kprintf("LCDC_BGC1:(0x%08x)\t0x%08x\n",LCDC_BGC1,slcd_reg_read(LCDC_BGC1));
  28. rt_kprintf("LCDC_KEY0:(0x%08x)\t0x%08x\n",LCDC_KEY0, slcd_reg_read(LCDC_KEY0));
  29. rt_kprintf("LCDC_KEY1:(0x%08x)\t0x%08x\n",LCDC_KEY1, slcd_reg_read(LCDC_KEY1));
  30. rt_kprintf("LCDC_ALPHA:(0x%08x)\t0x%08x\n",LCDC_ALPHA, slcd_reg_read(LCDC_ALPHA));
  31. rt_kprintf("==================================\n");
  32. tmp = slcd_reg_read(LCDC_VAT);
  33. rt_kprintf("LCDC_VAT:(0x%08x) \t0x%08x, HT = %d, VT = %d\n",LCDC_VAT, tmp,
  34. (tmp & LCDC_VAT_HT_MASK) >> LCDC_VAT_HT_BIT,
  35. (tmp & LCDC_VAT_VT_MASK) >> LCDC_VAT_VT_BIT);
  36. tmp = slcd_reg_read(LCDC_DAH);
  37. rt_kprintf("LCDC_DAH:(0x%08x) \t0x%08x, HDS = %d, HDE = %d\n",LCDC_DAH, tmp,
  38. (tmp & LCDC_DAH_HDS_MASK) >> LCDC_DAH_HDS_BIT,
  39. (tmp & LCDC_DAH_HDE_MASK) >> LCDC_DAH_HDE_BIT);
  40. tmp = slcd_reg_read(LCDC_DAV);
  41. rt_kprintf("LCDC_DAV:(0x%08x) \t0x%08x, VDS = %d, VDE = %d\n",LCDC_DAV, tmp,
  42. (tmp & LCDC_DAV_VDS_MASK) >> LCDC_DAV_VDS_BIT,
  43. (tmp & LCDC_DAV_VDE_MASK) >> LCDC_DAV_VDE_BIT);
  44. tmp = slcd_reg_read(LCDC_HSYNC);
  45. rt_kprintf("LCDC_HSYNC:(0x%08x)\t0x%08x, HPS = %d, HPE = %d\n",LCDC_HSYNC, tmp,
  46. (tmp & LCDC_HSYNC_HPS_MASK) >> LCDC_HSYNC_HPS_BIT,
  47. (tmp & LCDC_HSYNC_HPE_MASK) >> LCDC_HSYNC_HPE_BIT);
  48. tmp = slcd_reg_read(LCDC_VSYNC);
  49. rt_kprintf("LCDC_VSYNC:(0x%08x)\t0x%08x, VPS = %d, VPE = %d\n", LCDC_VSYNC,tmp,
  50. (tmp & LCDC_VSYNC_VPS_MASK) >> LCDC_VSYNC_VPS_BIT,
  51. (tmp & LCDC_VSYNC_VPE_MASK) >> LCDC_VSYNC_VPE_BIT);
  52. rt_kprintf("==================================\n");
  53. rt_kprintf("LCDC_XYP0:(0x%08x)\t0x%08x\n",LCDC_XYP0, slcd_reg_read(LCDC_XYP0));
  54. rt_kprintf("LCDC_XYP1:(0x%08x)\t0x%08x\n",LCDC_XYP1, slcd_reg_read(LCDC_XYP1));
  55. rt_kprintf("LCDC_SIZE0:(0x%08x)\t0x%08x\n",LCDC_SIZE0, slcd_reg_read(LCDC_SIZE0));
  56. rt_kprintf("LCDC_RGBC:(0x%08x) \t0x%08x\n",LCDC_RGBC, slcd_reg_read(LCDC_RGBC));
  57. rt_kprintf("LCDC_PS:(0x%08x) \t0x%08x\n",LCDC_PS, slcd_reg_read(LCDC_PS));
  58. rt_kprintf("LCDC_CLS:(0x%08x) \t0x%08x\n", LCDC_CLS,slcd_reg_read(LCDC_CLS));
  59. rt_kprintf("LCDC_SPL:(0x%08x) \t0x%08x\n",LCDC_SPL, slcd_reg_read(LCDC_SPL));
  60. rt_kprintf("LCDC_REV:(0x%08x) \t0x%08x\n",LCDC_REV, slcd_reg_read(LCDC_REV));
  61. rt_kprintf("LCDC_IID:(0x%08x) \t0x%08x\n",LCDC_IID, slcd_reg_read(LCDC_IID));
  62. rt_kprintf("==================================\n");
  63. rt_kprintf("LCDC_DA0:(0x%08x) \t0x%08x\n",LCDC_DA0, slcd_reg_read(LCDC_DA0));
  64. rt_kprintf("LCDC_SA0:(0x%08x) \t0x%08x\n",LCDC_SA0, slcd_reg_read(LCDC_SA0));
  65. rt_kprintf("LCDC_FID0:(0x%08x)\t0x%08x\n",LCDC_FID0, slcd_reg_read(LCDC_FID0));
  66. rt_kprintf("LCDC_CMD0:(0x%08x)\t0x%08x\n",LCDC_CMD0, slcd_reg_read(LCDC_CMD0));
  67. rt_kprintf("LCDC_OFFS0:(0x%08x)\t0x%08x\n",LCDC_OFFS0, slcd_reg_read(LCDC_OFFS0));
  68. rt_kprintf("LCDC_PW0:(0x%08x) \t0x%08x\n", LCDC_PW0,slcd_reg_read(LCDC_PW0));
  69. rt_kprintf("LCDC_CNUM0:(0x%08x)\t0x%08x\n",LCDC_CNUM0, slcd_reg_read(LCDC_CNUM0));
  70. rt_kprintf("LCDC_DESSIZE0:(0x%08x)\t0x%08x\n",LCDC_DESSIZE0, slcd_reg_read(LCDC_DESSIZE0));
  71. rt_kprintf("==================================\n");
  72. rt_kprintf("LCDC_PCFG:(0x%08x)\t0x%08x\n", LCDC_PCFG,slcd_reg_read(LCDC_PCFG));
  73. rt_kprintf("==================================\n");
  74. rt_kprintf("SLCDC_CFG:(0x%08x) \t0x%08x\n", SLCDC_CFG,slcd_reg_read(SLCDC_CFG));
  75. rt_kprintf("SLCDC_CTRL:(0x%08x) \t0x%08x\n", SLCDC_CTRL,slcd_reg_read(SLCDC_CTRL));
  76. rt_kprintf("SLCDC_STATE:(0x%08x) \t0x%08x\n", SLCDC_STATE,slcd_reg_read(SLCDC_STATE));
  77. rt_kprintf("SLCDC_DATA:(0x%08x)\t0x%08x\n", SLCDC_DATA,slcd_reg_read(SLCDC_DATA));
  78. rt_kprintf("SLCDC_CFG_NEW:(0x%08x) \t0x%08x\n", SLCDC_CFG_NEW,slcd_reg_read(SLCDC_CFG_NEW));
  79. rt_kprintf("SLCDC_WTIME:(0x%08x) \t0x%08x\n", SLCDC_WTIME,slcd_reg_read(SLCDC_WTIME));
  80. rt_kprintf("SLCDC_TAS:(0x%08x) \t0x%08x\n", SLCDC_TAS,slcd_reg_read(SLCDC_TAS));
  81. rt_kprintf("==================================\n");
  82. rt_kprintf("reg:0x10000020 value=0x%08x (24bit) Clock Gate Register0\n",
  83. *(uint32_t *)0xb0000020);
  84. rt_kprintf("reg:0x100000e4 value=0x%08x (5bit_lcdc 21bit_lcdcs) Power Gate Register: \n",
  85. *(uint32_t *)0xb00000e4);
  86. rt_kprintf("reg:0x100000b8 value=0x%08x (10bit) SRAM Power Control Register0 \n",
  87. *(uint32_t *)0xb00000b8);
  88. rt_kprintf("reg:0x10000064 value=0x%08x Lcd pixclock \n",
  89. *(uint32_t *)0xb0000064);
  90. return 0;
  91. }
  92. MSH_CMD_EXPORT(dump_slcd_regs,dump_slcd_regs);