drv_uart.c 9.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310
  1. /*
  2. * File : drv_uart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009-2013 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2013-05-18 Bernard The first version for LPC40xx
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include <rtdevice.h>
  17. #include "board.h"
  18. #include "drv_uart.h"
  19. struct lpc_uart
  20. {
  21. LPC_USARTn_Type *USART;
  22. IRQn_Type USART_IRQn;
  23. };
  24. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  25. {
  26. // struct lpc_uart *uart;
  27. RT_ASSERT(serial != RT_NULL);
  28. // uart = (struct lpc_uart *)serial->parent.user_data;
  29. // Initialize FIFO for UART0 peripheral
  30. // UART_FIFOConfig(uart->USART, &UARTFIFOConfigStruct);
  31. // UART_TxCmd(uart->USART, ENABLE);
  32. return RT_EOK;
  33. }
  34. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  35. {
  36. struct lpc_uart *uart;
  37. RT_ASSERT(serial != RT_NULL);
  38. uart = (struct lpc_uart *)serial->parent.user_data;
  39. switch (cmd)
  40. {
  41. case RT_DEVICE_CTRL_CLR_INT:
  42. /* disable rx irq */
  43. uart->USART->IER &= ~UART_IER_RBRINT_EN;
  44. break;
  45. case RT_DEVICE_CTRL_SET_INT:
  46. /* enable rx irq */
  47. uart->USART->IER |= UART_IER_RBRINT_EN;
  48. break;
  49. }
  50. return RT_EOK;
  51. }
  52. static int lpc_putc(struct rt_serial_device *serial, char c)
  53. {
  54. struct lpc_uart *uart;
  55. uart = (struct lpc_uart *)serial->parent.user_data;
  56. while (!(uart->USART->LSR & 0x20));
  57. uart->USART->THR = c;
  58. return 1;
  59. }
  60. static int lpc_getc(struct rt_serial_device *serial)
  61. {
  62. struct lpc_uart *uart;
  63. uart = (struct lpc_uart *)serial->parent.user_data;
  64. if (uart->USART->LSR & 0x01)
  65. {
  66. return (uart->USART->RBR);
  67. }
  68. return -1;
  69. }
  70. static const struct rt_uart_ops lpc_uart_ops =
  71. {
  72. lpc_configure,
  73. lpc_control,
  74. lpc_putc,
  75. lpc_getc,
  76. };
  77. #if defined(RT_USING_UART0)
  78. /* UART0 device driver structure */
  79. struct lpc_uart uart0 =
  80. {
  81. LPC_USART0,
  82. USART0_IRQn,
  83. };
  84. struct rt_serial_device serial0;
  85. void UART0_IRQHandler(void)
  86. {
  87. struct lpc_uart *uart;
  88. volatile uint32_t intsrc, temp;
  89. uart = &uart0;
  90. /* enter interrupt */
  91. rt_interrupt_enter();
  92. /* Determine the interrupt source */
  93. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  94. switch (intsrc)
  95. {
  96. case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
  97. /* read the line status */
  98. intsrc = uart->USART->LSR;
  99. /* Receive an error data */
  100. if (intsrc & UART_LSR_PE)
  101. {
  102. temp = LPC_USART0->RBR;
  103. }
  104. break;
  105. case UART_IIR_INTID_RDA: /* Receive data */
  106. case UART_IIR_INTID_CTI: /* Receive data timeout */
  107. /* read the data to buffer */
  108. while (uart->USART->LSR & UART_LSR_RDR)
  109. {
  110. rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
  111. }
  112. break;
  113. default:
  114. break;
  115. }
  116. /* leave interrupt */
  117. rt_interrupt_leave();
  118. }
  119. #endif
  120. #if defined(RT_USING_UART2)
  121. /* UART2 device driver structure */
  122. struct lpc_uart uart2 =
  123. {
  124. LPC_USART2,
  125. USART2_IRQn,
  126. };
  127. struct rt_serial_device serial2;
  128. void UART2_IRQHandler(void)
  129. {
  130. struct lpc_uart *uart;
  131. uint32_t intsrc, temp;
  132. uart = &uart2;
  133. /* enter interrupt */
  134. rt_interrupt_enter();
  135. /* Determine the interrupt source */
  136. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  137. switch (intsrc)
  138. {
  139. case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
  140. /* read the line status */
  141. intsrc = uart->USART->LSR;
  142. /* Receive an error data */
  143. if (intsrc & UART_LSR_PE)
  144. {
  145. temp = LPC_USART0->RBR;
  146. }
  147. break;
  148. case UART_IIR_INTID_RDA: /* Receive data */
  149. case UART_IIR_INTID_CTI: /* Receive data timeout */
  150. /* read the data to buffer */
  151. while (uart->USART->LSR & UART_LSR_RDR)
  152. {
  153. rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
  154. }
  155. break;
  156. default:
  157. break;
  158. }
  159. /* leave interrupt */
  160. rt_interrupt_leave();
  161. }
  162. #endif
  163. void rt_hw_uart_init(void)
  164. {
  165. struct lpc_uart *uart;
  166. struct serial_configure config;
  167. #ifdef RT_USING_UART0
  168. uart = &uart0;
  169. config.baud_rate = BAUD_RATE_115200;
  170. config.bit_order = BIT_ORDER_LSB;
  171. config.data_bits = DATA_BITS_8;
  172. config.parity = PARITY_NONE;
  173. config.stop_bits = STOP_BITS_1;
  174. config.invert = NRZ_NORMAL;
  175. config.bufsz = RT_SERIAL_RB_BUFSZ;
  176. serial0.ops = &lpc_uart_ops;
  177. serial0.config = config;
  178. /* Enable GPIO register interface clock */
  179. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  180. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  181. /* Enable USART1 peripheral clock */
  182. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  183. while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
  184. /* Enable USART1 register interface clock */
  185. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  186. while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
  187. /* Init GPIO pins */
  188. LPC_SCU->SFSP6_4 = (1 << 6) | /* Input buffer enabled */
  189. (1 << 4) | /* Pull-up disabled */
  190. (2 << 0) ; /* Pin P6_4 used as U0_TXD */
  191. LPC_SCU->SFSP6_5 = (1 << 6) | /* Input buffer enabled */
  192. (1 << 4) | /* Pull-up disabled */
  193. (2 << 0) ; /* Pin P6_5 used as U0_RXD */
  194. /* Init USART0 */
  195. LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  196. LPC_USART0->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  197. LPC_USART0->DLM = 0x00;
  198. LPC_USART0->FDR = 0xC1;
  199. LPC_USART0->LCR = 0x03; /* DLAB = 0 */
  200. /* preemption = 1, sub-priority = 1 */
  201. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  202. /* Enable Interrupt for UART channel */
  203. NVIC_EnableIRQ(uart->USART_IRQn);
  204. /* register UART1 device */
  205. rt_hw_serial_register(&serial0, "uart0",
  206. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  207. uart);
  208. #endif
  209. #ifdef RT_USING_UART2
  210. uart = &uart2;
  211. config.baud_rate = BAUD_RATE_115200;
  212. config.bit_order = BIT_ORDER_LSB;
  213. config.data_bits = DATA_BITS_8;
  214. config.parity = PARITY_NONE;
  215. config.stop_bits = STOP_BITS_1;
  216. config.invert = NRZ_NORMAL;
  217. config.bufsz = RT_SERIAL_RB_BUFSZ;
  218. serial2.ops = &lpc_uart_ops;
  219. serial2.config = config;
  220. /* Enable GPIO register interface clock */
  221. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  222. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  223. /* Enable USART1 peripheral clock */
  224. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  225. while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
  226. /* Enable USART2 register interface clock */
  227. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  228. while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
  229. /* Init GPIO pins */
  230. LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
  231. (1 << 4) | /* Pull-up disabled */
  232. (1 << 0) ; /* Pin P1_15 used as U2_TXD */
  233. LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
  234. (1 << 4) | /* Pull-up disabled */
  235. (1 << 0) ; /* Pin P1_16 used as U2_RXD */
  236. /* Init USART2 */
  237. LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  238. LPC_USART2->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  239. LPC_USART2->DLM = 0x00;
  240. LPC_USART2->FDR = 0xC1;
  241. LPC_USART2->LCR = 0x03; /* DLAB = 0 */
  242. /* preemption = 1, sub-priority = 1 */
  243. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  244. /* Enable Interrupt for UART channel */
  245. NVIC_EnableIRQ(uart->USART_IRQn);
  246. /* register UART1 device */
  247. rt_hw_serial_register(&serial2, "uart2",
  248. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  249. uart);
  250. #endif
  251. }