usart.c 18 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-01-05 Bernard the first version
  9. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  10. * 2013-05-13 aozima update for kehong-lingtai.
  11. * 2015-01-31 armink make sure the serial transmit complete in putc()
  12. * 2016-05-13 armink add DMA Rx mode
  13. * 2017-01-19 aubr.cool add interrupt Tx mode
  14. * 2017-04-13 aubr.cool correct Rx parity err
  15. */
  16. #include "stm32f10x.h"
  17. #include "usart.h"
  18. #include "board.h"
  19. #include <rtdevice.h>
  20. /* USART1 */
  21. #define UART1_GPIO_TX GPIO_Pin_9
  22. #define UART1_GPIO_RX GPIO_Pin_10
  23. #define UART1_GPIO GPIOA
  24. /* USART2 */
  25. #define UART2_GPIO_TX GPIO_Pin_2
  26. #define UART2_GPIO_RX GPIO_Pin_3
  27. #define UART2_GPIO GPIOA
  28. /* USART3_REMAP[1:0] = 00 */
  29. #define UART3_GPIO_TX GPIO_Pin_10
  30. #define UART3_GPIO_RX GPIO_Pin_11
  31. #define UART3_GPIO GPIOB
  32. /* USART4 */
  33. #define UART4_GPIO_TX GPIO_Pin_10
  34. #define UART4_GPIO_RX GPIO_Pin_11
  35. #define UART4_GPIO GPIOC
  36. /* STM32 uart driver */
  37. struct stm32_uart
  38. {
  39. USART_TypeDef *uart_device;
  40. IRQn_Type irq;
  41. #ifdef RT_SERIAL_USING_DMA
  42. struct stm32_uart_dma
  43. {
  44. /* dma channel */
  45. DMA_Channel_TypeDef *rx_ch;
  46. /* dma global flag */
  47. uint32_t rx_gl_flag;
  48. /* dma irq channel */
  49. uint8_t rx_irq_ch;
  50. /* setting receive len */
  51. rt_size_t setting_recv_len;
  52. /* last receive index */
  53. rt_size_t last_recv_index;
  54. } dma;
  55. #endif /* RT_SERIAL_USING_DMA */
  56. };
  57. #ifdef RT_SERIAL_USING_DMA
  58. static void DMA_Configuration(struct rt_serial_device *serial);
  59. #endif /* RT_SERIAL_USING_DMA */
  60. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  61. {
  62. struct stm32_uart* uart;
  63. USART_InitTypeDef USART_InitStructure;
  64. RT_ASSERT(serial != RT_NULL);
  65. RT_ASSERT(cfg != RT_NULL);
  66. uart = (struct stm32_uart *)serial->parent.user_data;
  67. USART_InitStructure.USART_BaudRate = cfg->baud_rate;
  68. if (cfg->data_bits == DATA_BITS_8){
  69. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  70. } else if (cfg->data_bits == DATA_BITS_9) {
  71. USART_InitStructure.USART_WordLength = USART_WordLength_9b;
  72. }
  73. if (cfg->stop_bits == STOP_BITS_1){
  74. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  75. } else if (cfg->stop_bits == STOP_BITS_2){
  76. USART_InitStructure.USART_StopBits = USART_StopBits_2;
  77. }
  78. if (cfg->parity == PARITY_NONE){
  79. USART_InitStructure.USART_Parity = USART_Parity_No;
  80. } else if (cfg->parity == PARITY_ODD) {
  81. USART_InitStructure.USART_Parity = USART_Parity_Odd;
  82. } else if (cfg->parity == PARITY_EVEN) {
  83. USART_InitStructure.USART_Parity = USART_Parity_Even;
  84. }
  85. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  86. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  87. USART_Init(uart->uart_device, &USART_InitStructure);
  88. /* Enable USART */
  89. USART_Cmd(uart->uart_device, ENABLE);
  90. return RT_EOK;
  91. }
  92. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  93. {
  94. struct stm32_uart* uart;
  95. RT_ASSERT(serial != RT_NULL);
  96. uart = (struct stm32_uart *)serial->parent.user_data;
  97. switch (cmd)
  98. {
  99. /* disable interrupt */
  100. case RT_DEVICE_CTRL_CLR_INT:
  101. /* disable rx irq */
  102. UART_DISABLE_IRQ(uart->irq);
  103. /* disable interrupt */
  104. USART_ITConfig(uart->uart_device, USART_IT_RXNE, DISABLE);
  105. break;
  106. /* enable interrupt */
  107. case RT_DEVICE_CTRL_SET_INT:
  108. /* enable rx irq */
  109. UART_ENABLE_IRQ(uart->irq);
  110. /* enable interrupt */
  111. USART_ITConfig(uart->uart_device, USART_IT_RXNE, ENABLE);
  112. break;
  113. #ifdef RT_SERIAL_USING_DMA
  114. /* USART config */
  115. case RT_DEVICE_CTRL_CONFIG :
  116. if ((rt_uint32_t)(arg) == RT_DEVICE_FLAG_DMA_RX) {
  117. DMA_Configuration(serial);
  118. }
  119. break;
  120. #endif /* RT_SERIAL_USING_DMA */
  121. }
  122. return RT_EOK;
  123. }
  124. static int stm32_putc(struct rt_serial_device *serial, char c)
  125. {
  126. struct stm32_uart* uart;
  127. RT_ASSERT(serial != RT_NULL);
  128. uart = (struct stm32_uart *)serial->parent.user_data;
  129. if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
  130. {
  131. if (!(uart->uart_device->SR & USART_FLAG_TXE))
  132. {
  133. USART_ITConfig(uart->uart_device, USART_IT_TC, ENABLE);
  134. return -1;
  135. }
  136. uart->uart_device->DR = c;
  137. USART_ITConfig(uart->uart_device, USART_IT_TC, ENABLE);
  138. }
  139. else
  140. {
  141. USART_ClearFlag(uart->uart_device,USART_FLAG_TC);
  142. uart->uart_device->DR = c;
  143. while (!(uart->uart_device->SR & USART_FLAG_TC));
  144. }
  145. return 1;
  146. }
  147. static int stm32_getc(struct rt_serial_device *serial)
  148. {
  149. int ch;
  150. struct stm32_uart* uart;
  151. RT_ASSERT(serial != RT_NULL);
  152. uart = (struct stm32_uart *)serial->parent.user_data;
  153. ch = -1;
  154. if (uart->uart_device->SR & USART_FLAG_RXNE)
  155. {
  156. ch = uart->uart_device->DR & 0xff;
  157. }
  158. return ch;
  159. }
  160. #ifdef RT_SERIAL_USING_DMA
  161. /**
  162. * Serial port receive idle process. This need add to uart idle ISR.
  163. *
  164. * @param serial serial device
  165. */
  166. static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) {
  167. struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
  168. rt_size_t recv_total_index, recv_len;
  169. rt_base_t level;
  170. /* disable interrupt */
  171. level = rt_hw_interrupt_disable();
  172. recv_total_index = uart->dma.setting_recv_len - DMA_GetCurrDataCounter(uart->dma.rx_ch);
  173. recv_len = recv_total_index - uart->dma.last_recv_index;
  174. uart->dma.last_recv_index = recv_total_index;
  175. /* enable interrupt */
  176. rt_hw_interrupt_enable(level);
  177. if (recv_len) rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  178. /* read a data for clear receive idle interrupt flag */
  179. USART_ReceiveData(uart->uart_device);
  180. DMA_ClearFlag(uart->dma.rx_gl_flag);
  181. }
  182. /**
  183. * DMA receive done process. This need add to DMA receive done ISR.
  184. *
  185. * @param serial serial device
  186. */
  187. static void dma_rx_done_isr(struct rt_serial_device *serial) {
  188. struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
  189. rt_size_t recv_len;
  190. rt_base_t level;
  191. /* disable interrupt */
  192. level = rt_hw_interrupt_disable();
  193. recv_len = uart->dma.setting_recv_len - uart->dma.last_recv_index;
  194. /* reset last recv index */
  195. uart->dma.last_recv_index = 0;
  196. /* enable interrupt */
  197. rt_hw_interrupt_enable(level);
  198. if (recv_len) rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  199. DMA_ClearFlag(uart->dma.rx_gl_flag);
  200. }
  201. #endif /* RT_SERIAL_USING_DMA */
  202. /**
  203. * Uart common interrupt process. This need add to uart ISR.
  204. *
  205. * @param serial serial device
  206. */
  207. static void uart_isr(struct rt_serial_device *serial) {
  208. struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
  209. RT_ASSERT(uart != RT_NULL);
  210. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  211. {
  212. if(USART_GetFlagStatus(uart->uart_device, USART_FLAG_PE) == RESET)
  213. {
  214. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  215. }
  216. /* clear interrupt */
  217. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  218. }
  219. #ifdef RT_SERIAL_USING_DMA
  220. if(USART_GetITStatus(uart->uart_device, USART_IT_IDLE) != RESET)
  221. {
  222. dma_uart_rx_idle_isr(serial);
  223. }
  224. #endif /* RT_SERIAL_USING_DMA */
  225. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  226. {
  227. /* clear interrupt */
  228. if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
  229. {
  230. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
  231. }
  232. USART_ITConfig(uart->uart_device, USART_IT_TC, DISABLE);
  233. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  234. }
  235. if (USART_GetFlagStatus(uart->uart_device, USART_FLAG_ORE) == SET)
  236. {
  237. USART_ReceiveData(uart->uart_device);
  238. }
  239. }
  240. static const struct rt_uart_ops stm32_uart_ops =
  241. {
  242. stm32_configure,
  243. stm32_control,
  244. stm32_putc,
  245. stm32_getc,
  246. };
  247. #if defined(RT_USING_UART1)
  248. /* UART1 device driver structure */
  249. struct stm32_uart uart1 =
  250. {
  251. USART1,
  252. USART1_IRQn,
  253. #ifdef RT_SERIAL_USING_DMA
  254. {
  255. DMA1_Channel5,
  256. DMA1_FLAG_GL5,
  257. DMA1_Channel5_IRQn,
  258. 0,
  259. },
  260. #endif /* RT_SERIAL_USING_DMA */
  261. };
  262. struct rt_serial_device serial1;
  263. void USART1_IRQHandler(void)
  264. {
  265. /* enter interrupt */
  266. rt_interrupt_enter();
  267. uart_isr(&serial1);
  268. /* leave interrupt */
  269. rt_interrupt_leave();
  270. }
  271. #ifdef RT_SERIAL_USING_DMA
  272. void DMA1_Channel5_IRQHandler(void) {
  273. /* enter interrupt */
  274. rt_interrupt_enter();
  275. dma_rx_done_isr(&serial1);
  276. /* leave interrupt */
  277. rt_interrupt_leave();
  278. }
  279. #endif /* RT_SERIAL_USING_DMA */
  280. #endif /* RT_USING_UART1 */
  281. #if defined(RT_USING_UART2)
  282. /* UART2 device driver structure */
  283. struct stm32_uart uart2 =
  284. {
  285. USART2,
  286. USART2_IRQn,
  287. #ifdef RT_SERIAL_USING_DMA
  288. {
  289. DMA1_Channel6,
  290. DMA1_FLAG_GL6,
  291. DMA1_Channel6_IRQn,
  292. 0,
  293. },
  294. #endif /* RT_SERIAL_USING_DMA */
  295. };
  296. struct rt_serial_device serial2;
  297. void USART2_IRQHandler(void)
  298. {
  299. /* enter interrupt */
  300. rt_interrupt_enter();
  301. uart_isr(&serial2);
  302. /* leave interrupt */
  303. rt_interrupt_leave();
  304. }
  305. #ifdef RT_SERIAL_USING_DMA
  306. void DMA1_Channel6_IRQHandler(void) {
  307. /* enter interrupt */
  308. rt_interrupt_enter();
  309. dma_rx_done_isr(&serial2);
  310. /* leave interrupt */
  311. rt_interrupt_leave();
  312. }
  313. #endif /* RT_SERIAL_USING_DMA */
  314. #endif /* RT_USING_UART2 */
  315. #if defined(RT_USING_UART3)
  316. /* UART3 device driver structure */
  317. struct stm32_uart uart3 =
  318. {
  319. USART3,
  320. USART3_IRQn,
  321. #ifdef RT_SERIAL_USING_DMA
  322. {
  323. DMA1_Channel3,
  324. DMA1_FLAG_GL3,
  325. DMA1_Channel3_IRQn,
  326. 0,
  327. },
  328. #endif /* RT_SERIAL_USING_DMA */
  329. };
  330. struct rt_serial_device serial3;
  331. void USART3_IRQHandler(void)
  332. {
  333. /* enter interrupt */
  334. rt_interrupt_enter();
  335. uart_isr(&serial3);
  336. /* leave interrupt */
  337. rt_interrupt_leave();
  338. }
  339. #ifdef RT_SERIAL_USING_DMA
  340. void DMA1_Channel3_IRQHandler(void) {
  341. /* enter interrupt */
  342. rt_interrupt_enter();
  343. dma_rx_done_isr(&serial3);
  344. /* leave interrupt */
  345. rt_interrupt_leave();
  346. }
  347. #endif /* RT_SERIAL_USING_DMA */
  348. #endif /* RT_USING_UART3 */
  349. #if defined(RT_USING_UART4)
  350. /* UART4 device driver structure */
  351. struct stm32_uart uart4 =
  352. {
  353. UART4,
  354. UART4_IRQn,
  355. #ifdef RT_SERIAL_USING_DMA
  356. {
  357. DMA2_Channel3,
  358. DMA2_FLAG_GL3,
  359. DMA2_Channel3_IRQn,
  360. 0,
  361. },
  362. #endif /* RT_SERIAL_USING_DMA */
  363. };
  364. struct rt_serial_device serial4;
  365. void UART4_IRQHandler(void)
  366. {
  367. /* enter interrupt */
  368. rt_interrupt_enter();
  369. uart_isr(&serial4);
  370. /* leave interrupt */
  371. rt_interrupt_leave();
  372. }
  373. #ifdef RT_SERIAL_USING_DMA
  374. void DMA2_Channel3_IRQHandler(void) {
  375. /* enter interrupt */
  376. rt_interrupt_enter();
  377. dma_rx_done_isr(&serial4);
  378. /* leave interrupt */
  379. rt_interrupt_leave();
  380. }
  381. #endif /* RT_SERIAL_USING_DMA */
  382. #endif /* RT_USING_UART4 */
  383. static void RCC_Configuration(void)
  384. {
  385. #if defined(RT_USING_UART1)
  386. /* Enable UART GPIO clocks */
  387. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
  388. /* Enable UART clock */
  389. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
  390. #endif /* RT_USING_UART1 */
  391. #if defined(RT_USING_UART2)
  392. /* Enable UART GPIO clocks */
  393. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
  394. /* Enable UART clock */
  395. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  396. #endif /* RT_USING_UART2 */
  397. #if defined(RT_USING_UART3)
  398. /* Enable UART GPIO clocks */
  399. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB | RCC_APB2Periph_AFIO, ENABLE);
  400. /* Enable UART clock */
  401. RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
  402. #endif /* RT_USING_UART3 */
  403. #if defined(RT_USING_UART4)
  404. /* Enable UART GPIO clocks */
  405. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC | RCC_APB2Periph_AFIO, ENABLE);
  406. /* Enable UART clock */
  407. RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
  408. #endif /* RT_USING_UART4 */
  409. }
  410. static void GPIO_Configuration(void)
  411. {
  412. GPIO_InitTypeDef GPIO_InitStructure;
  413. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  414. #if defined(RT_USING_UART1)
  415. /* Configure USART Rx/tx PIN */
  416. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  417. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_RX;
  418. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  419. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  420. GPIO_InitStructure.GPIO_Pin = UART1_GPIO_TX;
  421. GPIO_Init(UART1_GPIO, &GPIO_InitStructure);
  422. #endif /* RT_USING_UART1 */
  423. #if defined(RT_USING_UART2)
  424. /* Configure USART Rx/tx PIN */
  425. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  426. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_RX;
  427. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  428. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  429. GPIO_InitStructure.GPIO_Pin = UART2_GPIO_TX;
  430. GPIO_Init(UART2_GPIO, &GPIO_InitStructure);
  431. #endif /* RT_USING_UART2 */
  432. #if defined(RT_USING_UART3)
  433. /* Configure USART Rx/tx PIN */
  434. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  435. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_RX;
  436. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  437. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  438. GPIO_InitStructure.GPIO_Pin = UART3_GPIO_TX;
  439. GPIO_Init(UART3_GPIO, &GPIO_InitStructure);
  440. #endif /* RT_USING_UART3 */
  441. #if defined(RT_USING_UART4)
  442. /* Configure USART Rx/tx PIN */
  443. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  444. GPIO_InitStructure.GPIO_Pin = UART4_GPIO_RX;
  445. GPIO_Init(UART4_GPIO, &GPIO_InitStructure);
  446. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  447. GPIO_InitStructure.GPIO_Pin = UART4_GPIO_TX;
  448. GPIO_Init(UART4_GPIO, &GPIO_InitStructure);
  449. #endif /* RT_USING_UART4 */
  450. }
  451. static void NVIC_Configuration(struct stm32_uart* uart)
  452. {
  453. NVIC_InitTypeDef NVIC_InitStructure;
  454. /* Enable the USART1 Interrupt */
  455. NVIC_InitStructure.NVIC_IRQChannel = uart->irq;
  456. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  457. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
  458. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  459. NVIC_Init(&NVIC_InitStructure);
  460. }
  461. #ifdef RT_SERIAL_USING_DMA
  462. static void DMA_Configuration(struct rt_serial_device *serial) {
  463. struct stm32_uart *uart = (struct stm32_uart *) serial->parent.user_data;
  464. struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  465. DMA_InitTypeDef DMA_InitStructure;
  466. NVIC_InitTypeDef NVIC_InitStructure;
  467. uart->dma.setting_recv_len = serial->config.bufsz;
  468. /* enable transmit idle interrupt */
  469. USART_ITConfig(uart->uart_device, USART_IT_IDLE , ENABLE);
  470. /* DMA clock enable */
  471. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  472. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA2, ENABLE);
  473. /* rx dma config */
  474. DMA_DeInit(uart->dma.rx_ch);
  475. DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&(uart->uart_device->DR);
  476. DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) rx_fifo->buffer;
  477. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
  478. DMA_InitStructure.DMA_BufferSize = serial->config.bufsz;
  479. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  480. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  481. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  482. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  483. DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
  484. DMA_InitStructure.DMA_Priority = DMA_Priority_High;
  485. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  486. DMA_Init(uart->dma.rx_ch, &DMA_InitStructure);
  487. DMA_ClearFlag(uart->dma.rx_gl_flag);
  488. DMA_ITConfig(uart->dma.rx_ch, DMA_IT_TC, ENABLE);
  489. USART_DMACmd(uart->uart_device, USART_DMAReq_Rx, ENABLE);
  490. DMA_Cmd(uart->dma.rx_ch, ENABLE);
  491. /* rx dma interrupt config */
  492. NVIC_InitStructure.NVIC_IRQChannel = uart->dma.rx_irq_ch;
  493. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  494. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  495. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  496. NVIC_Init(&NVIC_InitStructure);
  497. }
  498. #endif /* RT_SERIAL_USING_DMA */
  499. void rt_hw_usart_init(void)
  500. {
  501. struct stm32_uart* uart;
  502. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  503. RCC_Configuration();
  504. GPIO_Configuration();
  505. #if defined(RT_USING_UART1)
  506. uart = &uart1;
  507. config.baud_rate = BAUD_RATE_115200;
  508. serial1.ops = &stm32_uart_ops;
  509. serial1.config = config;
  510. NVIC_Configuration(uart);
  511. /* register UART1 device */
  512. rt_hw_serial_register(&serial1, "uart1",
  513. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  514. RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
  515. uart);
  516. #endif /* RT_USING_UART1 */
  517. #if defined(RT_USING_UART2)
  518. uart = &uart2;
  519. config.baud_rate = BAUD_RATE_115200;
  520. serial2.ops = &stm32_uart_ops;
  521. serial2.config = config;
  522. NVIC_Configuration(uart);
  523. /* register UART2 device */
  524. rt_hw_serial_register(&serial2, "uart2",
  525. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  526. RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
  527. uart);
  528. #endif /* RT_USING_UART2 */
  529. #if defined(RT_USING_UART3)
  530. uart = &uart3;
  531. config.baud_rate = BAUD_RATE_115200;
  532. serial3.ops = &stm32_uart_ops;
  533. serial3.config = config;
  534. NVIC_Configuration(uart);
  535. /* register UART3 device */
  536. rt_hw_serial_register(&serial3, "uart3",
  537. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  538. RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
  539. uart);
  540. #endif /* RT_USING_UART3 */
  541. #if defined(RT_USING_UART4)
  542. uart = &uart4;
  543. config.baud_rate = BAUD_RATE_115200;
  544. serial4.ops = &stm32_uart_ops;
  545. serial4.config = config;
  546. NVIC_Configuration(uart);
  547. /* register UART4 device */
  548. rt_hw_serial_register(&serial4, "uart4",
  549. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
  550. RT_DEVICE_FLAG_INT_TX | RT_DEVICE_FLAG_DMA_RX,
  551. uart);
  552. #endif /* RT_USING_UART4 */
  553. }