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context_rvds.S 4.5 KB

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  1. ;/*
  2. ; * File : context_rvds.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2009-01-17 Bernard first version
  13. ; * 2010-02-04 Magicoe Edit for LPC17xx Series
  14. ; */
  15. ;/**
  16. ; * @addtogroup LPC17
  17. ; */
  18. ;/*@{*/
  19. NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
  20. NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
  21. NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
  22. NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
  23. AREA |.text|, CODE, READONLY, ALIGN=2
  24. THUMB
  25. REQUIRE8
  26. PRESERVE8
  27. IMPORT rt_thread_switch_interrupt_flag
  28. IMPORT rt_interrupt_from_thread
  29. IMPORT rt_interrupt_to_thread
  30. IMPORT rt_hw_hard_fault_exception
  31. ;/*
  32. ; * rt_base_t rt_hw_interrupt_disable();
  33. ; */
  34. rt_hw_interrupt_disable PROC
  35. EXPORT rt_hw_interrupt_disable
  36. MRS r0, PRIMASK
  37. CPSID I
  38. BX LR
  39. ENDP
  40. ;/*
  41. ; * void rt_hw_interrupt_enable(rt_base_t level);
  42. ; */
  43. rt_hw_interrupt_enable PROC
  44. EXPORT rt_hw_interrupt_enable
  45. MSR PRIMASK, r0
  46. BX LR
  47. ENDP
  48. ;/*
  49. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  50. ; * r0 --> from
  51. ; * r1 --> to
  52. ; */
  53. rt_hw_context_switch_interrupt
  54. EXPORT rt_hw_context_switch_interrupt
  55. rt_hw_context_switch PROC
  56. EXPORT rt_hw_context_switch
  57. ; set rt_thread_switch_interrupt_flag to 1
  58. LDR r2, =rt_thread_switch_interrupt_flag
  59. LDR r3, [r2]
  60. CMP r3, #1
  61. BEQ _reswitch
  62. MOV r3, #1
  63. STR r3, [r2]
  64. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  65. STR r0, [r2]
  66. _reswitch
  67. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  68. STR r1, [r2]
  69. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  70. LDR r1, =NVIC_PENDSVSET
  71. STR r1, [r0]
  72. BX LR
  73. ENDP
  74. ; r0 --> swith from thread stack
  75. ; r1 --> swith to thread stack
  76. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  77. PendSV_Handler PROC
  78. EXPORT PendSV_Handler
  79. ; disable interrupt to protect context switch
  80. MRS r2, PRIMASK
  81. CPSID I
  82. ; get rt_thread_switch_interrupt_flag
  83. LDR r0, =rt_thread_switch_interrupt_flag
  84. LDR r1, [r0]
  85. CBZ r1, pendsv_exit ; pendsv already handled
  86. ; clear rt_thread_switch_interrupt_flag to 0
  87. MOV r1, #0x00
  88. STR r1, [r0]
  89. LDR r0, =rt_interrupt_from_thread
  90. LDR r1, [r0]
  91. CBZ r1, swtich_to_thread ; skip register save at the first time
  92. MRS r1, psp ; get from thread stack pointer
  93. STMFD r1!, {r4 - r11} ; push r4 - r11 register
  94. LDR r0, [r0]
  95. STR r1, [r0] ; update from thread stack pointer
  96. swtich_to_thread
  97. LDR r1, =rt_interrupt_to_thread
  98. LDR r1, [r1]
  99. LDR r1, [r1] ; load thread stack pointer
  100. LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
  101. MSR psp, r1 ; update stack pointer
  102. pendsv_exit
  103. ; restore interrupt
  104. MSR PRIMASK, r2
  105. ORR lr, lr, #0x04
  106. BX lr
  107. ENDP
  108. ;/*
  109. ; * void rt_hw_context_switch_to(rt_uint32 to);
  110. ; * r0 --> to
  111. ; * this fucntion is used to perform the first thread switch
  112. ; */
  113. rt_hw_context_switch_to PROC
  114. EXPORT rt_hw_context_switch_to
  115. ; set to thread
  116. LDR r1, =rt_interrupt_to_thread
  117. STR r0, [r1]
  118. ; set from thread to 0
  119. LDR r1, =rt_interrupt_from_thread
  120. MOV r0, #0x0
  121. STR r0, [r1]
  122. ; set interrupt flag to 1
  123. LDR r1, =rt_thread_switch_interrupt_flag
  124. MOV r0, #1
  125. STR r0, [r1]
  126. ; set the PendSV exception priority
  127. LDR r0, =NVIC_SYSPRI2
  128. LDR r1, =NVIC_PENDSV_PRI
  129. LDR.W R2, [r0,#0x00] ; read
  130. ORR r1,r1,r2 ; modify
  131. STR r1, [r0] ; write-bak
  132. ; trigger the PendSV exception (causes context switch)
  133. LDR r0, =NVIC_INT_CTRL
  134. LDR r1, =NVIC_PENDSVSET
  135. STR r1, [r0]
  136. ; enable interrupts at processor level
  137. CPSIE I
  138. ; never reach here!
  139. ENDP
  140. ; compatible with old version
  141. rt_hw_interrupt_thread_switch PROC
  142. EXPORT rt_hw_interrupt_thread_switch
  143. BX lr
  144. NOP
  145. ENDP
  146. HardFault_Handler PROC
  147. EXPORT HardFault_Handler
  148. ; get current context
  149. MRS r0, psp ; get fault thread stack pointer
  150. PUSH {lr}
  151. BL rt_hw_hard_fault_exception
  152. POP {lr}
  153. ORR lr, lr, #0x04
  154. BX lr
  155. ENDP
  156. END