em_rtc.c 12 KB

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  1. /***************************************************************************//**
  2. * @file
  3. * @brief Real Time Counter (RTC) Peripheral API
  4. * @author Energy Micro AS
  5. * @version 3.0.0
  6. *******************************************************************************
  7. * @section License
  8. * <b>(C) Copyright 2012 Energy Micro AS, http://www.energymicro.com</b>
  9. *******************************************************************************
  10. *
  11. * Permission is granted to anyone to use this software for any purpose,
  12. * including commercial applications, and to alter it and redistribute it
  13. * freely, subject to the following restrictions:
  14. *
  15. * 1. The origin of this software must not be misrepresented; you must not
  16. * claim that you wrote the original software.
  17. * 2. Altered source versions must be plainly marked as such, and must not be
  18. * misrepresented as being the original software.
  19. * 3. This notice may not be removed or altered from any source distribution.
  20. *
  21. * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
  22. * obligation to support this Software. Energy Micro AS is providing the
  23. * Software "AS IS", with no express or implied warranties of any kind,
  24. * including, but not limited to, any implied warranties of merchantability
  25. * or fitness for any particular purpose or warranties against infringement
  26. * of any proprietary rights of a third party.
  27. *
  28. * Energy Micro AS will not be liable for any consequential, incidental, or
  29. * special damages, or any other relief, or for any claim by any third party,
  30. * arising from your use of this Software.
  31. *
  32. ******************************************************************************/
  33. #include "em_rtc.h"
  34. #include "em_assert.h"
  35. #include "em_bitband.h"
  36. /***************************************************************************//**
  37. * @addtogroup EM_Library
  38. * @{
  39. ******************************************************************************/
  40. /***************************************************************************//**
  41. * @addtogroup RTC
  42. * @brief Real Time Counter (RTC) Peripheral API
  43. * @{
  44. ******************************************************************************/
  45. /*******************************************************************************
  46. ******************************* DEFINES ***********************************
  47. ******************************************************************************/
  48. /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
  49. /** Validation of valid comparator register for assert statements. */
  50. #define RTC_COMP_REG_VALID(reg) (((reg) <= 1))
  51. /** @endcond */
  52. /*******************************************************************************
  53. ************************** LOCAL FUNCTIONS ********************************
  54. ******************************************************************************/
  55. /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
  56. #if defined(_EFM32_GECKO_FAMILY)
  57. /***************************************************************************//**
  58. * @brief
  59. * Wait for ongoing sync of register(s) to low frequency domain to complete.
  60. *
  61. * @note
  62. * This only applies to the Gecko Family, see the reference manual
  63. * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
  64. * for details. For Tiny Gecko and Giant Gecko, the RTC supports immediate
  65. * updates of registers, and will automatically hold the bus until the
  66. * register has been updated.
  67. *
  68. * @param[in] mask
  69. * Bitmask corresponding to SYNCBUSY register defined bits, indicating
  70. * registers that must complete any ongoing synchronization.
  71. ******************************************************************************/
  72. __STATIC_INLINE void RTC_Sync(uint32_t mask)
  73. {
  74. /* Avoid deadlock if modifying the same register twice when freeze mode is */
  75. /* activated. */
  76. if (RTC->FREEZE & RTC_FREEZE_REGFREEZE)
  77. return;
  78. /* Wait for any pending previous write operation to have been completed */
  79. /* in low frequency domain. This is only required for the Gecko Family */
  80. while (RTC->SYNCBUSY & mask)
  81. ;
  82. }
  83. #endif
  84. /** @endcond */
  85. /*******************************************************************************
  86. ************************** GLOBAL FUNCTIONS *******************************
  87. ******************************************************************************/
  88. /***************************************************************************//**
  89. * @brief
  90. * Get RTC compare register value.
  91. *
  92. * @param[in] comp
  93. * Compare register to get, either 0 or 1
  94. *
  95. * @return
  96. * Compare register value, 0 if invalid register selected.
  97. ******************************************************************************/
  98. uint32_t RTC_CompareGet(unsigned int comp)
  99. {
  100. uint32_t ret;
  101. EFM_ASSERT(RTC_COMP_REG_VALID(comp));
  102. /* Initialize selected compare value */
  103. switch (comp)
  104. {
  105. case 0:
  106. ret = RTC->COMP0;
  107. break;
  108. case 1:
  109. ret = RTC->COMP1;
  110. break;
  111. default:
  112. /* Unknown compare register selected */
  113. ret = 0;
  114. break;
  115. }
  116. return ret;
  117. }
  118. /***************************************************************************//**
  119. * @brief
  120. * Set RTC compare register value.
  121. *
  122. * @note
  123. * The setting of a compare register requires synchronization into the
  124. * low frequency domain. If the same register is modified before a previous
  125. * update has completed, this function will stall until the previous
  126. * synchronization has completed. This only applies to the Gecko Family, see
  127. * comment in the RTC_Sync() internal function call.
  128. *
  129. * @param[in] comp
  130. * Compare register to set, either 0 or 1
  131. *
  132. * @param[in] value
  133. * Initialization value (<= 0x00ffffff)
  134. ******************************************************************************/
  135. void RTC_CompareSet(unsigned int comp, uint32_t value)
  136. {
  137. volatile uint32_t *compReg;
  138. #if defined(_EFM32_GECKO_FAMILY)
  139. uint32_t syncbusy;
  140. #endif
  141. EFM_ASSERT(RTC_COMP_REG_VALID(comp) &&
  142. ((value & ~(_RTC_COMP0_COMP0_MASK >> _RTC_COMP0_COMP0_SHIFT)) == 0));
  143. /* Initialize selected compare value */
  144. switch (comp)
  145. {
  146. case 0:
  147. compReg = &(RTC->COMP0);
  148. #if defined(_EFM32_GECKO_FAMILY)
  149. syncbusy = RTC_SYNCBUSY_COMP0;
  150. #endif
  151. break;
  152. case 1:
  153. compReg = &(RTC->COMP1);
  154. #if defined(_EFM32_GECKO_FAMILY)
  155. syncbusy = RTC_SYNCBUSY_COMP1;
  156. #endif
  157. break;
  158. default:
  159. /* Unknown compare register selected, abort */
  160. return;
  161. }
  162. #if defined(_EFM32_GECKO_FAMILY)
  163. /* LF register about to be modified require sync. busy check */
  164. RTC_Sync(syncbusy);
  165. #endif
  166. *compReg = value;
  167. }
  168. /***************************************************************************//**
  169. * @brief
  170. * Enable/disable RTC.
  171. *
  172. * @note
  173. * The enabling/disabling of the RTC modifies the RTC CTRL register which
  174. * requires synchronization into the low frequency domain. If this register is
  175. * modified before a previous update to the same register has completed, this
  176. * function will stall until the previous synchronization has completed. This
  177. * only applies to the Gecko Family, see comment in the RTC_Sync() internal
  178. * function call.
  179. *
  180. * @param[in] enable
  181. * true to enable counting, false to disable.
  182. ******************************************************************************/
  183. void RTC_Enable(bool enable)
  184. {
  185. #if defined(_EFM32_GECKO_FAMILY)
  186. /* LF register about to be modified require sync. busy check */
  187. RTC_Sync(RTC_SYNCBUSY_CTRL);
  188. #endif
  189. BITBAND_Peripheral(&(RTC->CTRL), _RTC_CTRL_EN_SHIFT, (unsigned int) enable);
  190. }
  191. /***************************************************************************//**
  192. * @brief
  193. * RTC register synchronization freeze control.
  194. *
  195. * @details
  196. * Some RTC registers require synchronization into the low frequency (LF)
  197. * domain. The freeze feature allows for several such registers to be
  198. * modified before passing them to the LF domain simultaneously (which
  199. * takes place when the freeze mode is disabled).
  200. *
  201. * @note
  202. * When enabling freeze mode, this function will wait for all current
  203. * ongoing RTC synchronization to LF domain to complete (Normally
  204. * synchronization will not be in progress.) However for this reason, when
  205. * using freeze mode, modifications of registers requiring LF synchronization
  206. * should be done within one freeze enable/disable block to avoid unecessary
  207. * stalling. This only applies to the Gecko Family, see the reference manual
  208. * chapter about Access to Low Energy Peripherals (Asynchronos Registers)
  209. * for details.
  210. *
  211. * @param[in] enable
  212. * @li true - enable freeze, modified registers are not propagated to the
  213. * LF domain
  214. * @li false - disables freeze, modified registers are propagated to LF
  215. * domain
  216. ******************************************************************************/
  217. void RTC_FreezeEnable(bool enable)
  218. {
  219. if (enable)
  220. {
  221. #if defined(_EFM32_GECKO_FAMILY)
  222. /* Wait for any ongoing LF synchronization to complete. This is just to */
  223. /* protect against the rare case when a user */
  224. /* - modifies a register requiring LF sync */
  225. /* - then enables freeze before LF sync completed */
  226. /* - then modifies the same register again */
  227. /* since modifying a register while it is in sync progress should be */
  228. /* avoided. */
  229. while (RTC->SYNCBUSY)
  230. ;
  231. #endif
  232. RTC->FREEZE = RTC_FREEZE_REGFREEZE;
  233. }
  234. else
  235. {
  236. RTC->FREEZE = 0;
  237. }
  238. }
  239. /***************************************************************************//**
  240. * @brief
  241. * Initialize RTC.
  242. *
  243. * @details
  244. * Note that the compare values must be set separately with RTC_CompareSet().
  245. * That should probably be done prior to the use of this function if
  246. * configuring the RTC to start when initialization is completed.
  247. *
  248. * @note
  249. * The initialization of the RTC modifies the RTC CTRL register which requires
  250. * synchronization into the low frequency domain. If this register is
  251. * modified before a previous update to the same register has completed, this
  252. * function will stall until the previous synchronization has completed. This
  253. * only applies to the Gecko Family, see comment in the RTC_Sync() internal
  254. * function call.
  255. *
  256. * @param[in] init
  257. * Pointer to RTC initialization structure.
  258. ******************************************************************************/
  259. void RTC_Init(const RTC_Init_TypeDef *init)
  260. {
  261. uint32_t tmp;
  262. if (init->enable)
  263. {
  264. tmp = RTC_CTRL_EN;
  265. }
  266. else
  267. {
  268. tmp = 0;
  269. }
  270. /* Configure DEBUGRUN flag, sets whether or not counter should be
  271. * updated when debugger is active */
  272. if (init->debugRun)
  273. {
  274. tmp |= RTC_CTRL_DEBUGRUN;
  275. }
  276. /* Configure COMP0TOP, this will use the COMP0 compare value as an
  277. * overflow value, instead of default 24-bit 0x00ffffff */
  278. if (init->comp0Top)
  279. {
  280. tmp |= RTC_CTRL_COMP0TOP;
  281. }
  282. #if defined(_EFM32_GECKO_FAMILY)
  283. /* LF register about to be modified require sync. busy check */
  284. RTC_Sync(RTC_SYNCBUSY_CTRL);
  285. #endif
  286. RTC->CTRL = tmp;
  287. }
  288. /***************************************************************************//**
  289. * @brief
  290. * Restore RTC to reset state
  291. ******************************************************************************/
  292. void RTC_Reset(void)
  293. {
  294. /* Restore all essential RTC register to default config */
  295. RTC->FREEZE = _RTC_FREEZE_RESETVALUE;
  296. RTC->CTRL = _RTC_CTRL_RESETVALUE;
  297. RTC->COMP0 = _RTC_COMP0_RESETVALUE;
  298. RTC->COMP1 = _RTC_COMP1_RESETVALUE;
  299. RTC->IEN = _RTC_IEN_RESETVALUE;
  300. RTC->IFC = _RTC_IFC_RESETVALUE;
  301. }
  302. /***************************************************************************//**
  303. * @brief
  304. * Restart RTC counter from zero
  305. ******************************************************************************/
  306. void RTC_CounterReset(void)
  307. {
  308. /* A disable/enable sequnce will start the counter at zero */
  309. RTC_Enable(false);
  310. RTC_Enable(true);
  311. }
  312. /** @} (end addtogroup RTC) */
  313. /** @} (end addtogroup EM_Library) */