board.h 2.1 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-03-26 luobeihai first version
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <rtthread.h>
  13. #include <apm32e10x.h>
  14. #include "apm32e10x_gpio.h"
  15. #include "apm32e10x_rcm.h"
  16. #include "apm32e10x_misc.h"
  17. #include "apm32e10x_rcm.h"
  18. #include "apm32e10x_eint.h"
  19. #include "apm32e10x_usart.h"
  20. #include "apm32e10x_dma.h"
  21. #if defined(RT_USING_ADC)
  22. #include "apm32e10x_adc.h"
  23. #endif
  24. #if defined(RT_USING_DAC)
  25. #include "apm32e10x_dac.h"
  26. #endif
  27. #if defined(RT_USING_RTC)
  28. #include "apm32e10x_rtc.h"
  29. #include "apm32e10x_pmu.h"
  30. #endif
  31. #if defined(RT_USING_SPI)
  32. #include "apm32e10x_spi.h"
  33. #endif
  34. #if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM)
  35. #include "apm32e10x_tmr.h"
  36. #endif
  37. #if defined(RT_USING_WDT)
  38. #include "apm32e10x_iwdt.h"
  39. #include "apm32e10x_wwdt.h"
  40. #endif
  41. #if defined(BSP_USING_SDCARD)
  42. #include "apm32e10x_sdio.h"
  43. #endif
  44. #if defined(BSP_USING_ON_CHIP_FLASH)
  45. #include "apm32e10x_fmc.h"
  46. #endif
  47. #if defined(RT_USING_CAN)
  48. #include "apm32e10x_can.h"
  49. #endif
  50. #if defined(BSP_USING_SDRAM)
  51. #include "apm32e10x_dmc.h"
  52. #endif
  53. #include "drv_common.h"
  54. #include "drv_gpio.h"
  55. #ifdef __cplusplus
  56. extern "C" {
  57. #endif
  58. #define APM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  59. #define APM32_FLASH_SIZE (512 * 1024)
  60. #define APM32_FLASH_END_ADDRESS ((uint32_t)(APM32_FLASH_START_ADRESS + APM32_FLASH_SIZE))
  61. /* Internal SRAM memory size[Kbytes] <6-128>, Default: 128 */
  62. #define APM32_SRAM_SIZE 128
  63. #define APM32_SRAM_END (0x20000000 + APM32_SRAM_SIZE * 1024)
  64. #if defined(__ARMCC_VERSION)
  65. extern int Image$$RW_IRAM1$$ZI$$Limit;
  66. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  67. #elif __ICCARM__
  68. #pragma section="CSTACK"
  69. #define HEAP_BEGIN (__segment_end("CSTACK"))
  70. #else
  71. extern int __bss_end;
  72. #define HEAP_BEGIN ((void *)&__bss_end)
  73. #endif
  74. #define HEAP_END APM32_SRAM_END
  75. void SystemClock_Config(void);
  76. void apm32_usart_init(void);
  77. #ifdef __cplusplus
  78. }
  79. #endif
  80. #endif /* __BOARD_H__ */