ssi.c 23 KB

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  1. //*****************************************************************************
  2. //
  3. // ssi.c - Driver for Synchronous Serial Interface.
  4. //
  5. // Copyright (c) 2005-2010 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 6459 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. //*****************************************************************************
  25. //
  26. //! \addtogroup ssi_api
  27. //! @{
  28. //
  29. //*****************************************************************************
  30. #include "inc/hw_ints.h"
  31. #include "inc/hw_memmap.h"
  32. #include "inc/hw_ssi.h"
  33. #include "inc/hw_types.h"
  34. #include "driverlib/debug.h"
  35. #include "driverlib/interrupt.h"
  36. #include "driverlib/ssi.h"
  37. //*****************************************************************************
  38. //
  39. //! Configures the synchronous serial interface.
  40. //!
  41. //! \param ulBase specifies the SSI module base address.
  42. //! \param ulSSIClk is the rate of the clock supplied to the SSI module.
  43. //! \param ulProtocol specifies the data transfer protocol.
  44. //! \param ulMode specifies the mode of operation.
  45. //! \param ulBitRate specifies the clock rate.
  46. //! \param ulDataWidth specifies number of bits transferred per frame.
  47. //!
  48. //! This function configures the synchronous serial interface. It sets
  49. //! the SSI protocol, mode of operation, bit rate, and data width.
  50. //!
  51. //! The \e ulProtocol parameter defines the data frame format. The
  52. //! \e ulProtocol parameter can be one of the following values:
  53. //! \b SSI_FRF_MOTO_MODE_0, \b SSI_FRF_MOTO_MODE_1, \b SSI_FRF_MOTO_MODE_2,
  54. //! \b SSI_FRF_MOTO_MODE_3, \b SSI_FRF_TI, or \b SSI_FRF_NMW. The Motorola
  55. //! frame formats imply the following polarity and phase configurations:
  56. //!
  57. //! <pre>
  58. //! Polarity Phase Mode
  59. //! 0 0 SSI_FRF_MOTO_MODE_0
  60. //! 0 1 SSI_FRF_MOTO_MODE_1
  61. //! 1 0 SSI_FRF_MOTO_MODE_2
  62. //! 1 1 SSI_FRF_MOTO_MODE_3
  63. //! </pre>
  64. //!
  65. //! The \e ulMode parameter defines the operating mode of the SSI module. The
  66. //! SSI module can operate as a master or slave; if a slave, the SSI can be
  67. //! configured to disable output on its serial output line. The \e ulMode
  68. //! parameter can be one of the following values: \b SSI_MODE_MASTER,
  69. //! \b SSI_MODE_SLAVE, or \b SSI_MODE_SLAVE_OD.
  70. //!
  71. //! The \e ulBitRate parameter defines the bit rate for the SSI. This bit rate
  72. //! must satisfy the following clock ratio criteria:
  73. //!
  74. //! - FSSI >= 2 * bit rate (master mode)
  75. //! - FSSI >= 12 * bit rate (slave modes)
  76. //!
  77. //! where FSSI is the frequency of the clock supplied to the SSI module.
  78. //!
  79. //! The \e ulDataWidth parameter defines the width of the data transfers, and
  80. //! can be a value between 4 and 16, inclusive.
  81. //!
  82. //! The peripheral clock will be the same as the processor clock. This will be
  83. //! the value returned by SysCtlClockGet(), or it can be explicitly hard coded
  84. //! if it is constant and known (to save the code/execution overhead of a call
  85. //! to SysCtlClockGet()).
  86. //!
  87. //! This function replaces the original SSIConfig() API and performs the same
  88. //! actions. A macro is provided in <tt>ssi.h</tt> to map the original API to
  89. //! this API.
  90. //!
  91. //! \return None.
  92. //
  93. //*****************************************************************************
  94. void
  95. SSIConfigSetExpClk(unsigned long ulBase, unsigned long ulSSIClk,
  96. unsigned long ulProtocol, unsigned long ulMode,
  97. unsigned long ulBitRate, unsigned long ulDataWidth)
  98. {
  99. unsigned long ulMaxBitRate;
  100. unsigned long ulRegVal;
  101. unsigned long ulPreDiv;
  102. unsigned long ulSCR;
  103. unsigned long ulSPH_SPO;
  104. //
  105. // Check the arguments.
  106. //
  107. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  108. ASSERT((ulProtocol == SSI_FRF_MOTO_MODE_0) ||
  109. (ulProtocol == SSI_FRF_MOTO_MODE_1) ||
  110. (ulProtocol == SSI_FRF_MOTO_MODE_2) ||
  111. (ulProtocol == SSI_FRF_MOTO_MODE_3) ||
  112. (ulProtocol == SSI_FRF_TI) ||
  113. (ulProtocol == SSI_FRF_NMW));
  114. ASSERT((ulMode == SSI_MODE_MASTER) ||
  115. (ulMode == SSI_MODE_SLAVE) ||
  116. (ulMode == SSI_MODE_SLAVE_OD));
  117. ASSERT(((ulMode == SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 2))) ||
  118. ((ulMode != SSI_MODE_MASTER) && (ulBitRate <= (ulSSIClk / 12))));
  119. ASSERT((ulSSIClk / ulBitRate) <= (254 * 256));
  120. ASSERT((ulDataWidth >= 4) && (ulDataWidth <= 16));
  121. //
  122. // Set the mode.
  123. //
  124. ulRegVal = (ulMode == SSI_MODE_SLAVE_OD) ? SSI_CR1_SOD : 0;
  125. ulRegVal |= (ulMode == SSI_MODE_MASTER) ? 0 : SSI_CR1_MS;
  126. HWREG(ulBase + SSI_O_CR1) = ulRegVal;
  127. //
  128. // Set the clock predivider.
  129. //
  130. ulMaxBitRate = ulSSIClk / ulBitRate;
  131. ulPreDiv = 0;
  132. do
  133. {
  134. ulPreDiv += 2;
  135. ulSCR = (ulMaxBitRate / ulPreDiv) - 1;
  136. }
  137. while(ulSCR > 255);
  138. HWREG(ulBase + SSI_O_CPSR) = ulPreDiv;
  139. //
  140. // Set protocol and clock rate.
  141. //
  142. ulSPH_SPO = (ulProtocol & 3) << 6;
  143. ulProtocol &= SSI_CR0_FRF_M;
  144. ulRegVal = (ulSCR << 8) | ulSPH_SPO | ulProtocol | (ulDataWidth - 1);
  145. HWREG(ulBase + SSI_O_CR0) = ulRegVal;
  146. }
  147. //*****************************************************************************
  148. //
  149. //! Enables the synchronous serial interface.
  150. //!
  151. //! \param ulBase specifies the SSI module base address.
  152. //!
  153. //! This function enables operation of the synchronous serial interface. The
  154. //! synchronous serial interface must be configured before it is enabled.
  155. //!
  156. //! \return None.
  157. //
  158. //*****************************************************************************
  159. void
  160. SSIEnable(unsigned long ulBase)
  161. {
  162. //
  163. // Check the arguments.
  164. //
  165. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  166. //
  167. // Read-modify-write the enable bit.
  168. //
  169. HWREG(ulBase + SSI_O_CR1) |= SSI_CR1_SSE;
  170. }
  171. //*****************************************************************************
  172. //
  173. //! Disables the synchronous serial interface.
  174. //!
  175. //! \param ulBase specifies the SSI module base address.
  176. //!
  177. //! This function disables operation of the synchronous serial interface.
  178. //!
  179. //! \return None.
  180. //
  181. //*****************************************************************************
  182. void
  183. SSIDisable(unsigned long ulBase)
  184. {
  185. //
  186. // Check the arguments.
  187. //
  188. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  189. //
  190. // Read-modify-write the enable bit.
  191. //
  192. HWREG(ulBase + SSI_O_CR1) &= ~(SSI_CR1_SSE);
  193. }
  194. //*****************************************************************************
  195. //
  196. //! Registers an interrupt handler for the synchronous serial interface.
  197. //!
  198. //! \param ulBase specifies the SSI module base address.
  199. //! \param pfnHandler is a pointer to the function to be called when the
  200. //! synchronous serial interface interrupt occurs.
  201. //!
  202. //! This sets the handler to be called when an SSI interrupt
  203. //! occurs. This will enable the global interrupt in the interrupt controller;
  204. //! specific SSI interrupts must be enabled via SSIIntEnable(). If necessary,
  205. //! it is the interrupt handler's responsibility to clear the interrupt source
  206. //! via SSIIntClear().
  207. //!
  208. //! \sa IntRegister() for important information about registering interrupt
  209. //! handlers.
  210. //!
  211. //! \return None.
  212. //
  213. //*****************************************************************************
  214. void
  215. SSIIntRegister(unsigned long ulBase, void (*pfnHandler)(void))
  216. {
  217. unsigned long ulInt;
  218. //
  219. // Check the arguments.
  220. //
  221. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  222. //
  223. // Determine the interrupt number based on the SSI port.
  224. //
  225. ulInt = (ulBase == SSI0_BASE) ? INT_SSI0 : INT_SSI1;
  226. //
  227. // Register the interrupt handler, returning an error if an error occurs.
  228. //
  229. IntRegister(ulInt, pfnHandler);
  230. //
  231. // Enable the synchronous serial interface interrupt.
  232. //
  233. IntEnable(ulInt);
  234. }
  235. //*****************************************************************************
  236. //
  237. //! Unregisters an interrupt handler for the synchronous serial interface.
  238. //!
  239. //! \param ulBase specifies the SSI module base address.
  240. //!
  241. //! This function will clear the handler to be called when a SSI
  242. //! interrupt occurs. This will also mask off the interrupt in the interrupt
  243. //! controller so that the interrupt handler no longer is called.
  244. //!
  245. //! \sa IntRegister() for important information about registering interrupt
  246. //! handlers.
  247. //!
  248. //! \return None.
  249. //
  250. //*****************************************************************************
  251. void
  252. SSIIntUnregister(unsigned long ulBase)
  253. {
  254. unsigned long ulInt;
  255. //
  256. // Check the arguments.
  257. //
  258. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  259. //
  260. // Determine the interrupt number based on the SSI port.
  261. //
  262. ulInt = (ulBase == SSI0_BASE) ? INT_SSI0 : INT_SSI1;
  263. //
  264. // Disable the interrupt.
  265. //
  266. IntDisable(ulInt);
  267. //
  268. // Unregister the interrupt handler.
  269. //
  270. IntUnregister(ulInt);
  271. }
  272. //*****************************************************************************
  273. //
  274. //! Enables individual SSI interrupt sources.
  275. //!
  276. //! \param ulBase specifies the SSI module base address.
  277. //! \param ulIntFlags is a bit mask of the interrupt sources to be enabled.
  278. //!
  279. //! Enables the indicated SSI interrupt sources. Only the sources that are
  280. //! enabled can be reflected to the processor interrupt; disabled sources have
  281. //! no effect on the processor. The \e ulIntFlags parameter can be any of the
  282. //! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or \b SSI_RXOR values.
  283. //!
  284. //! \return None.
  285. //
  286. //*****************************************************************************
  287. void
  288. SSIIntEnable(unsigned long ulBase, unsigned long ulIntFlags)
  289. {
  290. //
  291. // Check the arguments.
  292. //
  293. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  294. //
  295. // Enable the specified interrupts.
  296. //
  297. HWREG(ulBase + SSI_O_IM) |= ulIntFlags;
  298. }
  299. //*****************************************************************************
  300. //
  301. //! Disables individual SSI interrupt sources.
  302. //!
  303. //! \param ulBase specifies the SSI module base address.
  304. //! \param ulIntFlags is a bit mask of the interrupt sources to be disabled.
  305. //!
  306. //! Disables the indicated SSI interrupt sources. The \e ulIntFlags parameter
  307. //! can be any of the \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, or \b SSI_RXOR
  308. //! values.
  309. //!
  310. //! \return None.
  311. //
  312. //*****************************************************************************
  313. void
  314. SSIIntDisable(unsigned long ulBase, unsigned long ulIntFlags)
  315. {
  316. //
  317. // Check the arguments.
  318. //
  319. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  320. //
  321. // Disable the specified interrupts.
  322. //
  323. HWREG(ulBase + SSI_O_IM) &= ~(ulIntFlags);
  324. }
  325. //*****************************************************************************
  326. //
  327. //! Gets the current interrupt status.
  328. //!
  329. //! \param ulBase specifies the SSI module base address.
  330. //! \param bMasked is \b false if the raw interrupt status is required or
  331. //! \b true if the masked interrupt status is required.
  332. //!
  333. //! This function returns the interrupt status for the SSI module. Either the
  334. //! raw interrupt status or the status of interrupts that are allowed to
  335. //! reflect to the processor can be returned.
  336. //!
  337. //! \return The current interrupt status, enumerated as a bit field of
  338. //! \b SSI_TXFF, \b SSI_RXFF, \b SSI_RXTO, and \b SSI_RXOR.
  339. //
  340. //*****************************************************************************
  341. unsigned long
  342. SSIIntStatus(unsigned long ulBase, tBoolean bMasked)
  343. {
  344. //
  345. // Check the arguments.
  346. //
  347. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  348. //
  349. // Return either the interrupt status or the raw interrupt status as
  350. // requested.
  351. //
  352. if(bMasked)
  353. {
  354. return(HWREG(ulBase + SSI_O_MIS));
  355. }
  356. else
  357. {
  358. return(HWREG(ulBase + SSI_O_RIS));
  359. }
  360. }
  361. //*****************************************************************************
  362. //
  363. //! Clears SSI interrupt sources.
  364. //!
  365. //! \param ulBase specifies the SSI module base address.
  366. //! \param ulIntFlags is a bit mask of the interrupt sources to be cleared.
  367. //!
  368. //! The specified SSI interrupt sources are cleared so that they no longer
  369. //! assert. This function must be called in the interrupt handler to keep the
  370. //! interrupts from being recognized again immediately upon exit. The
  371. //! \e ulIntFlags parameter can consist of either or both the \b SSI_RXTO and
  372. //! \b SSI_RXOR values.
  373. //!
  374. //! \note Since there is a write buffer in the Cortex-M3 processor, it may take
  375. //! several clock cycles before the interrupt source is actually cleared.
  376. //! Therefore, it is recommended that the interrupt source be cleared early in
  377. //! the interrupt handler (as opposed to the very last action) to avoid
  378. //! returning from the interrupt handler before the interrupt source is
  379. //! actually cleared. Failure to do so may result in the interrupt handler
  380. //! being immediately reentered (since NVIC still sees the interrupt source
  381. //! asserted).
  382. //!
  383. //! \return None.
  384. //
  385. //*****************************************************************************
  386. void
  387. SSIIntClear(unsigned long ulBase, unsigned long ulIntFlags)
  388. {
  389. //
  390. // Check the arguments.
  391. //
  392. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  393. //
  394. // Clear the requested interrupt sources.
  395. //
  396. HWREG(ulBase + SSI_O_ICR) = ulIntFlags;
  397. }
  398. //*****************************************************************************
  399. //
  400. //! Puts a data element into the SSI transmit FIFO.
  401. //!
  402. //! \param ulBase specifies the SSI module base address.
  403. //! \param ulData is the data to be transmitted over the SSI interface.
  404. //!
  405. //! This function places the supplied data into the transmit FIFO of the
  406. //! specified SSI module.
  407. //!
  408. //! \note The upper 32 - N bits of the \e ulData are discarded by the hardware,
  409. //! where N is the data width as configured by SSIConfigSetExpClk(). For
  410. //! example, if the interface is configured for 8-bit data width, the upper 24
  411. //! bits of \e ulData are discarded.
  412. //!
  413. //! \return None.
  414. //
  415. //*****************************************************************************
  416. void
  417. SSIDataPut(unsigned long ulBase, unsigned long ulData)
  418. {
  419. //
  420. // Check the arguments.
  421. //
  422. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  423. ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
  424. SSI_CR0_DSS_M))) == 0);
  425. //
  426. // Wait until there is space.
  427. //
  428. while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF))
  429. {
  430. }
  431. //
  432. // Write the data to the SSI.
  433. //
  434. HWREG(ulBase + SSI_O_DR) = ulData;
  435. }
  436. //*****************************************************************************
  437. //
  438. //! Puts a data element into the SSI transmit FIFO.
  439. //!
  440. //! \param ulBase specifies the SSI module base address.
  441. //! \param ulData is the data to be transmitted over the SSI interface.
  442. //!
  443. //! This function places the supplied data into the transmit FIFO of the
  444. //! specified SSI module. If there is no space in the FIFO, then this function
  445. //! returns a zero.
  446. //!
  447. //! This function replaces the original SSIDataNonBlockingPut() API and
  448. //! performs the same actions. A macro is provided in <tt>ssi.h</tt> to map
  449. //! the original API to this API.
  450. //!
  451. //! \note The upper 32 - N bits of the \e ulData are discarded by the hardware,
  452. //! where N is the data width as configured by SSIConfigSetExpClk(). For
  453. //! example, if the interface is configured for 8-bit data width, the upper 24
  454. //! bits of \e ulData are discarded.
  455. //!
  456. //! \return Returns the number of elements written to the SSI transmit FIFO.
  457. //
  458. //*****************************************************************************
  459. long
  460. SSIDataPutNonBlocking(unsigned long ulBase, unsigned long ulData)
  461. {
  462. //
  463. // Check the arguments.
  464. //
  465. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  466. ASSERT((ulData & (0xfffffffe << (HWREG(ulBase + SSI_O_CR0) &
  467. SSI_CR0_DSS_M))) == 0);
  468. //
  469. // Check for space to write.
  470. //
  471. if(HWREG(ulBase + SSI_O_SR) & SSI_SR_TNF)
  472. {
  473. HWREG(ulBase + SSI_O_DR) = ulData;
  474. return(1);
  475. }
  476. else
  477. {
  478. return(0);
  479. }
  480. }
  481. //*****************************************************************************
  482. //
  483. //! Gets a data element from the SSI receive FIFO.
  484. //!
  485. //! \param ulBase specifies the SSI module base address.
  486. //! \param pulData is a pointer to a storage location for data that was
  487. //! received over the SSI interface.
  488. //!
  489. //! This function gets received data from the receive FIFO of the specified
  490. //! SSI module and places that data into the location specified by the
  491. //! \e pulData parameter.
  492. //!
  493. //! \note Only the lower N bits of the value written to \e pulData contain
  494. //! valid data, where N is the data width as configured by
  495. //! SSIConfigSetExpClk(). For example, if the interface is configured for
  496. //! 8-bit data width, only the lower 8 bits of the value written to \e pulData
  497. //! contain valid data.
  498. //!
  499. //! \return None.
  500. //
  501. //*****************************************************************************
  502. void
  503. SSIDataGet(unsigned long ulBase, unsigned long *pulData)
  504. {
  505. //
  506. // Check the arguments.
  507. //
  508. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  509. //
  510. // Wait until there is data to be read.
  511. //
  512. while(!(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE))
  513. {
  514. }
  515. //
  516. // Read data from SSI.
  517. //
  518. *pulData = HWREG(ulBase + SSI_O_DR);
  519. }
  520. //*****************************************************************************
  521. //
  522. //! Gets a data element from the SSI receive FIFO.
  523. //!
  524. //! \param ulBase specifies the SSI module base address.
  525. //! \param pulData is a pointer to a storage location for data that was
  526. //! received over the SSI interface.
  527. //!
  528. //! This function gets received data from the receive FIFO of the specified SSI
  529. //! module and places that data into the location specified by the \e ulData
  530. //! parameter. If there is no data in the FIFO, then this function returns a
  531. //! zero.
  532. //!
  533. //! This function replaces the original SSIDataNonBlockingGet() API and
  534. //! performs the same actions. A macro is provided in <tt>ssi.h</tt> to map
  535. //! the original API to this API.
  536. //!
  537. //! \note Only the lower N bits of the value written to \e pulData contain
  538. //! valid data, where N is the data width as configured by
  539. //! SSIConfigSetExpClk(). For example, if the interface is configured for
  540. //! 8-bit data width, only the lower 8 bits of the value written to \e pulData
  541. //! contain valid data.
  542. //!
  543. //! \return Returns the number of elements read from the SSI receive FIFO.
  544. //
  545. //*****************************************************************************
  546. long
  547. SSIDataGetNonBlocking(unsigned long ulBase, unsigned long *pulData)
  548. {
  549. //
  550. // Check the arguments.
  551. //
  552. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  553. //
  554. // Check for data to read.
  555. //
  556. if(HWREG(ulBase + SSI_O_SR) & SSI_SR_RNE)
  557. {
  558. *pulData = HWREG(ulBase + SSI_O_DR);
  559. return(1);
  560. }
  561. else
  562. {
  563. return(0);
  564. }
  565. }
  566. //*****************************************************************************
  567. //
  568. //! Enable SSI DMA operation.
  569. //!
  570. //! \param ulBase is the base address of the SSI port.
  571. //! \param ulDMAFlags is a bit mask of the DMA features to enable.
  572. //!
  573. //! The specified SSI DMA features are enabled. The SSI can be
  574. //! configured to use DMA for transmit and/or receive data transfers.
  575. //! The \e ulDMAFlags parameter is the logical OR of any of the following
  576. //! values:
  577. //!
  578. //! - SSI_DMA_RX - enable DMA for receive
  579. //! - SSI_DMA_TX - enable DMA for transmit
  580. //!
  581. //! \note The uDMA controller must also be set up before DMA can be used
  582. //! with the SSI.
  583. //!
  584. //! \return None.
  585. //
  586. //*****************************************************************************
  587. void
  588. SSIDMAEnable(unsigned long ulBase, unsigned long ulDMAFlags)
  589. {
  590. //
  591. // Check the arguments.
  592. //
  593. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  594. //
  595. // Set the requested bits in the UART DMA control register.
  596. //
  597. HWREG(ulBase + SSI_O_DMACTL) |= ulDMAFlags;
  598. }
  599. //*****************************************************************************
  600. //
  601. //! Disable SSI DMA operation.
  602. //!
  603. //! \param ulBase is the base address of the SSI port.
  604. //! \param ulDMAFlags is a bit mask of the DMA features to disable.
  605. //!
  606. //! This function is used to disable SSI DMA features that were enabled
  607. //! by SSIDMAEnable(). The specified SSI DMA features are disabled. The
  608. //! \e ulDMAFlags parameter is the logical OR of any of the following values:
  609. //!
  610. //! - SSI_DMA_RX - disable DMA for receive
  611. //! - SSI_DMA_TX - disable DMA for transmit
  612. //!
  613. //! \return None.
  614. //
  615. //*****************************************************************************
  616. void
  617. SSIDMADisable(unsigned long ulBase, unsigned long ulDMAFlags)
  618. {
  619. //
  620. // Check the arguments.
  621. //
  622. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  623. //
  624. // Clear the requested bits in the UART DMA control register.
  625. //
  626. HWREG(ulBase + SSI_O_DMACTL) &= ~ulDMAFlags;
  627. }
  628. //*****************************************************************************
  629. //
  630. //! Determines whether the SSI transmitter is busy or not.
  631. //!
  632. //! \param ulBase is the base address of the SSI port.
  633. //!
  634. //! Allows the caller to determine whether all transmitted bytes have cleared
  635. //! the transmitter hardware. If \b false is returned, then the transmit FIFO
  636. //! is empty and all bits of the last transmitted word have left the hardware
  637. //! shift register.
  638. //!
  639. //! \return Returns \b true if the SSI is transmitting or \b false if all
  640. //! transmissions are complete.
  641. //
  642. //*****************************************************************************
  643. tBoolean
  644. SSIBusy(unsigned long ulBase)
  645. {
  646. //
  647. // Check the arguments.
  648. //
  649. ASSERT((ulBase == SSI0_BASE) || (ulBase == SSI1_BASE));
  650. //
  651. // Determine if the SSI is busy.
  652. //
  653. return((HWREG(ulBase + SSI_O_SR) & SSI_SR_BSY) ? true : false);
  654. }
  655. //*****************************************************************************
  656. //
  657. // Close the Doxygen group.
  658. //! @}
  659. //
  660. //*****************************************************************************