udma.c 43 KB

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  1. //*****************************************************************************
  2. //
  3. // udma.c - Driver for the micro-DMA controller.
  4. //
  5. // Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 6459 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. //*****************************************************************************
  25. //
  26. //! \addtogroup udma_api
  27. //! @{
  28. //
  29. //*****************************************************************************
  30. #include "inc/hw_types.h"
  31. #include "inc/hw_udma.h"
  32. #include "driverlib/debug.h"
  33. #include "driverlib/interrupt.h"
  34. #include "driverlib/udma.h"
  35. //*****************************************************************************
  36. //
  37. //! Enables the uDMA controller for use.
  38. //!
  39. //! This function enables the uDMA controller. The uDMA controller must be
  40. //! enabled before it can be configured and used.
  41. //!
  42. //! \return None.
  43. //
  44. //*****************************************************************************
  45. void
  46. uDMAEnable(void)
  47. {
  48. //
  49. // Set the master enable bit in the config register.
  50. //
  51. HWREG(UDMA_CFG) = UDMA_CFG_MASTEN;
  52. }
  53. //*****************************************************************************
  54. //
  55. //! Disables the uDMA controller for use.
  56. //!
  57. //! This function disables the uDMA controller. Once disabled, the uDMA
  58. //! controller will not operate until re-enabled with uDMAEnable().
  59. //!
  60. //! \return None.
  61. //
  62. //*****************************************************************************
  63. void
  64. uDMADisable(void)
  65. {
  66. //
  67. // Clear the master enable bit in the config register.
  68. //
  69. HWREG(UDMA_CFG) = 0;
  70. }
  71. //*****************************************************************************
  72. //
  73. //! Gets the uDMA error status.
  74. //!
  75. //! This function returns the uDMA error status. It should be called from
  76. //! within the uDMA error interrupt handler to determine if a uDMA error
  77. //! occurred.
  78. //!
  79. //! \return Returns non-zero if a uDMA error is pending.
  80. //
  81. //*****************************************************************************
  82. unsigned long
  83. uDMAErrorStatusGet(void)
  84. {
  85. //
  86. // Return the uDMA error status.
  87. //
  88. return(HWREG(UDMA_ERRCLR));
  89. }
  90. //*****************************************************************************
  91. //
  92. //! Clears the uDMA error interrupt.
  93. //!
  94. //! This function clears a pending uDMA error interrupt. It should be called
  95. //! from within the uDMA error interrupt handler to clear the interrupt.
  96. //!
  97. //! \return None.
  98. //
  99. //*****************************************************************************
  100. void
  101. uDMAErrorStatusClear(void)
  102. {
  103. //
  104. // Clear the uDMA error interrupt.
  105. //
  106. HWREG(UDMA_ERRCLR) = 1;
  107. }
  108. //*****************************************************************************
  109. //
  110. //! Enables a uDMA channel for operation.
  111. //!
  112. //! \param ulChannel is the channel number to enable.
  113. //!
  114. //! This function enables a specific uDMA channel for use. This function must
  115. //! be used to enable a channel before it can be used to perform a uDMA
  116. //! transfer.
  117. //!
  118. //! When a uDMA transfer is completed, the channel will be automatically
  119. //! disabled by the uDMA controller. Therefore, this function should be called
  120. //! prior to starting up any new transfer.
  121. //!
  122. //! The \e ulChannel parameter must be one of the following:
  123. //!
  124. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  125. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  126. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  127. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  128. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  129. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  130. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  131. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  132. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  133. //!
  134. //! And for microcontrollers that have a USB peripheral:
  135. //!
  136. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  137. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  138. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  139. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  140. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  141. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  142. //!
  143. //! \return None.
  144. //
  145. //*****************************************************************************
  146. void
  147. uDMAChannelEnable(unsigned long ulChannel)
  148. {
  149. //
  150. // Check the arguments.
  151. //
  152. ASSERT(ulChannel < 32);
  153. //
  154. // Set the bit for this channel in the enable set register.
  155. //
  156. HWREG(UDMA_ENASET) = 1 << ulChannel;
  157. }
  158. //*****************************************************************************
  159. //
  160. //! Disables a uDMA channel for operation.
  161. //!
  162. //! \param ulChannel is the channel number to disable.
  163. //!
  164. //! This function disables a specific uDMA channel. Once disabled, a channel
  165. //! will not respond to uDMA transfer requests until re-enabled via
  166. //! uDMAChannelEnable().
  167. //!
  168. //! The \e ulChannel parameter must be one of the following:
  169. //!
  170. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  171. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  172. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  173. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  174. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  175. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  176. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  177. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  178. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  179. //!
  180. //! And for microcontrollers that have a USB peripheral:
  181. //!
  182. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  183. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  184. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  185. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  186. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  187. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  188. //!
  189. //! \return None.
  190. //
  191. //*****************************************************************************
  192. void
  193. uDMAChannelDisable(unsigned long ulChannel)
  194. {
  195. //
  196. // Check the arguments.
  197. //
  198. ASSERT(ulChannel < 32);
  199. //
  200. // Set the bit for this channel in the enable clear register.
  201. //
  202. HWREG(UDMA_ENACLR) = 1 << ulChannel;
  203. }
  204. //*****************************************************************************
  205. //
  206. //! Checks if a uDMA channel is enabled for operation.
  207. //!
  208. //! \param ulChannel is the channel number to check.
  209. //!
  210. //! This function checks to see if a specific uDMA channel is enabled. This
  211. //! can be used to check the status of a transfer, since the channel will
  212. //! be automatically disabled at the end of a transfer.
  213. //!
  214. //! The \e ulChannel parameter must be one of the following:
  215. //!
  216. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  217. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  218. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  219. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  220. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  221. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  222. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  223. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  224. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  225. //!
  226. //! And for microcontrollers that have a USB peripheral:
  227. //!
  228. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  229. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  230. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  231. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  232. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  233. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  234. //!
  235. //! \return Returns \b true if the channel is enabled, \b false if disabled.
  236. //
  237. //*****************************************************************************
  238. tBoolean
  239. uDMAChannelIsEnabled(unsigned long ulChannel)
  240. {
  241. //
  242. // Check the arguments.
  243. //
  244. ASSERT(ulChannel < 32);
  245. //
  246. // AND the specified channel bit with the enable register, and return the
  247. // result.
  248. //
  249. return((HWREG(UDMA_ENASET) & (1 << ulChannel)) ? true : false);
  250. }
  251. //*****************************************************************************
  252. //
  253. //! Sets the base address for the channel control table.
  254. //!
  255. //! \param pControlTable is a pointer to the 1024 byte aligned base address
  256. //! of the uDMA channel control table.
  257. //!
  258. //! This function sets the base address of the channel control table. This
  259. //! table resides in system memory and holds control information for each uDMA
  260. //! channel. The table must be aligned on a 1024 byte boundary. The base
  261. //! address must be set before any of the channel functions can be used.
  262. //!
  263. //! The size of the channel control table depends on the number of uDMA
  264. //! channels, and which transfer modes are used. Refer to the introductory
  265. //! text and the microcontroller datasheet for more information about the
  266. //! channel control table.
  267. //!
  268. //! \return None.
  269. //
  270. //*****************************************************************************
  271. void
  272. uDMAControlBaseSet(void *pControlTable)
  273. {
  274. //
  275. // Check the arguments.
  276. //
  277. ASSERT(((unsigned long)pControlTable & ~0x3FF) ==
  278. (unsigned long)pControlTable);
  279. ASSERT((unsigned long)pControlTable >= 0x20000000);
  280. //
  281. // Program the base address into the register.
  282. //
  283. HWREG(UDMA_CTLBASE) = (unsigned long)pControlTable;
  284. }
  285. //*****************************************************************************
  286. //
  287. //! Gets the base address for the channel control table.
  288. //!
  289. //! This function gets the base address of the channel control table. This
  290. //! table resides in system memory and holds control information for each uDMA
  291. //! channel.
  292. //!
  293. //! \return Returns a pointer to the base address of the channel control table.
  294. //
  295. //*****************************************************************************
  296. void *
  297. uDMAControlBaseGet(void)
  298. {
  299. //
  300. // Read the current value of the control base register, and return it to
  301. // the caller.
  302. //
  303. return((void *)HWREG(UDMA_CTLBASE));
  304. }
  305. //*****************************************************************************
  306. //
  307. //! Requests a uDMA channel to start a transfer.
  308. //!
  309. //! \param ulChannel is the channel number on which to request a uDMA transfer.
  310. //!
  311. //! This function allows software to request a uDMA channel to begin a
  312. //! transfer. This could be used for performing a memory to memory transfer,
  313. //! or if for some reason a transfer needs to be initiated by software instead
  314. //! of the peripheral associated with that channel.
  315. //!
  316. //! The \e ulChannel parameter must be one of the following:
  317. //!
  318. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  319. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  320. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  321. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  322. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  323. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  324. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  325. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  326. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  327. //!
  328. //! And for microcontrollers that have a USB peripheral:
  329. //!
  330. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  331. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  332. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  333. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  334. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  335. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  336. //!
  337. //! \note If the channel is \b UDMA_CHANNEL_SW and interrupts are used, then
  338. //! the completion will be signaled on the uDMA dedicated interrupt. If a
  339. //! peripheral channel is used, then the completion will be signaled on the
  340. //! peripheral's interrupt.
  341. //!
  342. //! \return None.
  343. //
  344. //*****************************************************************************
  345. void
  346. uDMAChannelRequest(unsigned long ulChannel)
  347. {
  348. //
  349. // Check the arguments.
  350. //
  351. ASSERT(ulChannel < 32);
  352. //
  353. // Set the bit for this channel in the software uDMA request register.
  354. //
  355. HWREG(UDMA_SWREQ) = 1 << ulChannel;
  356. }
  357. //*****************************************************************************
  358. //
  359. //! Enables attributes of a uDMA channel.
  360. //!
  361. //! \param ulChannel is the channel to configure.
  362. //! \param ulAttr is a combination of attributes for the channel.
  363. //!
  364. //! The \e ulChannel parameter must be one of the following:
  365. //!
  366. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  367. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  368. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  369. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  370. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  371. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  372. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  373. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  374. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  375. //!
  376. //! And for microcontrollers that have a USB peripheral:
  377. //!
  378. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  379. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  380. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  381. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  382. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  383. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  384. //!
  385. //! The \e ulAttr parameter is the logical OR of any of the following:
  386. //!
  387. //! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
  388. //! mode.
  389. //! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
  390. //! for this channel.
  391. //! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  392. //! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
  393. //! peripheral for this channel.
  394. //!
  395. //! \return None.
  396. //
  397. //*****************************************************************************
  398. void
  399. uDMAChannelAttributeEnable(unsigned long ulChannel, unsigned long ulAttr)
  400. {
  401. //
  402. // Check the arguments.
  403. //
  404. ASSERT(ulChannel < 32);
  405. ASSERT((ulAttr & ~(UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT |
  406. UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK)) == 0);
  407. //
  408. // Set the useburst bit for this channel if set in ulConfig.
  409. //
  410. if(ulAttr & UDMA_ATTR_USEBURST)
  411. {
  412. HWREG(UDMA_USEBURSTSET) = 1 << ulChannel;
  413. }
  414. //
  415. // Set the alternate control select bit for this channel,
  416. // if set in ulConfig.
  417. //
  418. if(ulAttr & UDMA_ATTR_ALTSELECT)
  419. {
  420. HWREG(UDMA_ALTSET) = 1 << ulChannel;
  421. }
  422. //
  423. // Set the high priority bit for this channel, if set in ulConfig.
  424. //
  425. if(ulAttr & UDMA_ATTR_HIGH_PRIORITY)
  426. {
  427. HWREG(UDMA_PRIOSET) = 1 << ulChannel;
  428. }
  429. //
  430. // Set the request mask bit for this channel, if set in ulConfig.
  431. //
  432. if(ulAttr & UDMA_ATTR_REQMASK)
  433. {
  434. HWREG(UDMA_REQMASKSET) = 1 << ulChannel;
  435. }
  436. }
  437. //*****************************************************************************
  438. //
  439. //! Disables attributes of a uDMA channel.
  440. //!
  441. //! \param ulChannel is the channel to configure.
  442. //! \param ulAttr is a combination of attributes for the channel.
  443. //!
  444. //! This function is used to disable attributes of a uDMA channel.
  445. //!
  446. //! The \e ulChannel parameter must be one of the following:
  447. //!
  448. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  449. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  450. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  451. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  452. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  453. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  454. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  455. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  456. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  457. //!
  458. //! And for microcontrollers that have a USB peripheral:
  459. //!
  460. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  461. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  462. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  463. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  464. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  465. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  466. //!
  467. //! The \e ulAttr parameter is the logical OR of any of the following:
  468. //!
  469. //! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
  470. //! mode.
  471. //! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
  472. //! for this channel.
  473. //! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  474. //! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
  475. //! peripheral for this channel.
  476. //!
  477. //! \return None.
  478. //
  479. //*****************************************************************************
  480. void
  481. uDMAChannelAttributeDisable(unsigned long ulChannel, unsigned long ulAttr)
  482. {
  483. //
  484. // Check the arguments.
  485. //
  486. ASSERT(ulChannel < 32);
  487. ASSERT((ulAttr & ~(UDMA_ATTR_USEBURST | UDMA_ATTR_ALTSELECT |
  488. UDMA_ATTR_HIGH_PRIORITY | UDMA_ATTR_REQMASK)) == 0);
  489. //
  490. // Clear the useburst bit for this channel if set in ulConfig.
  491. //
  492. if(ulAttr & UDMA_ATTR_USEBURST)
  493. {
  494. HWREG(UDMA_USEBURSTCLR) = 1 << ulChannel;
  495. }
  496. //
  497. // Clear the alternate control select bit for this channel, if set in
  498. // ulConfig.
  499. //
  500. if(ulAttr & UDMA_ATTR_ALTSELECT)
  501. {
  502. HWREG(UDMA_ALTCLR) = 1 << ulChannel;
  503. }
  504. //
  505. // Clear the high priority bit for this channel, if set in ulConfig.
  506. //
  507. if(ulAttr & UDMA_ATTR_HIGH_PRIORITY)
  508. {
  509. HWREG(UDMA_PRIOCLR) = 1 << ulChannel;
  510. }
  511. //
  512. // Clear the request mask bit for this channel, if set in ulConfig.
  513. //
  514. if(ulAttr & UDMA_ATTR_REQMASK)
  515. {
  516. HWREG(UDMA_REQMASKCLR) = 1 << ulChannel;
  517. }
  518. }
  519. //*****************************************************************************
  520. //
  521. //! Gets the enabled attributes of a uDMA channel.
  522. //!
  523. //! \param ulChannel is the channel to configure.
  524. //!
  525. //! This function returns a combination of flags representing the attributes of
  526. //! the uDMA channel.
  527. //!
  528. //! The \e ulChannel parameter must be one of the following:
  529. //!
  530. //! - \b UDMA_CHANNEL_UART0RX for UART 0 receive channel
  531. //! - \b UDMA_CHANNEL_UART0TX for UART 0 transmit channel
  532. //! - \b UDMA_CHANNEL_UART1RX for UART 1 receive channel
  533. //! - \b UDMA_CHANNEL_UART1TX for UART 1 transmit channel
  534. //! - \b UDMA_CHANNEL_SSI0RX for SSI 0 receive channel
  535. //! - \b UDMA_CHANNEL_SSI0TX for SSI 0 transmit channel
  536. //! - \b UDMA_CHANNEL_SSI1RX for SSI 1 receive channel
  537. //! - \b UDMA_CHANNEL_SSI1TX for SSI 1 transmit channel
  538. //! - \b UDMA_CHANNEL_SW for the software dedicated uDMA channel
  539. //!
  540. //! And for microcontrollers that have a USB peripheral:
  541. //!
  542. //! - \b UDMA_CHANNEL_USBEP1RX for USB endpoint 1 receive
  543. //! - \b UDMA_CHANNEL_USBEP1TX for USB endpoint 1 transmit
  544. //! - \b UDMA_CHANNEL_USBEP2RX for USB endpoint 2 receive
  545. //! - \b UDMA_CHANNEL_USBEP2TX for USB endpoint 2 transmit
  546. //! - \b UDMA_CHANNEL_USBEP3RX for USB endpoint 3 receive
  547. //! - \b UDMA_CHANNEL_USBEP3TX for USB endpoint 3 transmit
  548. //!
  549. //! \return Returns the logical OR of the attributes of the uDMA channel, which
  550. //! can be any of the following:
  551. //! - \b UDMA_ATTR_USEBURST is used to restrict transfers to use only a burst
  552. //! mode.
  553. //! - \b UDMA_ATTR_ALTSELECT is used to select the alternate control structure
  554. //! for this channel.
  555. //! - \b UDMA_ATTR_HIGH_PRIORITY is used to set this channel to high priority.
  556. //! - \b UDMA_ATTR_REQMASK is used to mask the hardware request signal from the
  557. //! peripheral for this channel.
  558. //
  559. //*****************************************************************************
  560. unsigned long
  561. uDMAChannelAttributeGet(unsigned long ulChannel)
  562. {
  563. unsigned long ulAttr = 0;
  564. //
  565. // Check the arguments.
  566. //
  567. ASSERT(ulChannel < 32);
  568. //
  569. // Check to see if useburst bit is set for this channel.
  570. //
  571. if(HWREG(UDMA_USEBURSTSET) & (1 << ulChannel))
  572. {
  573. ulAttr |= UDMA_ATTR_USEBURST;
  574. }
  575. //
  576. // Check to see if the alternate control bit is set for this channel.
  577. //
  578. if(HWREG(UDMA_ALTSET) & (1 << ulChannel))
  579. {
  580. ulAttr |= UDMA_ATTR_ALTSELECT;
  581. }
  582. //
  583. // Check to see if the high priority bit is set for this channel.
  584. //
  585. if(HWREG(UDMA_PRIOSET) & (1 << ulChannel))
  586. {
  587. ulAttr |= UDMA_ATTR_HIGH_PRIORITY;
  588. }
  589. //
  590. // Check to see if the request mask bit is set for this channel.
  591. //
  592. if(HWREG(UDMA_REQMASKSET) & (1 << ulChannel))
  593. {
  594. ulAttr |= UDMA_ATTR_REQMASK;
  595. }
  596. //
  597. // Return the configuration flags.
  598. //
  599. return(ulAttr);
  600. }
  601. //*****************************************************************************
  602. //
  603. //! Sets the control parameters for a uDMA channel.
  604. //!
  605. //! \param ulChannel is the logical OR of the uDMA channel number with
  606. //! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
  607. //! \param ulControl is logical OR of several control values to set the control
  608. //! parameters for the channel.
  609. //!
  610. //! This function is used to set control parameters for a uDMA transfer. These
  611. //! are typically parameters that are not changed often.
  612. //!
  613. //! The \e ulChannel parameter is one of the choices documented in the
  614. //! uDMAChannelEnable() function. It should be the logical OR of the channel
  615. //! with one of \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether
  616. //! the primary or alternate data structure is used.
  617. //!
  618. //! The \e ulControl parameter is the logical OR of five values: the data size,
  619. //! the source address increment, the destination address increment, the
  620. //! arbitration size, and the use burst flag. The choices available for each
  621. //! of these values is described below.
  622. //!
  623. //! Choose the data size from one of \b UDMA_SIZE_8, \b UDMA_SIZE_16, or
  624. //! \b UDMA_SIZE_32 to select a data size of 8, 16, or 32 bits.
  625. //!
  626. //! Choose the source address increment from one of \b UDMA_SRC_INC_8,
  627. //! \b UDMA_SRC_INC_16, \b UDMA_SRC_INC_32, or \b UDMA_SRC_INC_NONE to select
  628. //! an address increment of 8-bit bytes, 16-bit halfwords, 32-bit words, or
  629. //! to select non-incrementing.
  630. //!
  631. //! Choose the destination address increment from one of \b UDMA_DST_INC_8,
  632. //! \b UDMA_DST_INC_16, \b UDMA_DST_INC_32, or \b UDMA_DST_INC_NONE to select
  633. //! an address increment of 8-bit bytes, 16-bit halfwords, 32-bit words, or
  634. //! to select non-incrementing.
  635. //!
  636. //! The arbitration size determines how many items are transferred before
  637. //! the uDMA controller re-arbitrates for the bus. Choose the arbitration size
  638. //! from one of \b UDMA_ARB_1, \b UDMA_ARB_2, \b UDMA_ARB_4, \b UDMA_ARB_8,
  639. //! through \b UDMA_ARB_1024 to select the arbitration size from 1 to 1024
  640. //! items, in powers of 2.
  641. //!
  642. //! The value \b UDMA_NEXT_USEBURST is used to force the channel to only
  643. //! respond to burst requests at the tail end of a scatter-gather transfer.
  644. //!
  645. //! \note The address increment cannot be smaller than the data size.
  646. //!
  647. //! \return None.
  648. //
  649. //*****************************************************************************
  650. void
  651. uDMAChannelControlSet(unsigned long ulChannel, unsigned long ulControl)
  652. {
  653. tDMAControlTable *pCtl;
  654. //
  655. // Check the arguments.
  656. //
  657. ASSERT(ulChannel < 64);
  658. ASSERT(HWREG(UDMA_CTLBASE) != 0);
  659. //
  660. // Get the base address of the control table.
  661. //
  662. pCtl = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
  663. //
  664. // Get the current control word value and mask off the fields to be
  665. // changed, then OR in the new settings.
  666. //
  667. pCtl[ulChannel].ulControl = ((pCtl[ulChannel].ulControl &
  668. ~(UDMA_CHCTL_DSTINC_M |
  669. UDMA_CHCTL_DSTSIZE_M |
  670. UDMA_CHCTL_SRCINC_M |
  671. UDMA_CHCTL_SRCSIZE_M |
  672. UDMA_CHCTL_ARBSIZE_M |
  673. UDMA_CHCTL_NXTUSEBURST)) |
  674. ulControl);
  675. }
  676. //*****************************************************************************
  677. //
  678. //! Sets the transfer parameters for a uDMA channel.
  679. //!
  680. //! \param ulChannel is the logical or of the uDMA channel number with either
  681. //! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
  682. //! \param ulMode is the type of uDMA transfer.
  683. //! \param pvSrcAddr is the source address for the transfer.
  684. //! \param pvDstAddr is the destination address for the transfer.
  685. //! \param ulTransferSize is the number of data items to transfer.
  686. //!
  687. //! This function is used to set the parameters for a uDMA transfer. These are
  688. //! typically parameters that are changed often. The function
  689. //! uDMAChannelControlSet() MUST be called at least once for this channel prior
  690. //! to calling this function.
  691. //!
  692. //! The \e ulChannel parameter is one of the choices documented in the
  693. //! uDMAChannelEnable() function. It should be the logical OR of the channel
  694. //! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether the
  695. //! primary or alternate data structure is used.
  696. //!
  697. //! The \e ulMode parameter should be one of the following values:
  698. //!
  699. //! - \b UDMA_MODE_STOP stops the uDMA transfer. The controller sets the mode
  700. //! to this value at the end of a transfer.
  701. //! - \b UDMA_MODE_BASIC to perform a basic transfer based on request.
  702. //! - \b UDMA_MODE_AUTO to perform a transfer that will always complete once
  703. //! started even if request is removed.
  704. //! - \b UDMA_MODE_PINGPONG to set up a transfer that switches between the
  705. //! primary and alternate control structures for the channel. This allows
  706. //! use of ping-pong buffering for uDMA transfers.
  707. //! - \b UDMA_MODE_MEM_SCATTER_GATHER to set up a memory scatter-gather
  708. //! transfer.
  709. //! - \b UDMA_MODE_PER_SCATTER_GATHER to set up a peripheral scatter-gather
  710. //! transfer.
  711. //!
  712. //! The \e pvSrcAddr and \e pvDstAddr parameters are pointers to the first
  713. //! location of the data to be transferred. These addresses should be aligned
  714. //! according to the item size. The compiler will take care of this if the
  715. //! pointers are pointing to storage of the appropriate data type.
  716. //!
  717. //! The \e ulTransferSize parameter is the number of data items, not the number
  718. //! of bytes.
  719. //!
  720. //! The two scatter/gather modes, memory and peripheral, are actually different
  721. //! depending on whether the primary or alternate control structure is
  722. //! selected. This function will look for the \b UDMA_PRI_SELECT and
  723. //! \b UDMA_ALT_SELECT flag along with the channel number and will set the
  724. //! scatter/gather mode as appropriate for the primary or alternate control
  725. //! structure.
  726. //!
  727. //! The channel must also be enabled using uDMAChannelEnable() after calling
  728. //! this function. The transfer will not begin until the channel has been set
  729. //! up and enabled. Note that the channel is automatically disabled after the
  730. //! transfer is completed, meaning that uDMAChannelEnable() must be called
  731. //! again after setting up the next transfer.
  732. //!
  733. //! \note Great care must be taken to not modify a channel control structure
  734. //! that is in use or else the results will be unpredictable, including the
  735. //! possibility of undesired data transfers to or from memory or peripherals.
  736. //! For BASIC and AUTO modes, it is safe to make changes when the channel is
  737. //! disabled, or the uDMAChannelModeGet() returns \b UDMA_MODE_STOP. For
  738. //! PINGPONG or one of the SCATTER_GATHER modes, it is safe to modify the
  739. //! primary or alternate control structure only when the other is being used.
  740. //! The uDMAChannelModeGet() function will return \b UDMA_MODE_STOP when a
  741. //! channel control structure is inactive and safe to modify.
  742. //!
  743. //! \return None.
  744. //
  745. //*****************************************************************************
  746. void
  747. uDMAChannelTransferSet(unsigned long ulChannel, unsigned long ulMode,
  748. void *pvSrcAddr, void *pvDstAddr,
  749. unsigned long ulTransferSize)
  750. {
  751. tDMAControlTable *pControlTable;
  752. unsigned long ulControl;
  753. unsigned long ulSize;
  754. unsigned long ulInc;
  755. //
  756. // Check the arguments.
  757. //
  758. ASSERT(ulChannel < 64);
  759. ASSERT(HWREG(UDMA_CTLBASE) != 0);
  760. ASSERT(ulMode <= UDMA_MODE_PER_SCATTER_GATHER);
  761. ASSERT((unsigned long)pvSrcAddr >= 0x20000000);
  762. ASSERT((unsigned long)pvDstAddr >= 0x20000000);
  763. ASSERT((ulTransferSize != 0) && (ulTransferSize <= 1024));
  764. //
  765. // Get the base address of the control table.
  766. //
  767. pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
  768. //
  769. // Get the current control word value and mask off the mode and size
  770. // fields.
  771. //
  772. ulControl = (pControlTable[ulChannel].ulControl &
  773. ~(UDMA_CHCTL_XFERSIZE_M | UDMA_CHCTL_XFERMODE_M));
  774. //
  775. // Adjust the mode if the alt control structure is selected.
  776. //
  777. if(ulChannel & UDMA_ALT_SELECT)
  778. {
  779. if((ulMode == UDMA_MODE_MEM_SCATTER_GATHER) ||
  780. (ulMode == UDMA_MODE_PER_SCATTER_GATHER))
  781. {
  782. ulMode |= UDMA_MODE_ALT_SELECT;
  783. }
  784. }
  785. //
  786. // Set the transfer size and mode in the control word (but dont write the
  787. // control word yet as it could kick off a transfer).
  788. //
  789. ulControl |= ulMode | ((ulTransferSize - 1) << 4);
  790. //
  791. // Get the data item size from the control word (set previously).
  792. //
  793. ulSize = (ulControl & UDMA_CHCTL_DSTSIZE_M) >> 28;
  794. //
  795. // Convert the transfer size to be in units of bytes. Shift (multiply) to
  796. // get the value in bytes, based on the data item size.
  797. //
  798. ulTransferSize = ulTransferSize << ulSize;
  799. //
  800. // Get the address increment value for the source, from the control word.
  801. //
  802. ulInc = (ulControl & UDMA_CHCTL_SRCINC_M);
  803. //
  804. // Compute the ending source address of the transfer. If the source
  805. // increment is set to none, then the ending address is the same as the
  806. // beginning.
  807. //
  808. if(ulInc != UDMA_SRC_INC_NONE)
  809. {
  810. pvSrcAddr = (void *)((unsigned long)pvSrcAddr + ulTransferSize - 1);
  811. }
  812. //
  813. // Load the source ending address into the control block.
  814. //
  815. pControlTable[ulChannel].pvSrcEndAddr = pvSrcAddr;
  816. //
  817. // Get the address increment value for the destination, from the control
  818. // word.
  819. //
  820. ulInc = (ulControl & UDMA_CHCTL_DSTINC_M);
  821. //
  822. // Compute the ending destination address of the transfer. If the
  823. // destination increment is set to none, then the ending address is the
  824. // same as the beginning.
  825. //
  826. if(ulInc != UDMA_DST_INC_NONE)
  827. {
  828. pvDstAddr = (void *)((unsigned long)pvDstAddr + ulTransferSize - 1);
  829. }
  830. //
  831. // Load the destination ending address into the control block.
  832. //
  833. pControlTable[ulChannel].pvDstEndAddr = pvDstAddr;
  834. //
  835. // Write the new control word value.
  836. //
  837. pControlTable[ulChannel].ulControl = ulControl;
  838. }
  839. //*****************************************************************************
  840. //
  841. //! Gets the current transfer size for a uDMA channel.
  842. //!
  843. //! \param ulChannel is the logical or of the uDMA channel number with either
  844. //! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
  845. //!
  846. //! This function is used to get the uDMA transfer size for a channel. The
  847. //! transfer size is the number of items to transfer, where the size of an item
  848. //! might be 8, 16, or 32 bits. If a partial transfer has already occurred,
  849. //! then the number of remaining items will be returned. If the transfer is
  850. //! complete, then 0 will be returned.
  851. //!
  852. //! The \e ulChannel parameter is one of the choices documented in the
  853. //! uDMAChannelEnable() function. It should be the logical OR of the channel
  854. //! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether
  855. //! the primary or alternate data structure is used.
  856. //!
  857. //! \return Returns the number of items remaining to transfer.
  858. //
  859. //*****************************************************************************
  860. unsigned long
  861. uDMAChannelSizeGet(unsigned long ulChannel)
  862. {
  863. tDMAControlTable *pControlTable;
  864. unsigned long ulControl;
  865. //
  866. // Check the arguments.
  867. //
  868. ASSERT(ulChannel < 64);
  869. ASSERT(HWREG(UDMA_CTLBASE) != 0);
  870. //
  871. // Get the base address of the control table.
  872. //
  873. pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
  874. //
  875. // Get the current control word value and mask off all but the size field
  876. // and the mode field.
  877. //
  878. ulControl = pControlTable[ulChannel].ulControl &
  879. (UDMA_CHCTL_XFERSIZE_M | UDMA_CHCTL_XFERMODE_M);
  880. //
  881. // If the size field and mode field are 0 then the transfer is finished
  882. // and there are no more items to transfer
  883. //
  884. if(ulControl == 0)
  885. {
  886. return(0);
  887. }
  888. //
  889. // Otherwise, if either the size field or more field is non-zero, then
  890. // not all the items have been transferred.
  891. //
  892. else
  893. {
  894. //
  895. // Shift the size field and add one, then return to user.
  896. //
  897. return((ulControl >> 4) + 1);
  898. }
  899. }
  900. //*****************************************************************************
  901. //
  902. //! Gets the transfer mode for a uDMA channel.
  903. //!
  904. //! \param ulChannel is the logical or of the uDMA channel number with either
  905. //! \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT.
  906. //!
  907. //! This function is used to get the transfer mode for the uDMA channel. It
  908. //! can be used to query the status of a transfer on a channel. When the
  909. //! transfer is complete the mode will be \b UDMA_MODE_STOP.
  910. //!
  911. //! The \e ulChannel parameter is one of the choices documented in the
  912. //! uDMAChannelEnable() function. It should be the logical OR of the channel
  913. //! with either \b UDMA_PRI_SELECT or \b UDMA_ALT_SELECT to choose whether the
  914. //! primary or alternate data structure is used.
  915. //!
  916. //! \return Returns the transfer mode of the specified channel and control
  917. //! structure, which will be one of the following values: \b UDMA_MODE_STOP,
  918. //! \b UDMA_MODE_BASIC, \b UDMA_MODE_AUTO, \b UDMA_MODE_PINGPONG,
  919. //! \b UDMA_MODE_MEM_SCATTER_GATHER, or \b UDMA_MODE_PER_SCATTER_GATHER.
  920. //
  921. //*****************************************************************************
  922. unsigned long
  923. uDMAChannelModeGet(unsigned long ulChannel)
  924. {
  925. tDMAControlTable *pControlTable;
  926. unsigned long ulControl;
  927. //
  928. // Check the arguments.
  929. //
  930. ASSERT(ulChannel < 64);
  931. ASSERT(HWREG(UDMA_CTLBASE) != 0);
  932. //
  933. // Get the base address of the control table.
  934. //
  935. pControlTable = (tDMAControlTable *)HWREG(UDMA_CTLBASE);
  936. //
  937. // Get the current control word value and mask off all but the mode field.
  938. //
  939. ulControl = pControlTable[ulChannel].ulControl & UDMA_CHCTL_XFERMODE_M;
  940. //
  941. // Check if scatter/gather mode, and if so, mask off the alt bit.
  942. //
  943. if(((ulControl & ~UDMA_MODE_ALT_SELECT) == UDMA_MODE_MEM_SCATTER_GATHER) ||
  944. ((ulControl & ~UDMA_MODE_ALT_SELECT) == UDMA_MODE_PER_SCATTER_GATHER))
  945. {
  946. ulControl &= ~UDMA_MODE_ALT_SELECT;
  947. }
  948. //
  949. // Return the mode to the caller.
  950. //
  951. return(ulControl);
  952. }
  953. //*****************************************************************************
  954. //
  955. //! Selects the secondary peripheral for a set of uDMA channels.
  956. //!
  957. //! \param ulSecPeriphs is the logical or of the uDMA channels for which to
  958. //! use the secondary peripheral, instead of the default peripheral.
  959. //!
  960. //! This function is used to select the secondary peripheral assignment for
  961. //! a set of uDMA channels. By selecting the secondary peripheral assignment
  962. //! for a channel, the default peripheral assignment is no longer available
  963. //! for that channel.
  964. //!
  965. //! The parameter \e ulSecPeriphs can be the logical OR of any of the
  966. //! following macros. If one of the macros below is in the list passed
  967. //! to this function, then the secondary peripheral (marked as \b _SEC_)
  968. //! will be selected.
  969. //!
  970. //! - \b UDMA_DEF_USBEP1RX_SEC_UART2RX
  971. //! - \b UDMA_DEF_USBEP1TX_SEC_UART2TX
  972. //! - \b UDMA_DEF_USBEP2RX_SEC_TMR3A
  973. //! - \b UDMA_DEF_USBEP2TX_SEC_TMR3B
  974. //! - \b UDMA_DEF_USBEP3RX_SEC_TMR2A
  975. //! - \b UDMA_DEF_USBEP3TX_SEC_TMR2B
  976. //! - \b UDMA_DEF_ETH0RX_SEC_TMR2A
  977. //! - \b UDMA_DEF_ETH0TX_SEC_TMR2B
  978. //! - \b UDMA_DEF_UART0RX_SEC_UART1RX
  979. //! - \b UDMA_DEF_UART0TX_SEC_UART1TX
  980. //! - \b UDMA_DEF_SSI0RX_SEC_SSI1RX
  981. //! - \b UDMA_DEF_SSI0TX_SEC_SSI1TX
  982. //! - \b UDMA_DEF_RESERVED_SEC_UART2RX
  983. //! - \b UDMA_DEF_RESERVED_SEC_UART2TX
  984. //! - \b UDMA_DEF_ADC00_SEC_TMR2A
  985. //! - \b UDMA_DEF_ADC01_SEC_TMR2B
  986. //! - \b UDMA_DEF_ADC02_SEC_RESERVED
  987. //! - \b UDMA_DEF_ADC03_SEC_RESERVED
  988. //! - \b UDMA_DEF_TMR0A_SEC_TMR1A
  989. //! - \b UDMA_DEF_TMR0B_SEC_TMR1B
  990. //! - \b UDMA_DEF_TMR1A_SEC_EPI0RX
  991. //! - \b UDMA_DEF_TMR1B_SEC_EPI0TX
  992. //! - \b UDMA_DEF_UART1RX_SEC_RESERVED
  993. //! - \b UDMA_DEF_UART1TX_SEC_RESERVED
  994. //! - \b UDMA_DEF_SSI1RX_SEC_ADC10
  995. //! - \b UDMA_DEF_SSI1TX_SEC_ADC11
  996. //! - \b UDMA_DEF_RESERVED_SEC_ADC12
  997. //! - \b UDMA_DEF_RESERVED_SEC_ADC13
  998. //! - \b UDMA_DEF_I2S0RX_SEC_RESERVED
  999. //! - \b UDMA_DEF_I2S0TX_SEC_RESERVED
  1000. //!
  1001. //! \return None.
  1002. //
  1003. //*****************************************************************************
  1004. void
  1005. uDMAChannelSelectSecondary(unsigned long ulSecPeriphs)
  1006. {
  1007. //
  1008. // Select the secondary peripheral for the specified channels.
  1009. //
  1010. HWREG(UDMA_CHALT) |= ulSecPeriphs;
  1011. }
  1012. //*****************************************************************************
  1013. //
  1014. //! Selects the default peripheral for a set of uDMA channels.
  1015. //!
  1016. //! \param ulDefPeriphs is the logical or of the uDMA channels for which to
  1017. //! use the default peripheral, instead of the secondary peripheral.
  1018. //!
  1019. //! This function is used to select the default peripheral assignment for
  1020. //! a set of uDMA channels.
  1021. //!
  1022. //! The parameter \e ulDefPeriphs can be the logical OR of any of the
  1023. //! following macros. If one of the macros below is in the list passed
  1024. //! to this function, then the default peripheral (marked as \b _DEF_)
  1025. //! will be selected.
  1026. //!
  1027. //! - \b UDMA_DEF_USBEP1RX_SEC_UART2RX
  1028. //! - \b UDMA_DEF_USBEP1TX_SEC_UART2TX
  1029. //! - \b UDMA_DEF_USBEP2RX_SEC_TMR3A
  1030. //! - \b UDMA_DEF_USBEP2TX_SEC_TMR3B
  1031. //! - \b UDMA_DEF_USBEP3RX_SEC_TMR2A
  1032. //! - \b UDMA_DEF_USBEP3TX_SEC_TMR2B
  1033. //! - \b UDMA_DEF_ETH0RX_SEC_TMR2A
  1034. //! - \b UDMA_DEF_ETH0TX_SEC_TMR2B
  1035. //! - \b UDMA_DEF_UART0RX_SEC_UART1RX
  1036. //! - \b UDMA_DEF_UART0TX_SEC_UART1TX
  1037. //! - \b UDMA_DEF_SSI0RX_SEC_SSI1RX
  1038. //! - \b UDMA_DEF_SSI0TX_SEC_SSI1TX
  1039. //! - \b UDMA_DEF_RESERVED_SEC_UART2RX
  1040. //! - \b UDMA_DEF_RESERVED_SEC_UART2TX
  1041. //! - \b UDMA_DEF_ADC00_SEC_TMR2A
  1042. //! - \b UDMA_DEF_ADC01_SEC_TMR2B
  1043. //! - \b UDMA_DEF_ADC02_SEC_RESERVED
  1044. //! - \b UDMA_DEF_ADC03_SEC_RESERVED
  1045. //! - \b UDMA_DEF_TMR0A_SEC_TMR1A
  1046. //! - \b UDMA_DEF_TMR0B_SEC_TMR1B
  1047. //! - \b UDMA_DEF_TMR1A_SEC_EPI0RX
  1048. //! - \b UDMA_DEF_TMR1B_SEC_EPI0TX
  1049. //! - \b UDMA_DEF_UART1RX_SEC_RESERVED
  1050. //! - \b UDMA_DEF_UART1TX_SEC_RESERVED
  1051. //! - \b UDMA_DEF_SSI1RX_SEC_ADC10
  1052. //! - \b UDMA_DEF_SSI1TX_SEC_ADC11
  1053. //! - \b UDMA_DEF_RESERVED_SEC_ADC12
  1054. //! - \b UDMA_DEF_RESERVED_SEC_ADC13
  1055. //! - \b UDMA_DEF_I2S0RX_SEC_RESERVED
  1056. //! - \b UDMA_DEF_I2S0TX_SEC_RESERVED
  1057. //!
  1058. //! \return None.
  1059. //
  1060. //*****************************************************************************
  1061. void
  1062. uDMAChannelSelectDefault(unsigned long ulDefPeriphs)
  1063. {
  1064. //
  1065. // Select the default peripheral for the specified channels.
  1066. //
  1067. HWREG(UDMA_CHALT) &= ~ulDefPeriphs;
  1068. }
  1069. //*****************************************************************************
  1070. //
  1071. //! Registers an interrupt handler for the uDMA controller.
  1072. //!
  1073. //! \param ulIntChannel identifies which uDMA interrupt is to be registered.
  1074. //! \param pfnHandler is a pointer to the function to be called when the
  1075. //! interrupt is activated.
  1076. //!
  1077. //! This sets and enables the handler to be called when the uDMA controller
  1078. //! generates an interrupt. The \e ulIntChannel parameter should be one of the
  1079. //! following:
  1080. //!
  1081. //! - \b UDMA_INT_SW to register an interrupt handler to process interrupts
  1082. //! from the uDMA software channel (UDMA_CHANNEL_SW)
  1083. //! - \b UDMA_INT_ERR to register an interrupt handler to process uDMA error
  1084. //! interrupts
  1085. //!
  1086. //! \sa IntRegister() for important information about registering interrupt
  1087. //! handlers.
  1088. //!
  1089. //! \note The interrupt handler for uDMA is for transfer completion when the
  1090. //! channel UDMA_CHANNEL_SW is used, and for error interrupts. The
  1091. //! interrupts for each peripheral channel are handled through the individual
  1092. //! peripheral interrupt handlers.
  1093. //!
  1094. //! \return None.
  1095. //
  1096. //*****************************************************************************
  1097. void
  1098. uDMAIntRegister(unsigned long ulIntChannel, void (*pfnHandler)(void))
  1099. {
  1100. //
  1101. // Check the arguments.
  1102. //
  1103. ASSERT(pfnHandler);
  1104. ASSERT((ulIntChannel == UDMA_INT_SW) || (ulIntChannel == UDMA_INT_ERR));
  1105. //
  1106. // Register the interrupt handler.
  1107. //
  1108. IntRegister(ulIntChannel, pfnHandler);
  1109. //
  1110. // Enable the memory management fault.
  1111. //
  1112. IntEnable(ulIntChannel);
  1113. }
  1114. //*****************************************************************************
  1115. //
  1116. //! Unregisters an interrupt handler for the uDMA controller.
  1117. //!
  1118. //! \param ulIntChannel identifies which uDMA interrupt to unregister.
  1119. //!
  1120. //! This function will disable and clear the handler to be called for the
  1121. //! specified uDMA interrupt. The \e ulIntChannel parameter should be one of
  1122. //! \b UDMA_INT_SW or \b UDMA_INT_ERR as documented for the function
  1123. //! uDMAIntRegister().
  1124. //!
  1125. //! \sa IntRegister() for important information about registering interrupt
  1126. //! handlers.
  1127. //!
  1128. //! \return None.
  1129. //
  1130. //*****************************************************************************
  1131. void
  1132. uDMAIntUnregister(unsigned long ulIntChannel)
  1133. {
  1134. //
  1135. // Disable the interrupt.
  1136. //
  1137. IntDisable(ulIntChannel);
  1138. //
  1139. // Unregister the interrupt handler.
  1140. //
  1141. IntUnregister(ulIntChannel);
  1142. }
  1143. //*****************************************************************************
  1144. //
  1145. // Close the Doxygen group.
  1146. //! @}
  1147. //
  1148. //*****************************************************************************