usb.c 129 KB

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  1. //*****************************************************************************
  2. //
  3. // usb.c - Driver for the USB Interface.
  4. //
  5. // Copyright (c) 2007-2010 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Texas Instruments (TI) is supplying this software for use solely and
  9. // exclusively on TI's microcontroller products. The software is owned by
  10. // TI and/or its suppliers, and is protected under applicable copyright
  11. // laws. You may not combine this software with "viral" open-source
  12. // software in order to form a larger program.
  13. //
  14. // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
  15. // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
  16. // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
  18. // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
  19. // DAMAGES, FOR ANY REASON WHATSOEVER.
  20. //
  21. // This is part of revision 6459 of the Stellaris Peripheral Driver Library.
  22. //
  23. //*****************************************************************************
  24. //*****************************************************************************
  25. //
  26. //! \addtogroup usb_api
  27. //! @{
  28. //
  29. //*****************************************************************************
  30. #include "inc/hw_ints.h"
  31. #include "inc/hw_memmap.h"
  32. #include "inc/hw_types.h"
  33. #include "inc/hw_usb.h"
  34. #include "driverlib/debug.h"
  35. #include "driverlib/interrupt.h"
  36. #include "driverlib/udma.h"
  37. #include "driverlib/usb.h"
  38. //*****************************************************************************
  39. //
  40. // Amount to shift the RX interrupt sources by in the flags used in the
  41. // interrupt calls.
  42. //
  43. //*****************************************************************************
  44. #ifndef DEPRECATED
  45. #define USB_INT_RX_SHIFT 8
  46. #endif
  47. #define USB_INTEP_RX_SHIFT 16
  48. //*****************************************************************************
  49. //
  50. // Amount to shift the status interrupt sources by in the flags used in the
  51. // interrupt calls.
  52. //
  53. //*****************************************************************************
  54. #ifndef DEPRECATED
  55. #define USB_INT_STATUS_SHIFT 24
  56. #endif
  57. //*****************************************************************************
  58. //
  59. // Amount to shift the RX endpoint status sources by in the flags used in the
  60. // calls.
  61. //
  62. //*****************************************************************************
  63. #define USB_RX_EPSTATUS_SHIFT 16
  64. //*****************************************************************************
  65. //
  66. // Converts from an endpoint specifier to the offset of the endpoint's
  67. // control/status registers.
  68. //
  69. //*****************************************************************************
  70. #define EP_OFFSET(Endpoint) (Endpoint - 0x10)
  71. //*****************************************************************************
  72. //
  73. // Sets one of the indexed registers.
  74. //
  75. // \param ulBase specifies the USB module base address.
  76. // \param ulEndpoint is the endpoint index to target for this write.
  77. // \param ulIndexedReg is the indexed register to write to.
  78. // \param ucValue is the value to write to the register.
  79. //
  80. // This function is used to access the indexed registers for each endpoint.
  81. // The only registers that are indexed are the FIFO configuration registers
  82. // which are not used after configuration.
  83. //
  84. // \return None.
  85. //
  86. //*****************************************************************************
  87. static void
  88. USBIndexWrite(unsigned long ulBase, unsigned long ulEndpoint,
  89. unsigned long ulIndexedReg, unsigned long ulValue,
  90. unsigned long ulSize)
  91. {
  92. unsigned long ulIndex;
  93. //
  94. // Check the arguments.
  95. //
  96. ASSERT(ulBase == USB0_BASE);
  97. ASSERT((ulEndpoint == 0) || (ulEndpoint == 1) || (ulEndpoint == 2) ||
  98. (ulEndpoint == 3));
  99. ASSERT((ulSize == 1) || (ulSize == 2));
  100. //
  101. // Save the old index in case it was in use.
  102. //
  103. ulIndex = HWREGB(ulBase + USB_O_EPIDX);
  104. //
  105. // Set the index.
  106. //
  107. HWREGB(ulBase + USB_O_EPIDX) = ulEndpoint;
  108. //
  109. // Determine the size of the register value.
  110. //
  111. if(ulSize == 1)
  112. {
  113. //
  114. // Set the value.
  115. //
  116. HWREGB(ulBase + ulIndexedReg) = ulValue;
  117. }
  118. else
  119. {
  120. //
  121. // Set the value.
  122. //
  123. HWREGH(ulBase + ulIndexedReg) = ulValue;
  124. }
  125. //
  126. // Restore the old index in case it was in use.
  127. //
  128. HWREGB(ulBase + USB_O_EPIDX) = ulIndex;
  129. }
  130. //*****************************************************************************
  131. //
  132. // Reads one of the indexed registers.
  133. //
  134. // \param ulBase specifies the USB module base address.
  135. // \param ulEndpoint is the endpoint index to target for this write.
  136. // \param ulIndexedReg is the indexed register to write to.
  137. //
  138. // This function is used internally to access the indexed registers for each
  139. // endpoint. The only registers that are indexed are the FIFO configuration
  140. // registers which are not used after configuration.
  141. //
  142. // \return The value in the register requested.
  143. //
  144. //*****************************************************************************
  145. static unsigned long
  146. USBIndexRead(unsigned long ulBase, unsigned long ulEndpoint,
  147. unsigned long ulIndexedReg, unsigned long ulSize)
  148. {
  149. unsigned char ulIndex;
  150. unsigned char ulValue;
  151. //
  152. // Check the arguments.
  153. //
  154. ASSERT(ulBase == USB0_BASE);
  155. ASSERT((ulEndpoint == 0) || (ulEndpoint == 1) || (ulEndpoint == 2) ||
  156. (ulEndpoint == 3));
  157. ASSERT((ulSize == 1) || (ulSize == 2));
  158. //
  159. // Save the old index in case it was in use.
  160. //
  161. ulIndex = HWREGB(ulBase + USB_O_EPIDX);
  162. //
  163. // Set the index.
  164. //
  165. HWREGB(ulBase + USB_O_EPIDX) = ulEndpoint;
  166. //
  167. // Determine the size of the register value.
  168. //
  169. if(ulSize == 1)
  170. {
  171. //
  172. // Get the value.
  173. //
  174. ulValue = HWREGB(ulBase + ulIndexedReg);
  175. }
  176. else
  177. {
  178. //
  179. // Get the value.
  180. //
  181. ulValue = HWREGH(ulBase + ulIndexedReg);
  182. }
  183. //
  184. // Restore the old index in case it was in use.
  185. //
  186. HWREGB(ulBase + USB_O_EPIDX) = ulIndex;
  187. //
  188. // Return the register's value.
  189. //
  190. return(ulValue);
  191. }
  192. //*****************************************************************************
  193. //
  194. //! Puts the USB bus in a suspended state.
  195. //!
  196. //! \param ulBase specifies the USB module base address.
  197. //!
  198. //! When used in host mode, this function will put the USB bus in the suspended
  199. //! state.
  200. //!
  201. //! \note This function should only be called in host mode.
  202. //!
  203. //! \return None.
  204. //
  205. //*****************************************************************************
  206. void
  207. USBHostSuspend(unsigned long ulBase)
  208. {
  209. //
  210. // Check the arguments.
  211. //
  212. ASSERT(ulBase == USB0_BASE);
  213. //
  214. // Send the suspend signaling to the USB bus.
  215. //
  216. HWREGB(ulBase + USB_O_POWER) |= USB_POWER_SUSPEND;
  217. }
  218. //*****************************************************************************
  219. //
  220. //! Handles the USB bus reset condition.
  221. //!
  222. //! \param ulBase specifies the USB module base address.
  223. //! \param bStart specifies whether to start or stop signaling reset on the USB
  224. //! bus.
  225. //!
  226. //! When this function is called with the \e bStart parameter set to \b true,
  227. //! this function will cause the start of a reset condition on the USB bus.
  228. //! The caller should then delay at least 20ms before calling this function
  229. //! again with the \e bStart parameter set to \b false.
  230. //!
  231. //! \note This function should only be called in host mode.
  232. //!
  233. //! \return None.
  234. //
  235. //*****************************************************************************
  236. void
  237. USBHostReset(unsigned long ulBase, tBoolean bStart)
  238. {
  239. //
  240. // Check the arguments.
  241. //
  242. ASSERT(ulBase == USB0_BASE);
  243. //
  244. // Send a reset signal to the bus.
  245. //
  246. if(bStart)
  247. {
  248. HWREGB(ulBase + USB_O_POWER) |= USB_POWER_RESET;
  249. }
  250. else
  251. {
  252. HWREGB(ulBase + USB_O_POWER) &= ~USB_POWER_RESET;
  253. }
  254. }
  255. //*****************************************************************************
  256. //
  257. //! Handles the USB bus resume condition.
  258. //!
  259. //! \param ulBase specifies the USB module base address.
  260. //! \param bStart specifies if the USB controller is entering or leaving the
  261. //! resume signaling state.
  262. //!
  263. //! When in device mode this function will bring the USB controller out of the
  264. //! suspend state. This call should first be made with the \e bStart parameter
  265. //! set to \b true to start resume signaling. The device application should
  266. //! then delay at least 10ms but not more than 15ms before calling this
  267. //! function with the \e bStart parameter set to \b false.
  268. //!
  269. //! When in host mode this function will signal devices to leave the suspend
  270. //! state. This call should first be made with the \e bStart parameter set to
  271. //! \b true to start resume signaling. The host application should then delay
  272. //! at least 20ms before calling this function with the \e bStart parameter set
  273. //! to \b false. This will cause the controller to complete the resume
  274. //! signaling on the USB bus.
  275. //!
  276. //! \return None.
  277. //
  278. //*****************************************************************************
  279. void
  280. USBHostResume(unsigned long ulBase, tBoolean bStart)
  281. {
  282. //
  283. // Check the arguments.
  284. //
  285. ASSERT(ulBase == USB0_BASE);
  286. //
  287. // Send a resume signal to the bus.
  288. //
  289. if(bStart)
  290. {
  291. HWREGB(ulBase + USB_O_POWER) |= USB_POWER_RESUME;
  292. }
  293. else
  294. {
  295. HWREGB(ulBase + USB_O_POWER) &= ~USB_POWER_RESUME;
  296. }
  297. }
  298. //*****************************************************************************
  299. //
  300. //! Returns the current speed of the USB device connected.
  301. //!
  302. //! \param ulBase specifies the USB module base address.
  303. //!
  304. //! This function will return the current speed of the USB bus.
  305. //!
  306. //! \note This function should only be called in host mode.
  307. //!
  308. //! \return Returns either \b USB_LOW_SPEED, \b USB_FULL_SPEED, or
  309. //! \b USB_UNDEF_SPEED.
  310. //
  311. //*****************************************************************************
  312. unsigned long
  313. USBHostSpeedGet(unsigned long ulBase)
  314. {
  315. //
  316. // Check the arguments.
  317. //
  318. ASSERT(ulBase == USB0_BASE);
  319. //
  320. // If the Full Speed device bit is set, then this is a full speed device.
  321. //
  322. if(HWREGB(ulBase + USB_O_DEVCTL) & USB_DEVCTL_FSDEV)
  323. {
  324. return(USB_FULL_SPEED);
  325. }
  326. //
  327. // If the Low Speed device bit is set, then this is a low speed device.
  328. //
  329. if(HWREGB(ulBase + USB_O_DEVCTL) & USB_DEVCTL_LSDEV)
  330. {
  331. return(USB_LOW_SPEED);
  332. }
  333. //
  334. // The device speed is not known.
  335. //
  336. return(USB_UNDEF_SPEED);
  337. }
  338. //*****************************************************************************
  339. //
  340. //! Returns the status of the USB interrupts.
  341. //!
  342. //! \param ulBase specifies the USB module base address.
  343. //!
  344. //! This function will read the source of the interrupt for the USB controller.
  345. //! There are three groups of interrupt sources, IN Endpoints, OUT Endpoints,
  346. //! and general status changes. This call will return the current status for
  347. //! all of these interrupts. The bit values returned should be compared
  348. //! against the \b USB_HOST_IN, \b USB_HOST_OUT, \b USB_HOST_EP0,
  349. //! \b USB_DEV_IN, \b USB_DEV_OUT, and \b USB_DEV_EP0 values.
  350. //!
  351. //! \note This call will clear the source of all of the general status
  352. //! interrupts.
  353. //!
  354. //! \note WARNING: This API cannot be used on endpoint numbers greater than
  355. //! endpoint 3 so USBIntStatusControl() or USBIntStatusEndpoint() should be
  356. //! used instead.
  357. //!
  358. //! \return Returns the status of the sources for the USB controller's
  359. //! interrupt.
  360. //
  361. //*****************************************************************************
  362. #ifndef DEPRECATED
  363. unsigned long
  364. USBIntStatus(unsigned long ulBase)
  365. {
  366. unsigned long ulStatus;
  367. //
  368. // Check the arguments.
  369. //
  370. ASSERT(ulBase == USB0_BASE);
  371. //
  372. // Get the transmit interrupt status.
  373. //
  374. ulStatus = (HWREGB(ulBase + USB_O_TXIS));
  375. //
  376. // Get the receive interrupt status, these bits go into the second byte of
  377. // the returned value.
  378. //
  379. ulStatus |= (HWREGB(ulBase + USB_O_RXIS) << USB_INT_RX_SHIFT);
  380. //
  381. // Get the general interrupt status, these bits go into the upper 8 bits
  382. // of the returned value.
  383. //
  384. ulStatus |= (HWREGB(ulBase + USB_O_IS) << USB_INT_STATUS_SHIFT);
  385. //
  386. // Add the power fault status.
  387. //
  388. if(HWREG(ulBase + USB_O_EPCISC) & USB_EPCISC_PF)
  389. {
  390. //
  391. // Indicate a power fault was detected.
  392. //
  393. ulStatus |= USB_INT_POWER_FAULT;
  394. //
  395. // Clear the power fault interrupt.
  396. //
  397. HWREGB(ulBase + USB_O_EPCISC) |= USB_EPCISC_PF;
  398. }
  399. if(HWREG(USB0_BASE + USB_O_IDVISC) & USB_IDVRIS_ID)
  400. {
  401. //
  402. // Indicate a id detection was detected.
  403. //
  404. ulStatus |= USB_INT_MODE_DETECT;
  405. //
  406. // Clear the id detection interrupt.
  407. //
  408. HWREG(USB0_BASE + USB_O_IDVISC) |= USB_IDVRIS_ID;
  409. }
  410. //
  411. // Return the combined interrupt status.
  412. //
  413. return(ulStatus);
  414. }
  415. #endif
  416. //*****************************************************************************
  417. //
  418. //! Disables the sources for USB interrupts.
  419. //!
  420. //! \param ulBase specifies the USB module base address.
  421. //! \param ulFlags specifies which interrupts to disable.
  422. //!
  423. //! This function will disable the USB controller from generating the
  424. //! interrupts indicated by the \e ulFlags parameter. There are three groups
  425. //! of interrupt sources, IN Endpoints, OUT Endpoints, and general status
  426. //! changes, specified by \b USB_INT_HOST_IN, \b USB_INT_HOST_OUT,
  427. //! \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and \b USB_INT_STATUS. If
  428. //! \b USB_INT_ALL is specified then all interrupts will be disabled.
  429. //!
  430. //! \note WARNING: This API cannot be used on endpoint numbers greater than
  431. //! endpoint 3 so USBIntDisableControl() or USBIntDisableEndpoint() should be
  432. //! used instead.
  433. //!
  434. //! \return None.
  435. //
  436. //*****************************************************************************
  437. #ifndef DEPRECATED
  438. void
  439. USBIntDisable(unsigned long ulBase, unsigned long ulFlags)
  440. {
  441. //
  442. // Check the arguments.
  443. //
  444. ASSERT(ulBase == USB0_BASE);
  445. ASSERT((ulFlags & ~(USB_INT_ALL)) == 0);
  446. //
  447. // If any transmit interrupts were disabled then write the transmit
  448. // interrupt settings out to the hardware.
  449. //
  450. if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0))
  451. {
  452. HWREGH(ulBase + USB_O_TXIE) &=
  453. ~(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0));
  454. }
  455. //
  456. // If any receive interrupts were disabled then write the receive interrupt
  457. // settings out to the hardware.
  458. //
  459. if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
  460. {
  461. HWREGH(ulBase + USB_O_RXIE) &=
  462. ~((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
  463. USB_INT_RX_SHIFT);
  464. }
  465. //
  466. // If any general interrupts were disabled then write the general interrupt
  467. // settings out to the hardware.
  468. //
  469. if(ulFlags & USB_INT_STATUS)
  470. {
  471. HWREGB(ulBase + USB_O_IE) &=
  472. ~((ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT);
  473. }
  474. //
  475. // Disable the power fault interrupt.
  476. //
  477. if(ulFlags & USB_INT_POWER_FAULT)
  478. {
  479. HWREG(ulBase + USB_O_EPCIM) = 0;
  480. }
  481. //
  482. // Disable the ID pin detect interrupt.
  483. //
  484. if(ulFlags & USB_INT_MODE_DETECT)
  485. {
  486. HWREG(USB0_BASE + USB_O_IDVIM) = 0;
  487. }
  488. }
  489. #endif
  490. //*****************************************************************************
  491. //
  492. //! Enables the sources for USB interrupts.
  493. //!
  494. //! \param ulBase specifies the USB module base address.
  495. //! \param ulFlags specifies which interrupts to enable.
  496. //!
  497. //! This function will enable the USB controller's ability to generate the
  498. //! interrupts indicated by the \e ulFlags parameter. There are three
  499. //! groups of interrupt sources, IN Endpoints, OUT Endpoints, and
  500. //! general status changes, specified by \b USB_INT_HOST_IN,
  501. //! \b USB_INT_HOST_OUT, \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and
  502. //! \b USB_STATUS. If \b USB_INT_ALL is specified then all interrupts will be
  503. //! enabled.
  504. //!
  505. //! \note A call must be made to enable the interrupt in the main interrupt
  506. //! controller to receive interrupts. The USBIntRegister() API performs this
  507. //! controller level interrupt enable. However if static interrupt handlers
  508. //! are used then then a call to IntEnable() must be made in order to allow any
  509. //! USB interrupts to occur.
  510. //!
  511. //! \note WARNING: This API cannot be used on endpoint numbers greater than
  512. //! endpoint 3 so USBIntEnableControl() or USBIntEnableEndpoint() should be
  513. //! used instead.
  514. //!
  515. //! \return None.
  516. //
  517. //*****************************************************************************
  518. #ifndef DEPRECATED
  519. void
  520. USBIntEnable(unsigned long ulBase, unsigned long ulFlags)
  521. {
  522. //
  523. // Check the arguments.
  524. //
  525. ASSERT(ulBase == USB0_BASE);
  526. ASSERT((ulFlags & (~USB_INT_ALL)) == 0);
  527. //
  528. // If any transmit interrupts were enabled then write the transmit
  529. // interrupt settings out to the hardware.
  530. //
  531. if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0))
  532. {
  533. HWREGH(ulBase + USB_O_TXIE) |=
  534. ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0);
  535. }
  536. //
  537. // If any receive interrupts were enabled then write the receive interrupt
  538. // settings out to the hardware.
  539. //
  540. if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
  541. {
  542. HWREGH(ulBase + USB_O_RXIE) |=
  543. ((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
  544. USB_INT_RX_SHIFT);
  545. }
  546. //
  547. // If any general interrupts were enabled then write the general interrupt
  548. // settings out to the hardware.
  549. //
  550. if(ulFlags & USB_INT_STATUS)
  551. {
  552. HWREGB(ulBase + USB_O_IE) |=
  553. (ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT;
  554. }
  555. //
  556. // Enable the power fault interrupt.
  557. //
  558. if(ulFlags & USB_INT_POWER_FAULT)
  559. {
  560. HWREG(ulBase + USB_O_EPCIM) = USB_EPCIM_PF;
  561. }
  562. //
  563. // Enable the ID pin detect interrupt.
  564. //
  565. if(ulFlags & USB_INT_MODE_DETECT)
  566. {
  567. HWREG(USB0_BASE + USB_O_IDVIM) = USB_IDVIM_ID;
  568. }
  569. }
  570. #endif
  571. //*****************************************************************************
  572. //
  573. //! Disable control interrupts on a given USB controller.
  574. //!
  575. //! \param ulBase specifies the USB module base address.
  576. //! \param ulFlags specifies which control interrupts to disable.
  577. //!
  578. //! This function will disable the control interrupts for the USB controller
  579. //! specified by the \e ulBase parameter. The \e ulFlags parameter specifies
  580. //! which control interrupts to disable. The flags passed in the \e ulFlags
  581. //! parameters should be the definitions that start with \b USB_INTCTRL_* and
  582. //! not any other \b USB_INT flags.
  583. //!
  584. //! \return None.
  585. //
  586. //*****************************************************************************
  587. void
  588. USBIntDisableControl(unsigned long ulBase, unsigned long ulFlags)
  589. {
  590. //
  591. // Check the arguments.
  592. //
  593. ASSERT(ulBase == USB0_BASE);
  594. ASSERT((ulFlags & ~(USB_INTCTRL_ALL)) == 0);
  595. //
  596. // If any general interrupts were disabled then write the general interrupt
  597. // settings out to the hardware.
  598. //
  599. if(ulFlags & USB_INTCTRL_STATUS)
  600. {
  601. HWREGB(ulBase + USB_O_IE) &= ~(ulFlags & USB_INTCTRL_STATUS);
  602. }
  603. //
  604. // Disable the power fault interrupt.
  605. //
  606. if(ulFlags & USB_INTCTRL_POWER_FAULT)
  607. {
  608. HWREG(ulBase + USB_O_EPCIM) = 0;
  609. }
  610. //
  611. // Disable the ID pin detect interrupt.
  612. //
  613. if(ulFlags & USB_INTCTRL_MODE_DETECT)
  614. {
  615. HWREG(USB0_BASE + USB_O_IDVIM) = 0;
  616. }
  617. }
  618. //*****************************************************************************
  619. //
  620. //! Enable control interrupts on a given USB controller.
  621. //!
  622. //! \param ulBase specifies the USB module base address.
  623. //! \param ulFlags specifies which control interrupts to enable.
  624. //!
  625. //! This function will enable the control interrupts for the USB controller
  626. //! specified by the \e ulBase parameter. The \e ulFlags parameter specifies
  627. //! which control interrupts to enable. The flags passed in the \e ulFlags
  628. //! parameters should be the definitions that start with \b USB_INTCTRL_* and
  629. //! not any other \b USB_INT flags.
  630. //!
  631. //! \return None.
  632. //
  633. //*****************************************************************************
  634. void
  635. USBIntEnableControl(unsigned long ulBase, unsigned long ulFlags)
  636. {
  637. //
  638. // Check the arguments.
  639. //
  640. ASSERT(ulBase == USB0_BASE);
  641. ASSERT((ulFlags & (~USB_INTCTRL_ALL)) == 0);
  642. //
  643. // If any general interrupts were enabled then write the general interrupt
  644. // settings out to the hardware.
  645. //
  646. if(ulFlags & USB_INTCTRL_STATUS)
  647. {
  648. HWREGB(ulBase + USB_O_IE) |= ulFlags;
  649. }
  650. //
  651. // Enable the power fault interrupt.
  652. //
  653. if(ulFlags & USB_INTCTRL_POWER_FAULT)
  654. {
  655. HWREG(ulBase + USB_O_EPCIM) = USB_EPCIM_PF;
  656. }
  657. //
  658. // Enable the ID pin detect interrupt.
  659. //
  660. if(ulFlags & USB_INTCTRL_MODE_DETECT)
  661. {
  662. HWREG(USB0_BASE + USB_O_IDVIM) = USB_IDVIM_ID;
  663. }
  664. }
  665. //*****************************************************************************
  666. //
  667. //! Returns the control interrupt status on a given USB controller.
  668. //!
  669. //! \param ulBase specifies the USB module base address.
  670. //!
  671. //! This function will read control interrupt status for a USB controller.
  672. //! This call will return the current status for control interrupts only, the
  673. //! endpoint interrupt status is retrieved by calling USBIntStatusEndpoint().
  674. //! The bit values returned should be compared against the \b USB_INTCTRL_*
  675. //! values.
  676. //!
  677. //! The following are the meanings of all \b USB_INCTRL_ flags and the modes
  678. //! for which they are valid. These values apply to any calls to
  679. //! USBIntStatusControl(), USBIntEnableControl(), and USBIntDisableConrol().
  680. //! Some of these flags are only valid in the following modes as indicated in
  681. //! the parenthesis: Host, Device, and OTG.
  682. //!
  683. //! - \b USB_INTCTRL_ALL - A full mask of all control interrupt sources.
  684. //! - \b USB_INTCTRL_VBUS_ERR - A VBUS error has occurred (Host Only).
  685. //! - \b USB_INTCTRL_SESSION - Session Start Detected on A-side of cable
  686. //! (OTG Only).
  687. //! - \b USB_INTCTRL_SESSION_END - Session End Detected (Device Only)
  688. //! - \b USB_INTCTRL_DISCONNECT - Device Disconnect Detected (Host Only)
  689. //! - \b USB_INTCTRL_CONNECT - Device Connect Detected (Host Only)
  690. //! - \b USB_INTCTRL_SOF - Start of Frame Detected.
  691. //! - \b USB_INTCTRL_BABBLE - USB controller detected a device signaling past
  692. //! the end of a frame. (Host Only)
  693. //! - \b USB_INTCTRL_RESET - Reset signaling detected by device. (Device Only)
  694. //! - \b USB_INTCTRL_RESUME - Resume signaling detected.
  695. //! - \b USB_INTCTRL_SUSPEND - Suspend signaling detected by device (Device
  696. //! Only)
  697. //! - \b USB_INTCTRL_MODE_DETECT - OTG cable mode detection has completed
  698. //! (OTG Only)
  699. //! - \b USB_INTCTRL_POWER_FAULT - Power Fault detected. (Host Only)
  700. //!
  701. //! \note This call will clear the source of all of the control status
  702. //! interrupts.
  703. //!
  704. //! \return Returns the status of the control interrupts for a USB controller.
  705. //
  706. //*****************************************************************************
  707. unsigned long
  708. USBIntStatusControl(unsigned long ulBase)
  709. {
  710. unsigned long ulStatus;
  711. //
  712. // Check the arguments.
  713. //
  714. ASSERT(ulBase == USB0_BASE);
  715. //
  716. // Get the general interrupt status, these bits go into the upper 8 bits
  717. // of the returned value.
  718. //
  719. ulStatus = HWREGB(ulBase + USB_O_IS);
  720. //
  721. // Add the power fault status.
  722. //
  723. if(HWREG(ulBase + USB_O_EPCISC) & USB_EPCISC_PF)
  724. {
  725. //
  726. // Indicate a power fault was detected.
  727. //
  728. ulStatus |= USB_INTCTRL_POWER_FAULT;
  729. //
  730. // Clear the power fault interrupt.
  731. //
  732. HWREGB(ulBase + USB_O_EPCISC) |= USB_EPCISC_PF;
  733. }
  734. if(HWREG(USB0_BASE + USB_O_IDVISC) & USB_IDVRIS_ID)
  735. {
  736. //
  737. // Indicate a id detection was detected.
  738. //
  739. ulStatus |= USB_INTCTRL_MODE_DETECT;
  740. //
  741. // Clear the id detection interrupt.
  742. //
  743. HWREG(USB0_BASE + USB_O_IDVISC) |= USB_IDVRIS_ID;
  744. }
  745. //
  746. // Return the combined interrupt status.
  747. //
  748. return(ulStatus);
  749. }
  750. //*****************************************************************************
  751. //
  752. //! Disable endpoint interrupts on a given USB controller.
  753. //!
  754. //! \param ulBase specifies the USB module base address.
  755. //! \param ulFlags specifies which endpoint interrupts to disable.
  756. //!
  757. //! This function will disable endpoint interrupts for the USB controller
  758. //! specified by the \e ulBase parameter. The \e ulFlags parameter specifies
  759. //! which endpoint interrupts to disable. The flags passed in the \e ulFlags
  760. //! parameters should be the definitions that start with \b USB_INTEP_* and not
  761. //! any other \b USB_INT flags.
  762. //!
  763. //! \return None.
  764. //
  765. //*****************************************************************************
  766. void
  767. USBIntDisableEndpoint(unsigned long ulBase, unsigned long ulFlags)
  768. {
  769. //
  770. // Check the arguments.
  771. //
  772. ASSERT(ulBase == USB0_BASE);
  773. //
  774. // If any transmit interrupts were disabled then write the transmit
  775. // interrupt settings out to the hardware.
  776. //
  777. HWREGH(ulBase + USB_O_TXIE) &=
  778. ~(ulFlags & (USB_INTEP_HOST_OUT | USB_INTEP_DEV_IN | USB_INTEP_0));
  779. //
  780. // If any receive interrupts were disabled then write the receive interrupt
  781. // settings out to the hardware.
  782. //
  783. HWREGH(ulBase + USB_O_RXIE) &=
  784. ~((ulFlags & (USB_INTEP_HOST_IN | USB_INTEP_DEV_OUT)) >>
  785. USB_INTEP_RX_SHIFT);
  786. }
  787. //*****************************************************************************
  788. //
  789. //! Enable endpoint interrupts on a given USB controller.
  790. //!
  791. //! \param ulBase specifies the USB module base address.
  792. //! \param ulFlags specifies which endpoint interrupts to enable.
  793. //!
  794. //! This function will enable endpoint interrupts for the USB controller
  795. //! specified by the \e ulBase parameter. The \e ulFlags parameter specifies
  796. //! which endpoint interrupts to enable. The flags passed in the \e ulFlags
  797. //! parameters should be the definitions that start with \b USB_INTEP_* and not
  798. //! any other \b USB_INT flags.
  799. //!
  800. //! \return None.
  801. //
  802. //*****************************************************************************
  803. void
  804. USBIntEnableEndpoint(unsigned long ulBase, unsigned long ulFlags)
  805. {
  806. //
  807. // Check the arguments.
  808. //
  809. ASSERT(ulBase == USB0_BASE);
  810. //
  811. // Enable any transmit endpoint interrupts.
  812. //
  813. HWREGH(ulBase + USB_O_TXIE) |=
  814. ulFlags & (USB_INTEP_HOST_OUT | USB_INTEP_DEV_IN | USB_INTEP_0);
  815. //
  816. // Enable any receive endpoint interrupts.
  817. //
  818. HWREGH(ulBase + USB_O_RXIE) |=
  819. ((ulFlags & (USB_INTEP_HOST_IN | USB_INTEP_DEV_OUT)) >>
  820. USB_INTEP_RX_SHIFT);
  821. }
  822. //*****************************************************************************
  823. //
  824. //! Returns the endpoint interrupt status on a given USB controller.
  825. //!
  826. //! \param ulBase specifies the USB module base address.
  827. //!
  828. //! This function will read endpoint interrupt status for a USB controller.
  829. //! This call will return the current status for endpoint interrupts only, the
  830. //! control interrupt status is retrieved by calling USBIntStatusControl().
  831. //! The bit values returned should be compared against the \b USB_INTEP_*
  832. //! values. These are grouped into classes for \b USB_INTEP_HOST_* and
  833. //! \b USB_INTEP_DEV_* values to handle both host and device modes with all
  834. //! endpoints.
  835. //!
  836. //! \note This call will clear the source of all of the endpoint interrupts.
  837. //!
  838. //! \return Returns the status of the endpoint interrupts for a USB controller.
  839. //
  840. //*****************************************************************************
  841. unsigned long
  842. USBIntStatusEndpoint(unsigned long ulBase)
  843. {
  844. unsigned long ulStatus;
  845. //
  846. // Check the arguments.
  847. //
  848. ASSERT(ulBase == USB0_BASE);
  849. //
  850. // Get the transmit interrupt status.
  851. //
  852. ulStatus = HWREGH(ulBase + USB_O_TXIS);
  853. ulStatus |= (HWREGH(ulBase + USB_O_RXIS) << USB_INTEP_RX_SHIFT);
  854. //
  855. // Return the combined interrupt status.
  856. //
  857. return(ulStatus);
  858. }
  859. //*****************************************************************************
  860. //
  861. //! Registers an interrupt handler for the USB controller.
  862. //!
  863. //! \param ulBase specifies the USB module base address.
  864. //! \param pfnHandler is a pointer to the function to be called when a USB
  865. //! interrupt occurs.
  866. //!
  867. //! This sets the handler to be called when a USB interrupt occurs. This will
  868. //! also enable the global USB interrupt in the interrupt controller. The
  869. //! specific desired USB interrupts must be enabled via a separate call to
  870. //! USBIntEnable(). It is the interrupt handler's responsibility to clear the
  871. //! interrupt sources via a calls to USBIntStatusControl() and
  872. //! USBIntStatusEndpoint().
  873. //!
  874. //! \sa IntRegister() for important information about registering interrupt
  875. //! handlers.
  876. //!
  877. //! \return None.
  878. //
  879. //*****************************************************************************
  880. void
  881. USBIntRegister(unsigned long ulBase, void(*pfnHandler)(void))
  882. {
  883. //
  884. // Check the arguments.
  885. //
  886. ASSERT(ulBase == USB0_BASE);
  887. //
  888. // Register the interrupt handler.
  889. //
  890. IntRegister(INT_USB0, pfnHandler);
  891. //
  892. // Enable the USB interrupt.
  893. //
  894. IntEnable(INT_USB0);
  895. }
  896. //*****************************************************************************
  897. //
  898. //! Unregisters an interrupt handler for the USB controller.
  899. //!
  900. //! \param ulBase specifies the USB module base address.
  901. //!
  902. //! This function unregister the interrupt handler. This function will also
  903. //! disable the USB interrupt in the interrupt controller.
  904. //!
  905. //! \sa IntRegister() for important information about registering or
  906. //! unregistering interrupt handlers.
  907. //!
  908. //! \return None.
  909. //
  910. //*****************************************************************************
  911. void
  912. USBIntUnregister(unsigned long ulBase)
  913. {
  914. //
  915. // Check the arguments.
  916. //
  917. ASSERT(ulBase == USB0_BASE);
  918. //
  919. // Unregister the interrupt handler.
  920. //
  921. IntUnregister(INT_USB0);
  922. //
  923. // Disable the CAN interrupt.
  924. //
  925. IntDisable(INT_USB0);
  926. }
  927. //*****************************************************************************
  928. //
  929. //! Returns the current status of an endpoint.
  930. //!
  931. //! \param ulBase specifies the USB module base address.
  932. //! \param ulEndpoint is the endpoint to access.
  933. //!
  934. //! This function will return the status of a given endpoint. If any of these
  935. //! status bits need to be cleared, then these these values must be cleared by
  936. //! calling the USBDevEndpointStatusClear() or USBHostEndpointStatusClear()
  937. //! functions.
  938. //!
  939. //! The following are the status flags for host mode:
  940. //!
  941. //! - \b USB_HOST_IN_PID_ERROR - PID error on the given endpoint.
  942. //! - \b USB_HOST_IN_NOT_COMP - The device failed to respond to an IN request.
  943. //! - \b USB_HOST_IN_STALL - A stall was received on an IN endpoint.
  944. //! - \b USB_HOST_IN_DATA_ERROR - There was a CRC or bit-stuff error on an IN
  945. //! endpoint in Isochronous mode.
  946. //! - \b USB_HOST_IN_NAK_TO - NAKs received on this IN endpoint for more than
  947. //! the specified timeout period.
  948. //! - \b USB_HOST_IN_ERROR - Failed to communicate with a device using this IN
  949. //! endpoint.
  950. //! - \b USB_HOST_IN_FIFO_FULL - This IN endpoint's FIFO is full.
  951. //! - \b USB_HOST_IN_PKTRDY - Data packet ready on this IN endpoint.
  952. //! - \b USB_HOST_OUT_NAK_TO - NAKs received on this OUT endpoint for more than
  953. //! the specified timeout period.
  954. //! - \b USB_HOST_OUT_NOT_COMP - The device failed to respond to an OUT
  955. //! request.
  956. //! - \b USB_HOST_OUT_STALL - A stall was received on this OUT endpoint.
  957. //! - \b USB_HOST_OUT_ERROR - Failed to communicate with a device using this
  958. //! OUT endpoint.
  959. //! - \b USB_HOST_OUT_FIFO_NE - This endpoint's OUT FIFO is not empty.
  960. //! - \b USB_HOST_OUT_PKTPEND - The data transfer on this OUT endpoint has not
  961. //! completed.
  962. //! - \b USB_HOST_EP0_NAK_TO - NAKs received on endpoint zero for more than the
  963. //! specified timeout period.
  964. //! - \b USB_HOST_EP0_ERROR - The device failed to respond to a request on
  965. //! endpoint zero.
  966. //! - \b USB_HOST_EP0_IN_STALL - A stall was received on endpoint zero for an
  967. //! IN transaction.
  968. //! - \b USB_HOST_EP0_IN_PKTRDY - Data packet ready on endpoint zero for an IN
  969. //! transaction.
  970. //!
  971. //! The following are the status flags for device mode:
  972. //!
  973. //! - \b USB_DEV_OUT_SENT_STALL - A stall was sent on this OUT endpoint.
  974. //! - \b USB_DEV_OUT_DATA_ERROR - There was a CRC or bit-stuff error on an OUT
  975. //! endpoint.
  976. //! - \b USB_DEV_OUT_OVERRUN - An OUT packet was not loaded due to a full FIFO.
  977. //! - \b USB_DEV_OUT_FIFO_FULL - The OUT endpoint's FIFO is full.
  978. //! - \b USB_DEV_OUT_PKTRDY - There is a data packet ready in the OUT
  979. //! endpoint's FIFO.
  980. //! - \b USB_DEV_IN_NOT_COMP - A larger packet was split up, more data to come.
  981. //! - \b USB_DEV_IN_SENT_STALL - A stall was sent on this IN endpoint.
  982. //! - \b USB_DEV_IN_UNDERRUN - Data was requested on the IN endpoint and no
  983. //! data was ready.
  984. //! - \b USB_DEV_IN_FIFO_NE - The IN endpoint's FIFO is not empty.
  985. //! - \b USB_DEV_IN_PKTPEND - The data transfer on this IN endpoint has not
  986. //! completed.
  987. //! - \b USB_DEV_EP0_SETUP_END - A control transaction ended before Data End
  988. //! condition was sent.
  989. //! - \b USB_DEV_EP0_SENT_STALL - A stall was sent on endpoint zero.
  990. //! - \b USB_DEV_EP0_IN_PKTPEND - The data transfer on endpoint zero has not
  991. //! completed.
  992. //! - \b USB_DEV_EP0_OUT_PKTRDY - There is a data packet ready in endpoint
  993. //! zero's OUT FIFO.
  994. //!
  995. //! \return The current status flags for the endpoint depending on mode.
  996. //
  997. //*****************************************************************************
  998. unsigned long
  999. USBEndpointStatus(unsigned long ulBase, unsigned long ulEndpoint)
  1000. {
  1001. unsigned long ulStatus;
  1002. //
  1003. // Check the arguments.
  1004. //
  1005. ASSERT(ulBase == USB0_BASE);
  1006. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1007. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1008. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1009. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1010. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1011. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1012. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1013. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1014. //
  1015. // Get the TX portion of the endpoint status.
  1016. //
  1017. ulStatus = HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1);
  1018. //
  1019. // Get the RX portion of the endpoint status.
  1020. //
  1021. ulStatus |= ((HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1)) <<
  1022. USB_RX_EPSTATUS_SHIFT);
  1023. //
  1024. // Return the endpoint status.
  1025. //
  1026. return(ulStatus);
  1027. }
  1028. //*****************************************************************************
  1029. //
  1030. //! Clears the status bits in this endpoint in host mode.
  1031. //!
  1032. //! \param ulBase specifies the USB module base address.
  1033. //! \param ulEndpoint is the endpoint to access.
  1034. //! \param ulFlags are the status bits that will be cleared.
  1035. //!
  1036. //! This function will clear the status of any bits that are passed in the
  1037. //! \e ulFlags parameter. The \e ulFlags parameter can take the value returned
  1038. //! from the USBEndpointStatus() call.
  1039. //!
  1040. //! \note This function should only be called in host mode.
  1041. //!
  1042. //! \return None.
  1043. //
  1044. //*****************************************************************************
  1045. void
  1046. USBHostEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
  1047. unsigned long ulFlags)
  1048. {
  1049. //
  1050. // Check the arguments.
  1051. //
  1052. ASSERT(ulBase == USB0_BASE);
  1053. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1054. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1055. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1056. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1057. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1058. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1059. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1060. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1061. //
  1062. // Clear the specified flags for the endpoint.
  1063. //
  1064. if(ulEndpoint == USB_EP_0)
  1065. {
  1066. HWREGB(ulBase + USB_O_CSRL0) &= ~ulFlags;
  1067. }
  1068. else
  1069. {
  1070. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &= ~ulFlags;
  1071. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  1072. ~(ulFlags >> USB_RX_EPSTATUS_SHIFT);
  1073. }
  1074. }
  1075. //*****************************************************************************
  1076. //
  1077. //! Clears the status bits in this endpoint in device mode.
  1078. //!
  1079. //! \param ulBase specifies the USB module base address.
  1080. //! \param ulEndpoint is the endpoint to access.
  1081. //! \param ulFlags are the status bits that will be cleared.
  1082. //!
  1083. //! This function will clear the status of any bits that are passed in the
  1084. //! \e ulFlags parameter. The \e ulFlags parameter can take the value returned
  1085. //! from the USBEndpointStatus() call.
  1086. //!
  1087. //! \note This function should only be called in device mode.
  1088. //!
  1089. //! \return None.
  1090. //
  1091. //*****************************************************************************
  1092. void
  1093. USBDevEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
  1094. unsigned long ulFlags)
  1095. {
  1096. //
  1097. // Check the arguments.
  1098. //
  1099. ASSERT(ulBase == USB0_BASE);
  1100. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1101. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1102. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1103. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1104. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1105. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1106. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1107. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1108. //
  1109. // If this is endpoint 0 then the bits have different meaning and map into
  1110. // the TX memory location.
  1111. //
  1112. if(ulEndpoint == USB_EP_0)
  1113. {
  1114. //
  1115. // Set the Serviced RxPktRdy bit to clear the RxPktRdy.
  1116. //
  1117. if(ulFlags & USB_DEV_EP0_OUT_PKTRDY)
  1118. {
  1119. HWREGB(ulBase + USB_O_CSRL0) |= USB_CSRL0_RXRDYC;
  1120. }
  1121. //
  1122. // Set the serviced Setup End bit to clear the SetupEnd status.
  1123. //
  1124. if(ulFlags & USB_DEV_EP0_SETUP_END)
  1125. {
  1126. HWREGB(ulBase + USB_O_CSRL0) |= USB_CSRL0_SETENDC;
  1127. }
  1128. //
  1129. // Clear the Sent Stall status flag.
  1130. //
  1131. if(ulFlags & USB_DEV_EP0_SENT_STALL)
  1132. {
  1133. HWREGB(ulBase + USB_O_CSRL0) &= ~(USB_DEV_EP0_SENT_STALL);
  1134. }
  1135. }
  1136. else
  1137. {
  1138. //
  1139. // Clear out any TX flags that were passed in. Only
  1140. // USB_DEV_TX_SENT_STALL and USB_DEV_TX_UNDERRUN should be cleared.
  1141. //
  1142. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  1143. ~(ulFlags & (USB_DEV_TX_SENT_STALL | USB_DEV_TX_UNDERRUN));
  1144. //
  1145. // Clear out valid RX flags that were passed in. Only
  1146. // USB_DEV_RX_SENT_STALL, USB_DEV_RX_DATA_ERROR, and USB_DEV_RX_OVERRUN
  1147. // should be cleared.
  1148. //
  1149. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  1150. ~((ulFlags & (USB_DEV_RX_SENT_STALL | USB_DEV_RX_DATA_ERROR |
  1151. USB_DEV_RX_OVERRUN)) >> USB_RX_EPSTATUS_SHIFT);
  1152. }
  1153. }
  1154. //*****************************************************************************
  1155. //
  1156. //! Sets the value data toggle on an endpoint in host mode.
  1157. //!
  1158. //! \param ulBase specifies the USB module base address.
  1159. //! \param ulEndpoint specifies the endpoint to reset the data toggle.
  1160. //! \param bDataToggle specifies whether to set the state to DATA0 or DATA1.
  1161. //! \param ulFlags specifies whether to set the IN or OUT endpoint.
  1162. //!
  1163. //! This function is used to force the state of the data toggle in host mode.
  1164. //! If the value passed in the \e bDataToggle parameter is \b false, then the
  1165. //! data toggle will be set to the DATA0 state, and if it is \b true it will be
  1166. //! set to the DATA1 state. The \e ulFlags parameter can be \b USB_EP_HOST_IN
  1167. //! or \b USB_EP_HOST_OUT to access the desired portion of this endpoint. The
  1168. //! \e ulFlags parameter is ignored for endpoint zero.
  1169. //!
  1170. //! \note This function should only be called in host mode.
  1171. //!
  1172. //! \return None.
  1173. //
  1174. //*****************************************************************************
  1175. void
  1176. USBHostEndpointDataToggle(unsigned long ulBase, unsigned long ulEndpoint,
  1177. tBoolean bDataToggle, unsigned long ulFlags)
  1178. {
  1179. unsigned long ulDataToggle;
  1180. //
  1181. // Check the arguments.
  1182. //
  1183. ASSERT(ulBase == USB0_BASE);
  1184. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1185. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1186. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1187. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1188. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1189. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1190. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1191. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1192. //
  1193. // The data toggle defaults to DATA0.
  1194. //
  1195. ulDataToggle = 0;
  1196. //
  1197. // See if the data toggle should be set to DATA1.
  1198. //
  1199. if(bDataToggle)
  1200. {
  1201. //
  1202. // Select the data toggle bit based on the endpoint.
  1203. //
  1204. if(ulEndpoint == USB_EP_0)
  1205. {
  1206. ulDataToggle = USB_CSRH0_DT;
  1207. }
  1208. else if(ulFlags == USB_EP_HOST_IN)
  1209. {
  1210. ulDataToggle = USB_RXCSRH1_DT;
  1211. }
  1212. else
  1213. {
  1214. ulDataToggle = USB_TXCSRH1_DT;
  1215. }
  1216. }
  1217. //
  1218. // Set the data toggle based on the endpoint.
  1219. //
  1220. if(ulEndpoint == USB_EP_0)
  1221. {
  1222. //
  1223. // Set the write enable and the bit value for endpoint zero.
  1224. //
  1225. HWREGB(ulBase + USB_O_CSRH0) =
  1226. ((HWREGB(ulBase + USB_O_CSRH0) &
  1227. ~(USB_CSRH0_DTWE | USB_CSRH0_DT)) |
  1228. (ulDataToggle | USB_CSRH0_DTWE));
  1229. }
  1230. else if(ulFlags == USB_EP_HOST_IN)
  1231. {
  1232. //
  1233. // Set the Write enable and the bit value for an IN endpoint.
  1234. //
  1235. HWREGB(ulBase + USB_O_RXCSRH1 + EP_OFFSET(ulEndpoint)) =
  1236. ((HWREGB(ulBase + USB_O_RXCSRH1 + EP_OFFSET(ulEndpoint)) &
  1237. ~(USB_RXCSRH1_DTWE | USB_RXCSRH1_DT)) |
  1238. (ulDataToggle | USB_RXCSRH1_DTWE));
  1239. }
  1240. else
  1241. {
  1242. //
  1243. // Set the Write enable and the bit value for an OUT endpoint.
  1244. //
  1245. HWREGB(ulBase + USB_O_TXCSRH1 + EP_OFFSET(ulEndpoint)) =
  1246. ((HWREGB(ulBase + USB_O_TXCSRH1 + EP_OFFSET(ulEndpoint)) &
  1247. ~(USB_TXCSRH1_DTWE | USB_TXCSRH1_DT)) |
  1248. (ulDataToggle | USB_TXCSRH1_DTWE));
  1249. }
  1250. }
  1251. //*****************************************************************************
  1252. //
  1253. //! Sets the Data toggle on an endpoint to zero.
  1254. //!
  1255. //! \param ulBase specifies the USB module base address.
  1256. //! \param ulEndpoint specifies the endpoint to reset the data toggle.
  1257. //! \param ulFlags specifies whether to access the IN or OUT endpoint.
  1258. //!
  1259. //! This function will cause the controller to clear the data toggle for an
  1260. //! endpoint. This call is not valid for endpoint zero and can be made with
  1261. //! host or device controllers.
  1262. //!
  1263. //! The \e ulFlags parameter should be one of \b USB_EP_HOST_OUT,
  1264. //! \b USB_EP_HOST_IN, \b USB_EP_DEV_OUT, or \b USB_EP_DEV_IN.
  1265. //!
  1266. //! \return None.
  1267. //
  1268. //*****************************************************************************
  1269. void
  1270. USBEndpointDataToggleClear(unsigned long ulBase, unsigned long ulEndpoint,
  1271. unsigned long ulFlags)
  1272. {
  1273. //
  1274. // Check the arguments.
  1275. //
  1276. ASSERT(ulBase == USB0_BASE);
  1277. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  1278. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  1279. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  1280. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  1281. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  1282. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  1283. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  1284. (ulEndpoint == USB_EP_15));
  1285. //
  1286. // See if the transmit or receive data toggle should be cleared.
  1287. //
  1288. if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
  1289. {
  1290. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1291. USB_TXCSRL1_CLRDT;
  1292. }
  1293. else
  1294. {
  1295. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1296. USB_RXCSRL1_CLRDT;
  1297. }
  1298. }
  1299. //*****************************************************************************
  1300. //
  1301. //! Stalls the specified endpoint in device mode.
  1302. //!
  1303. //! \param ulBase specifies the USB module base address.
  1304. //! \param ulEndpoint specifies the endpoint to stall.
  1305. //! \param ulFlags specifies whether to stall the IN or OUT endpoint.
  1306. //!
  1307. //! This function will cause to endpoint number passed in to go into a stall
  1308. //! condition. If the \e ulFlags parameter is \b USB_EP_DEV_IN then the stall
  1309. //! will be issued on the IN portion of this endpoint. If the \e ulFlags
  1310. //! parameter is \b USB_EP_DEV_OUT then the stall will be issued on the OUT
  1311. //! portion of this endpoint.
  1312. //!
  1313. //! \note This function should only be called in device mode.
  1314. //!
  1315. //! \return None.
  1316. //
  1317. //*****************************************************************************
  1318. void
  1319. USBDevEndpointStall(unsigned long ulBase, unsigned long ulEndpoint,
  1320. unsigned long ulFlags)
  1321. {
  1322. //
  1323. // Check the arguments.
  1324. //
  1325. ASSERT(ulBase == USB0_BASE);
  1326. ASSERT((ulFlags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0)
  1327. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1328. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1329. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1330. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1331. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1332. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1333. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1334. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1335. //
  1336. // Determine how to stall this endpoint.
  1337. //
  1338. if(ulEndpoint == USB_EP_0)
  1339. {
  1340. //
  1341. // Perform a stall on endpoint zero.
  1342. //
  1343. HWREGB(ulBase + USB_O_CSRL0) |=
  1344. (USB_CSRL0_STALL | USB_CSRL0_RXRDYC);
  1345. }
  1346. else if(ulFlags == USB_EP_DEV_IN)
  1347. {
  1348. //
  1349. // Perform a stall on an IN endpoint.
  1350. //
  1351. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1352. USB_TXCSRL1_STALL;
  1353. }
  1354. else
  1355. {
  1356. //
  1357. // Perform a stall on an OUT endpoint.
  1358. //
  1359. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1360. USB_RXCSRL1_STALL;
  1361. }
  1362. }
  1363. //*****************************************************************************
  1364. //
  1365. //! Clears the stall condition on the specified endpoint in device mode.
  1366. //!
  1367. //! \param ulBase specifies the USB module base address.
  1368. //! \param ulEndpoint specifies which endpoint to remove the stall condition.
  1369. //! \param ulFlags specifies whether to remove the stall condition from the IN
  1370. //! or the OUT portion of this endpoint.
  1371. //!
  1372. //! This function will cause the endpoint number passed in to exit the stall
  1373. //! condition. If the \e ulFlags parameter is \b USB_EP_DEV_IN then the stall
  1374. //! will be cleared on the IN portion of this endpoint. If the \e ulFlags
  1375. //! parameter is \b USB_EP_DEV_OUT then the stall will be cleared on the OUT
  1376. //! portion of this endpoint.
  1377. //!
  1378. //! \note This function should only be called in device mode.
  1379. //!
  1380. //! \return None.
  1381. //
  1382. //*****************************************************************************
  1383. void
  1384. USBDevEndpointStallClear(unsigned long ulBase, unsigned long ulEndpoint,
  1385. unsigned long ulFlags)
  1386. {
  1387. //
  1388. // Check the arguments.
  1389. //
  1390. ASSERT(ulBase == USB0_BASE);
  1391. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1392. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1393. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1394. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1395. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1396. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1397. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1398. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1399. ASSERT((ulFlags & ~(USB_EP_DEV_IN | USB_EP_DEV_OUT)) == 0)
  1400. //
  1401. // Determine how to clear the stall on this endpoint.
  1402. //
  1403. if(ulEndpoint == USB_EP_0)
  1404. {
  1405. //
  1406. // Clear the stall on endpoint zero.
  1407. //
  1408. HWREGB(ulBase + USB_O_CSRL0) &= ~USB_CSRL0_STALLED;
  1409. }
  1410. else if(ulFlags == USB_EP_DEV_IN)
  1411. {
  1412. //
  1413. // Clear the stall on an IN endpoint.
  1414. //
  1415. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  1416. ~(USB_TXCSRL1_STALL | USB_TXCSRL1_STALLED);
  1417. //
  1418. // Reset the data toggle.
  1419. //
  1420. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1421. USB_TXCSRL1_CLRDT;
  1422. }
  1423. else
  1424. {
  1425. //
  1426. // Clear the stall on an OUT endpoint.
  1427. //
  1428. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  1429. ~(USB_RXCSRL1_STALL | USB_RXCSRL1_STALLED);
  1430. //
  1431. // Reset the data toggle.
  1432. //
  1433. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  1434. USB_RXCSRL1_CLRDT;
  1435. }
  1436. }
  1437. //*****************************************************************************
  1438. //
  1439. //! Connects the USB controller to the bus in device mode.
  1440. //!
  1441. //! \param ulBase specifies the USB module base address.
  1442. //!
  1443. //! This function will cause the soft connect feature of the USB controller to
  1444. //! be enabled. Call USBDisconnect() to remove the USB device from the bus.
  1445. //!
  1446. //! \note This function should only be called in device mode.
  1447. //!
  1448. //! \return None.
  1449. //
  1450. //*****************************************************************************
  1451. void
  1452. USBDevConnect(unsigned long ulBase)
  1453. {
  1454. //
  1455. // Check the arguments.
  1456. //
  1457. ASSERT(ulBase == USB0_BASE);
  1458. //
  1459. // Enable connection to the USB bus.
  1460. //
  1461. HWREGB(ulBase + USB_O_POWER) |= USB_POWER_SOFTCONN;
  1462. }
  1463. //*****************************************************************************
  1464. //
  1465. //! Removes the USB controller from the bus in device mode.
  1466. //!
  1467. //! \param ulBase specifies the USB module base address.
  1468. //!
  1469. //! This function will cause the soft connect feature of the USB controller to
  1470. //! remove the device from the USB bus. A call to USBDevConnect() is needed to
  1471. //! reconnect to the bus.
  1472. //!
  1473. //! \note This function should only be called in device mode.
  1474. //!
  1475. //! \return None.
  1476. //
  1477. //*****************************************************************************
  1478. void
  1479. USBDevDisconnect(unsigned long ulBase)
  1480. {
  1481. //
  1482. // Check the arguments.
  1483. //
  1484. ASSERT(ulBase == USB0_BASE);
  1485. //
  1486. // Disable connection to the USB bus.
  1487. //
  1488. HWREGB(ulBase + USB_O_POWER) &= (~USB_POWER_SOFTCONN);
  1489. }
  1490. //*****************************************************************************
  1491. //
  1492. //! Sets the address in device mode.
  1493. //!
  1494. //! \param ulBase specifies the USB module base address.
  1495. //! \param ulAddress is the address to use for a device.
  1496. //!
  1497. //! This function will set the device address on the USB bus. This address was
  1498. //! likely received via a SET ADDRESS command from the host controller.
  1499. //!
  1500. //! \note This function should only be called in device mode.
  1501. //!
  1502. //! \return None.
  1503. //
  1504. //*****************************************************************************
  1505. void
  1506. USBDevAddrSet(unsigned long ulBase, unsigned long ulAddress)
  1507. {
  1508. //
  1509. // Check the arguments.
  1510. //
  1511. ASSERT(ulBase == USB0_BASE);
  1512. //
  1513. // Set the function address in the correct location.
  1514. //
  1515. HWREGB(ulBase + USB_O_FADDR) = (unsigned char)ulAddress;
  1516. }
  1517. //*****************************************************************************
  1518. //
  1519. //! Returns the current device address in device mode.
  1520. //!
  1521. //! \param ulBase specifies the USB module base address.
  1522. //!
  1523. //! This function will return the current device address. This address was set
  1524. //! by a call to USBDevAddrSet().
  1525. //!
  1526. //! \note This function should only be called in device mode.
  1527. //!
  1528. //! \return The current device address.
  1529. //
  1530. //*****************************************************************************
  1531. unsigned long
  1532. USBDevAddrGet(unsigned long ulBase)
  1533. {
  1534. //
  1535. // Check the arguments.
  1536. //
  1537. ASSERT(ulBase == USB0_BASE);
  1538. //
  1539. // Return the function address.
  1540. //
  1541. return(HWREGB(ulBase + USB_O_FADDR));
  1542. }
  1543. //*****************************************************************************
  1544. //
  1545. //! Sets the base configuration for a host endpoint.
  1546. //!
  1547. //! \param ulBase specifies the USB module base address.
  1548. //! \param ulEndpoint is the endpoint to access.
  1549. //! \param ulMaxPayload is the maximum payload for this endpoint.
  1550. //! \param ulNAKPollInterval is the either the NAK timeout limit or the polling
  1551. //! interval depending on the type of endpoint.
  1552. //! \param ulTargetEndpoint is the endpoint that the host endpoint is
  1553. //! targeting.
  1554. //! \param ulFlags are used to configure other endpoint settings.
  1555. //!
  1556. //! This function will set the basic configuration for the transmit or receive
  1557. //! portion of an endpoint in host mode. The \e ulFlags parameter determines
  1558. //! some of the configuration while the other parameters provide the rest. The
  1559. //! \e ulFlags parameter determines whether this is an IN endpoint
  1560. //! (USB_EP_HOST_IN or USB_EP_DEV_IN) or an OUT endpoint (USB_EP_HOST_OUT or
  1561. //! USB_EP_DEV_OUT), whether this is a Full speed endpoint (USB_EP_SPEED_FULL)
  1562. //! or a Low speed endpoint (USB_EP_SPEED_LOW).
  1563. //!
  1564. //! The \b USB_EP_MODE_ flags control the type of the endpoint.
  1565. //! - \b USB_EP_MODE_CTRL is a control endpoint.
  1566. //! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
  1567. //! - \b USB_EP_MODE_BULK is a bulk endpoint.
  1568. //! - \b USB_EP_MODE_INT is an interrupt endpoint.
  1569. //!
  1570. //! The \e ulNAKPollInterval parameter has different meanings based on the
  1571. //! \b USB_EP_MODE value and whether or not this call is being made for
  1572. //! endpoint zero or another endpoint. For endpoint zero or any Bulk
  1573. //! endpoints, this value always indicates the number of frames to allow a
  1574. //! device to NAK before considering it a timeout. If this endpoint is an
  1575. //! isochronous or interrupt endpoint, this value is the polling interval for
  1576. //! this endpoint.
  1577. //!
  1578. //! For interrupt endpoints the polling interval is simply the number of
  1579. //! frames between polling an interrupt endpoint. For isochronous endpoints
  1580. //! this value represents a polling interval of 2 ^ (\e ulNAKPollInterval - 1)
  1581. //! frames. When used as a NAK timeout, the \e ulNAKPollInterval value
  1582. //! specifies 2 ^ (\e ulNAKPollInterval - 1) frames before issuing a time out.
  1583. //! There are two special time out values that can be specified when setting
  1584. //! the \e ulNAKPollInterval value. The first is \b MAX_NAK_LIMIT which is the
  1585. //! maximum value that can be passed in this variable. The other is
  1586. //! \b DISABLE_NAK_LIMIT which indicates that there should be no limit on the
  1587. //! number of NAKs.
  1588. //!
  1589. //! The \b USB_EP_DMA_MODE_ flags enables the type of DMA used to access the
  1590. //! endpoint's data FIFOs. The choice of the DMA mode depends on how the DMA
  1591. //! controller is configured and how it is being used. See the ``Using USB
  1592. //! with the uDMA Controller'' section for more information on DMA
  1593. //! configuration.
  1594. //!
  1595. //! When configuring the OUT portion of an endpoint, the \b USB_EP_AUTO_SET bit
  1596. //! is specified to cause the transmission of data on the USB bus to start
  1597. //! as soon as the number of bytes specified by \e ulMaxPayload have been
  1598. //! written into the OUT FIFO for this endpoint.
  1599. //!
  1600. //! When configuring the IN portion of an endpoint, the \b USB_EP_AUTO_REQUEST
  1601. //! bit can be specified to trigger the request for more data once the FIFO has
  1602. //! been drained enough to fit \e ulMaxPayload bytes. The \b USB_EP_AUTO_CLEAR
  1603. //! bit can be used to clear the data packet ready flag automatically once the
  1604. //! data has been read from the FIFO. If this is not used, this flag must be
  1605. //! manually cleared via a call to USBDevEndpointStatusClear() or
  1606. //! USBHostEndpointStatusClear().
  1607. //!
  1608. //! \note This function should only be called in host mode.
  1609. //!
  1610. //! \return None.
  1611. //
  1612. //*****************************************************************************
  1613. void
  1614. USBHostEndpointConfig(unsigned long ulBase, unsigned long ulEndpoint,
  1615. unsigned long ulMaxPayload,
  1616. unsigned long ulNAKPollInterval,
  1617. unsigned long ulTargetEndpoint, unsigned long ulFlags)
  1618. {
  1619. unsigned long ulRegister;
  1620. //
  1621. // Check the arguments.
  1622. //
  1623. ASSERT(ulBase == USB0_BASE);
  1624. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  1625. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  1626. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  1627. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  1628. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  1629. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  1630. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  1631. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  1632. ASSERT(ulNAKPollInterval <= MAX_NAK_LIMIT);
  1633. //
  1634. // Endpoint zero is configured differently than the other endpoints, so see
  1635. // if this is endpoint zero.
  1636. //
  1637. if(ulEndpoint == USB_EP_0)
  1638. {
  1639. //
  1640. // Set the NAK timeout.
  1641. //
  1642. HWREGB(ulBase + USB_O_NAKLMT) = ulNAKPollInterval;
  1643. //
  1644. // Set the transfer type information.
  1645. //
  1646. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TYPE0) =
  1647. ((ulFlags & USB_EP_SPEED_FULL) ? USB_TYPE0_SPEED_FULL :
  1648. USB_TYPE0_SPEED_LOW);
  1649. }
  1650. else
  1651. {
  1652. //
  1653. // Start with the target endpoint.
  1654. //
  1655. ulRegister = ulTargetEndpoint;
  1656. //
  1657. // Set the speed for the device using this endpoint.
  1658. //
  1659. if(ulFlags & USB_EP_SPEED_FULL)
  1660. {
  1661. ulRegister |= USB_TXTYPE1_SPEED_FULL;
  1662. }
  1663. else
  1664. {
  1665. ulRegister |= USB_TXTYPE1_SPEED_LOW;
  1666. }
  1667. //
  1668. // Set the protocol for the device using this endpoint.
  1669. //
  1670. switch(ulFlags & USB_EP_MODE_MASK)
  1671. {
  1672. //
  1673. // The bulk protocol is being used.
  1674. //
  1675. case USB_EP_MODE_BULK:
  1676. {
  1677. ulRegister |= USB_TXTYPE1_PROTO_BULK;
  1678. break;
  1679. }
  1680. //
  1681. // The isochronous protocol is being used.
  1682. //
  1683. case USB_EP_MODE_ISOC:
  1684. {
  1685. ulRegister |= USB_TXTYPE1_PROTO_ISOC;
  1686. break;
  1687. }
  1688. //
  1689. // The interrupt protocol is being used.
  1690. //
  1691. case USB_EP_MODE_INT:
  1692. {
  1693. ulRegister |= USB_TXTYPE1_PROTO_INT;
  1694. break;
  1695. }
  1696. //
  1697. // The control protocol is being used.
  1698. //
  1699. case USB_EP_MODE_CTRL:
  1700. {
  1701. ulRegister |= USB_TXTYPE1_PROTO_CTRL;
  1702. break;
  1703. }
  1704. }
  1705. //
  1706. // See if the transmit or receive endpoint is being configured.
  1707. //
  1708. if(ulFlags & USB_EP_HOST_OUT)
  1709. {
  1710. //
  1711. // Set the transfer type information.
  1712. //
  1713. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXTYPE1) =
  1714. ulRegister;
  1715. //
  1716. // Set the NAK timeout or polling interval.
  1717. //
  1718. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXINTERVAL1) =
  1719. ulNAKPollInterval;
  1720. //
  1721. // Set the Maximum Payload per transaction.
  1722. //
  1723. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
  1724. ulMaxPayload;
  1725. //
  1726. // Set the transmit control value to zero.
  1727. //
  1728. ulRegister = 0;
  1729. //
  1730. // Allow auto setting of TxPktRdy when max packet size has been
  1731. // loaded into the FIFO.
  1732. //
  1733. if(ulFlags & USB_EP_AUTO_SET)
  1734. {
  1735. ulRegister |= USB_TXCSRH1_AUTOSET;
  1736. }
  1737. //
  1738. // Configure the DMA Mode.
  1739. //
  1740. if(ulFlags & USB_EP_DMA_MODE_1)
  1741. {
  1742. ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
  1743. }
  1744. else if(ulFlags & USB_EP_DMA_MODE_0)
  1745. {
  1746. ulRegister |= USB_TXCSRH1_DMAEN;
  1747. }
  1748. //
  1749. // Write out the transmit control value.
  1750. //
  1751. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
  1752. (unsigned char)ulRegister;
  1753. }
  1754. else
  1755. {
  1756. //
  1757. // Set the transfer type information.
  1758. //
  1759. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXTYPE1) =
  1760. ulRegister;
  1761. //
  1762. // Set the NAK timeout or polling interval.
  1763. //
  1764. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXINTERVAL1) =
  1765. ulNAKPollInterval;
  1766. //
  1767. // Set the receive control value to zero.
  1768. //
  1769. ulRegister = 0;
  1770. //
  1771. // Allow auto clearing of RxPktRdy when packet of size max packet
  1772. // has been unloaded from the FIFO.
  1773. //
  1774. if(ulFlags & USB_EP_AUTO_CLEAR)
  1775. {
  1776. ulRegister |= USB_RXCSRH1_AUTOCL;
  1777. }
  1778. //
  1779. // Configure the DMA Mode.
  1780. //
  1781. if(ulFlags & USB_EP_DMA_MODE_1)
  1782. {
  1783. ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
  1784. }
  1785. else if(ulFlags & USB_EP_DMA_MODE_0)
  1786. {
  1787. ulRegister |= USB_RXCSRH1_DMAEN;
  1788. }
  1789. //
  1790. // Write out the receive control value.
  1791. //
  1792. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
  1793. (unsigned char)ulRegister;
  1794. }
  1795. }
  1796. }
  1797. //*****************************************************************************
  1798. //
  1799. //! Sets the configuration for an endpoint.
  1800. //!
  1801. //! \param ulBase specifies the USB module base address.
  1802. //! \param ulEndpoint is the endpoint to access.
  1803. //! \param ulMaxPacketSize is the maximum packet size for this endpoint.
  1804. //! \param ulFlags are used to configure other endpoint settings.
  1805. //!
  1806. //! This function will set the basic configuration for an endpoint in device
  1807. //! mode. Endpoint zero does not have a dynamic configuration, so this
  1808. //! function should not be called for endpoint zero. The \e ulFlags parameter
  1809. //! determines some of the configuration while the other parameters provide the
  1810. //! rest.
  1811. //!
  1812. //! The \b USB_EP_MODE_ flags define what the type is for the given endpoint.
  1813. //!
  1814. //! - \b USB_EP_MODE_CTRL is a control endpoint.
  1815. //! - \b USB_EP_MODE_ISOC is an isochronous endpoint.
  1816. //! - \b USB_EP_MODE_BULK is a bulk endpoint.
  1817. //! - \b USB_EP_MODE_INT is an interrupt endpoint.
  1818. //!
  1819. //! The \b USB_EP_DMA_MODE_ flags determines the type of DMA access to the
  1820. //! endpoint data FIFOs. The choice of the DMA mode depends on how the DMA
  1821. //! controller is configured and how it is being used. See the ``Using USB
  1822. //! with the uDMA Controller'' section for more information on DMA
  1823. //! configuration.
  1824. //!
  1825. //! When configuring an IN endpoint, the \b USB_EP_AUTO_SET bit can be
  1826. //! specified to cause the automatic transmission of data on the USB bus as
  1827. //! soon as \e ulMaxPacketSize bytes of data are written into the FIFO for
  1828. //! this endpoint. This is commonly used with DMA as no interaction is
  1829. //! required to start the transmission of data.
  1830. //!
  1831. //! When configuring an OUT endpoint, the \b USB_EP_AUTO_REQUEST bit is
  1832. //! specified to trigger the request for more data once the FIFO has been
  1833. //! drained enough to receive \e ulMaxPacketSize more bytes of data. Also for
  1834. //! OUT endpoints, the \b USB_EP_AUTO_CLEAR bit can be used to clear the data
  1835. //! packet ready flag automatically once the data has been read from the FIFO.
  1836. //! If this is not used, this flag must be manually cleared via a call to
  1837. //! USBDevEndpointStatusClear(). Both of these settings can be used to remove
  1838. //! the need for extra calls when using the controller in DMA mode.
  1839. //!
  1840. //! \note This function should only be called in device mode.
  1841. //!
  1842. //! \return None.
  1843. //
  1844. //*****************************************************************************
  1845. void
  1846. USBDevEndpointConfigSet(unsigned long ulBase, unsigned long ulEndpoint,
  1847. unsigned long ulMaxPacketSize, unsigned long ulFlags)
  1848. {
  1849. unsigned long ulRegister;
  1850. //
  1851. // Check the arguments.
  1852. //
  1853. ASSERT(ulBase == USB0_BASE);
  1854. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  1855. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  1856. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  1857. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  1858. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  1859. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  1860. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  1861. (ulEndpoint == USB_EP_15));
  1862. //
  1863. // Determine if a transmit or receive endpoint is being configured.
  1864. //
  1865. if(ulFlags & USB_EP_DEV_IN)
  1866. {
  1867. //
  1868. // Set the maximum packet size.
  1869. //
  1870. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXMAXP1) =
  1871. ulMaxPacketSize;
  1872. //
  1873. // The transmit control value is zero unless options are enabled.
  1874. //
  1875. ulRegister = 0;
  1876. //
  1877. // Allow auto setting of TxPktRdy when max packet size has been loaded
  1878. // into the FIFO.
  1879. //
  1880. if(ulFlags & USB_EP_AUTO_SET)
  1881. {
  1882. ulRegister |= USB_TXCSRH1_AUTOSET;
  1883. }
  1884. //
  1885. // Configure the DMA mode.
  1886. //
  1887. if(ulFlags & USB_EP_DMA_MODE_1)
  1888. {
  1889. ulRegister |= USB_TXCSRH1_DMAEN | USB_TXCSRH1_DMAMOD;
  1890. }
  1891. else if(ulFlags & USB_EP_DMA_MODE_0)
  1892. {
  1893. ulRegister |= USB_TXCSRH1_DMAEN;
  1894. }
  1895. //
  1896. // Enable isochronous mode if requested.
  1897. //
  1898. if((ulFlags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
  1899. {
  1900. ulRegister |= USB_TXCSRH1_ISO;
  1901. }
  1902. //
  1903. // Write the transmit control value.
  1904. //
  1905. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) =
  1906. (unsigned char)ulRegister;
  1907. //
  1908. // Reset the Data toggle to zero.
  1909. //
  1910. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1) =
  1911. USB_TXCSRL1_CLRDT;
  1912. }
  1913. else
  1914. {
  1915. //
  1916. // Set the MaxPacketSize.
  1917. //
  1918. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXMAXP1) =
  1919. ulMaxPacketSize;
  1920. //
  1921. // The receive control value is zero unless options are enabled.
  1922. //
  1923. ulRegister = 0;
  1924. //
  1925. // Allow auto clearing of RxPktRdy when packet of size max packet
  1926. // has been unloaded from the FIFO.
  1927. //
  1928. if(ulFlags & USB_EP_AUTO_CLEAR)
  1929. {
  1930. ulRegister = USB_RXCSRH1_AUTOCL;
  1931. }
  1932. //
  1933. // Configure the DMA mode.
  1934. //
  1935. if(ulFlags & USB_EP_DMA_MODE_1)
  1936. {
  1937. ulRegister |= USB_RXCSRH1_DMAEN | USB_RXCSRH1_DMAMOD;
  1938. }
  1939. else if(ulFlags & USB_EP_DMA_MODE_0)
  1940. {
  1941. ulRegister |= USB_RXCSRH1_DMAEN;
  1942. }
  1943. //
  1944. // Enable isochronous mode if requested.
  1945. //
  1946. if((ulFlags & USB_EP_MODE_MASK) == USB_EP_MODE_ISOC)
  1947. {
  1948. ulRegister |= USB_RXCSRH1_ISO;
  1949. }
  1950. //
  1951. // Write the receive control value.
  1952. //
  1953. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) =
  1954. (unsigned char)ulRegister;
  1955. //
  1956. // Reset the Data toggle to zero.
  1957. //
  1958. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1) =
  1959. USB_RXCSRL1_CLRDT;
  1960. }
  1961. }
  1962. //*****************************************************************************
  1963. //
  1964. //! Gets the current configuration for an endpoint.
  1965. //!
  1966. //! \param ulBase specifies the USB module base address.
  1967. //! \param ulEndpoint is the endpoint to access.
  1968. //! \param pulMaxPacketSize is a pointer which will be written with the
  1969. //! maximum packet size for this endpoint.
  1970. //! \param pulFlags is a pointer which will be written with the current
  1971. //! endpoint settings. On entry to the function, this pointer must contain
  1972. //! either \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT to indicate whether the IN or
  1973. //! OUT endpoint is to be queried.
  1974. //!
  1975. //! This function will return the basic configuration for an endpoint in device
  1976. //! mode. The values returned in \e *pulMaxPacketSize and \e *pulFlags are
  1977. //! equivalent to the \e ulMaxPacketSize and \e ulFlags previously passed to
  1978. //! USBDevEndpointConfigSet() for this endpoint.
  1979. //!
  1980. //! \note This function should only be called in device mode.
  1981. //!
  1982. //! \return None.
  1983. //
  1984. //*****************************************************************************
  1985. void
  1986. USBDevEndpointConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
  1987. unsigned long *pulMaxPacketSize,
  1988. unsigned long *pulFlags)
  1989. {
  1990. unsigned long ulRegister;
  1991. //
  1992. // Check the arguments.
  1993. //
  1994. ASSERT(ulBase == USB0_BASE);
  1995. ASSERT(pulMaxPacketSize && pulFlags);
  1996. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  1997. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  1998. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  1999. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  2000. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  2001. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  2002. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  2003. (ulEndpoint == USB_EP_15));
  2004. //
  2005. // Determine if a transmit or receive endpoint is being queried.
  2006. //
  2007. if(*pulFlags & USB_EP_DEV_IN)
  2008. {
  2009. //
  2010. // Clear the flags other than the direction bit.
  2011. //
  2012. *pulFlags = USB_EP_DEV_IN;
  2013. //
  2014. // Get the maximum packet size.
  2015. //
  2016. *pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
  2017. EP_OFFSET(ulEndpoint) +
  2018. USB_O_TXMAXP1);
  2019. //
  2020. // Get the current transmit control register value.
  2021. //
  2022. ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
  2023. USB_O_TXCSRH1);
  2024. //
  2025. // Are we allowing auto setting of TxPktRdy when max packet size has
  2026. // been loaded into the FIFO?
  2027. //
  2028. if(ulRegister & USB_TXCSRH1_AUTOSET)
  2029. {
  2030. *pulFlags |= USB_EP_AUTO_SET;
  2031. }
  2032. //
  2033. // Get the DMA mode.
  2034. //
  2035. if(ulRegister & USB_TXCSRH1_DMAEN)
  2036. {
  2037. if(ulRegister & USB_TXCSRH1_DMAMOD)
  2038. {
  2039. *pulFlags |= USB_EP_DMA_MODE_1;
  2040. }
  2041. else
  2042. {
  2043. *pulFlags |= USB_EP_DMA_MODE_0;
  2044. }
  2045. }
  2046. //
  2047. // Are we in isochronous mode?
  2048. //
  2049. if(ulRegister & USB_TXCSRH1_ISO)
  2050. {
  2051. *pulFlags |= USB_EP_MODE_ISOC;
  2052. }
  2053. else
  2054. {
  2055. //
  2056. // The hardware doesn't differentiate between bulk, interrupt
  2057. // and control mode for the endpoint so we just set something
  2058. // that isn't isochronous. This ensures that anyone modifying
  2059. // the returned flags in preparation for a call to
  2060. // USBDevEndpointConfigSet will not see an unexpected mode change.
  2061. // If they decode the returned mode, however, they may be in for
  2062. // a surprise.
  2063. //
  2064. *pulFlags |= USB_EP_MODE_BULK;
  2065. }
  2066. }
  2067. else
  2068. {
  2069. //
  2070. // Clear the flags other than the direction bit.
  2071. //
  2072. *pulFlags = USB_EP_DEV_OUT;
  2073. //
  2074. // Get the MaxPacketSize.
  2075. //
  2076. *pulMaxPacketSize = (unsigned long)HWREGB(ulBase +
  2077. EP_OFFSET(ulEndpoint) +
  2078. USB_O_RXMAXP1);
  2079. //
  2080. // Get the current receive control register value.
  2081. //
  2082. ulRegister = (unsigned long)HWREGB(ulBase + EP_OFFSET(ulEndpoint) +
  2083. USB_O_RXCSRH1);
  2084. //
  2085. // Are we allowing auto clearing of RxPktRdy when packet of size max
  2086. // packet has been unloaded from the FIFO?
  2087. //
  2088. if(ulRegister & USB_RXCSRH1_AUTOCL)
  2089. {
  2090. *pulFlags |= USB_EP_AUTO_CLEAR;
  2091. }
  2092. //
  2093. // Get the DMA mode.
  2094. //
  2095. if(ulRegister & USB_RXCSRH1_DMAEN)
  2096. {
  2097. if(ulRegister & USB_RXCSRH1_DMAMOD)
  2098. {
  2099. *pulFlags |= USB_EP_DMA_MODE_1;
  2100. }
  2101. else
  2102. {
  2103. *pulFlags |= USB_EP_DMA_MODE_0;
  2104. }
  2105. }
  2106. //
  2107. // Are we in isochronous mode?
  2108. //
  2109. if(ulRegister & USB_RXCSRH1_ISO)
  2110. {
  2111. *pulFlags |= USB_EP_MODE_ISOC;
  2112. }
  2113. else
  2114. {
  2115. //
  2116. // The hardware doesn't differentiate between bulk, interrupt
  2117. // and control mode for the endpoint so we just set something
  2118. // that isn't isochronous. This ensures that anyone modifying
  2119. // the returned flags in preparation for a call to
  2120. // USBDevEndpointConfigSet will not see an unexpected mode change.
  2121. // If they decode the returned mode, however, they may be in for
  2122. // a surprise.
  2123. //
  2124. *pulFlags |= USB_EP_MODE_BULK;
  2125. }
  2126. }
  2127. }
  2128. //*****************************************************************************
  2129. //
  2130. //! Sets the FIFO configuration for an endpoint.
  2131. //!
  2132. //! \param ulBase specifies the USB module base address.
  2133. //! \param ulEndpoint is the endpoint to access.
  2134. //! \param ulFIFOAddress is the starting address for the FIFO.
  2135. //! \param ulFIFOSize is the size of the FIFO in bytes.
  2136. //! \param ulFlags specifies what information to set in the FIFO configuration.
  2137. //!
  2138. //! This function will set the starting FIFO RAM address and size of the FIFO
  2139. //! for a given endpoint. Endpoint zero does not have a dynamically
  2140. //! configurable FIFO so this function should not be called for endpoint zero.
  2141. //! The \e ulFIFOSize parameter should be one of the values in the
  2142. //! \b USB_FIFO_SZ_ values. If the endpoint is going to use double buffering
  2143. //! it should use the values with the \b _DB at the end of the value. For
  2144. //! example, use \b USB_FIFO_SZ_16_DB to configure an endpoint to have a 16
  2145. //! byte double buffered FIFO. If a double buffered FIFO is used, then the
  2146. //! actual size of the FIFO will be twice the size indicated by the
  2147. //! \e ulFIFOSize parameter. This means that the \b USB_FIFO_SZ_16_DB value
  2148. //! will use 32 bytes of the USB controller's FIFO memory.
  2149. //!
  2150. //! The \e ulFIFOAddress value should be a multiple of 8 bytes and directly
  2151. //! indicates the starting address in the USB controller's FIFO RAM. For
  2152. //! example, a value of 64 indicates that the FIFO should start 64 bytes into
  2153. //! the USB controller's FIFO memory. The \e ulFlags value specifies whether
  2154. //! the endpoint's OUT or IN FIFO should be configured. If in host mode, use
  2155. //! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode use
  2156. //! \b USB_EP_DEV_OUT or \b USB_EP_DEV_IN.
  2157. //!
  2158. //! \return None.
  2159. //
  2160. //*****************************************************************************
  2161. void
  2162. USBFIFOConfigSet(unsigned long ulBase, unsigned long ulEndpoint,
  2163. unsigned long ulFIFOAddress, unsigned long ulFIFOSize,
  2164. unsigned long ulFlags)
  2165. {
  2166. //
  2167. // Check the arguments.
  2168. //
  2169. ASSERT(ulBase == USB0_BASE);
  2170. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  2171. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  2172. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  2173. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  2174. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  2175. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  2176. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  2177. (ulEndpoint == USB_EP_15));
  2178. //
  2179. // See if the transmit or receive FIFO is being configured.
  2180. //
  2181. if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
  2182. {
  2183. //
  2184. // Set the transmit FIFO location and size for this endpoint.
  2185. //
  2186. USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOSZ, ulFIFOSize, 1);
  2187. USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_TXFIFOADD,
  2188. ulFIFOAddress >> 3, 2);
  2189. }
  2190. else
  2191. {
  2192. //
  2193. // Set the receive FIFO location and size for this endpoint.
  2194. //
  2195. USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOSZ, ulFIFOSize, 1);
  2196. USBIndexWrite(ulBase, ulEndpoint >> 4, USB_O_RXFIFOADD,
  2197. ulFIFOAddress >> 3, 2);
  2198. }
  2199. }
  2200. //*****************************************************************************
  2201. //
  2202. //! Returns the FIFO configuration for an endpoint.
  2203. //!
  2204. //! \param ulBase specifies the USB module base address.
  2205. //! \param ulEndpoint is the endpoint to access.
  2206. //! \param pulFIFOAddress is the starting address for the FIFO.
  2207. //! \param pulFIFOSize is the size of the FIFO in bytes.
  2208. //! \param ulFlags specifies what information to retrieve from the FIFO
  2209. //! configuration.
  2210. //!
  2211. //! This function will return the starting address and size of the FIFO for a
  2212. //! given endpoint. Endpoint zero does not have a dynamically configurable
  2213. //! FIFO so this function should not be called for endpoint zero. The
  2214. //! \e ulFlags parameter specifies whether the endpoint's OUT or IN FIFO should
  2215. //! be read. If in host mode, the \e ulFlags parameter should be
  2216. //! \b USB_EP_HOST_OUT or \b USB_EP_HOST_IN, and if in device mode the
  2217. //! \e ulFlags parameter should be either \b USB_EP_DEV_OUT or
  2218. //! \b USB_EP_DEV_IN.
  2219. //!
  2220. //! \return None.
  2221. //
  2222. //*****************************************************************************
  2223. void
  2224. USBFIFOConfigGet(unsigned long ulBase, unsigned long ulEndpoint,
  2225. unsigned long *pulFIFOAddress, unsigned long *pulFIFOSize,
  2226. unsigned long ulFlags)
  2227. {
  2228. //
  2229. // Check the arguments.
  2230. //
  2231. ASSERT(ulBase == USB0_BASE);
  2232. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  2233. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  2234. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  2235. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  2236. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  2237. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  2238. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  2239. (ulEndpoint == USB_EP_15));
  2240. //
  2241. // See if the transmit or receive FIFO is being configured.
  2242. //
  2243. if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
  2244. {
  2245. //
  2246. // Get the transmit FIFO location and size for this endpoint.
  2247. //
  2248. *pulFIFOAddress = (USBIndexRead(ulBase, ulEndpoint >> 4,
  2249. (unsigned long)USB_O_TXFIFOADD,
  2250. 2)) << 3;
  2251. *pulFIFOSize = USBIndexRead(ulBase, ulEndpoint >> 4,
  2252. (unsigned long)USB_O_TXFIFOSZ, 1);
  2253. }
  2254. else
  2255. {
  2256. //
  2257. // Get the receive FIFO location and size for this endpoint.
  2258. //
  2259. *pulFIFOAddress = (USBIndexRead(ulBase, ulEndpoint >> 4,
  2260. (unsigned long)USB_O_RXFIFOADD,
  2261. 2)) << 3;
  2262. *pulFIFOSize = USBIndexRead(ulBase, ulEndpoint >> 4,
  2263. (unsigned long)USB_O_RXFIFOSZ, 1);
  2264. }
  2265. }
  2266. //*****************************************************************************
  2267. //
  2268. //! Enable DMA on a given endpoint.
  2269. //!
  2270. //! \param ulBase specifies the USB module base address.
  2271. //! \param ulEndpoint is the endpoint to access.
  2272. //! \param ulFlags specifies which direction and what mode to use when enabling
  2273. //! DMA.
  2274. //!
  2275. //! This function will enable DMA on a given endpoint and set the mode according
  2276. //! to the values in the \e ulFlags parameter. The \e ulFlags parameter should
  2277. //! have \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT set.
  2278. //!
  2279. //! \return None.
  2280. //
  2281. //*****************************************************************************
  2282. void
  2283. USBEndpointDMAEnable(unsigned long ulBase, unsigned long ulEndpoint,
  2284. unsigned long ulFlags)
  2285. {
  2286. //
  2287. // See if the transmit DMA is being enabled.
  2288. //
  2289. if(ulFlags & USB_EP_DEV_IN)
  2290. {
  2291. //
  2292. // Enable DMA on the transmit end point.
  2293. //
  2294. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) |=
  2295. USB_TXCSRH1_DMAEN;
  2296. }
  2297. else
  2298. {
  2299. //
  2300. // Enable DMA on the receive end point.
  2301. //
  2302. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) |=
  2303. USB_RXCSRH1_DMAEN;
  2304. }
  2305. }
  2306. //*****************************************************************************
  2307. //
  2308. //! Disable DMA on a given endpoint.
  2309. //!
  2310. //! \param ulBase specifies the USB module base address.
  2311. //! \param ulEndpoint is the endpoint to access.
  2312. //! \param ulFlags specifies which direction to disable.
  2313. //!
  2314. //! This function will disable DMA on a given end point to allow non-DMA
  2315. //! USB transactions to generate interrupts normally. The ulFlags should be
  2316. //! \b USB_EP_DEV_IN or \b USB_EP_DEV_OUT all other bits are ignored.
  2317. //!
  2318. //! \return None.
  2319. //
  2320. //*****************************************************************************
  2321. void
  2322. USBEndpointDMADisable(unsigned long ulBase, unsigned long ulEndpoint,
  2323. unsigned long ulFlags)
  2324. {
  2325. //
  2326. // If this was a request to disable DMA on the IN portion of the end point
  2327. // then handle it.
  2328. //
  2329. if(ulFlags & USB_EP_DEV_IN)
  2330. {
  2331. //
  2332. // Just disable DMA leave the mode setting.
  2333. //
  2334. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRH1) &=
  2335. ~USB_TXCSRH1_DMAEN;
  2336. }
  2337. else
  2338. {
  2339. //
  2340. // Just disable DMA leave the mode setting.
  2341. //
  2342. HWREGB(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRH1) &=
  2343. ~USB_RXCSRH1_DMAEN;
  2344. }
  2345. }
  2346. //*****************************************************************************
  2347. //
  2348. //! Determine the number of bytes of data available in a given endpoint's FIFO.
  2349. //!
  2350. //! \param ulBase specifies the USB module base address.
  2351. //! \param ulEndpoint is the endpoint to access.
  2352. //!
  2353. //! This function will return the number of bytes of data currently available
  2354. //! in the FIFO for the given receive (OUT) endpoint. It may be used prior to
  2355. //! calling USBEndpointDataGet() to determine the size of buffer required to
  2356. //! hold the newly-received packet.
  2357. //!
  2358. //! \return This call will return the number of bytes available in a given
  2359. //! endpoint FIFO.
  2360. //
  2361. //*****************************************************************************
  2362. unsigned long
  2363. USBEndpointDataAvail(unsigned long ulBase, unsigned long ulEndpoint)
  2364. {
  2365. unsigned long ulRegister;
  2366. //
  2367. // Check the arguments.
  2368. //
  2369. ASSERT(ulBase == USB0_BASE);
  2370. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2371. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2372. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2373. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2374. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2375. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2376. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2377. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2378. //
  2379. // Get the address of the receive status register to use, based on the
  2380. // endpoint.
  2381. //
  2382. if(ulEndpoint == USB_EP_0)
  2383. {
  2384. ulRegister = USB_O_CSRL0;
  2385. }
  2386. else
  2387. {
  2388. ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
  2389. }
  2390. //
  2391. // Is there a packet ready in the FIFO?
  2392. //
  2393. if((HWREGH(ulBase + ulRegister) & USB_CSRL0_RXRDY) == 0)
  2394. {
  2395. return(0);
  2396. }
  2397. //
  2398. // Return the byte count in the FIFO.
  2399. //
  2400. return(HWREGH(ulBase + USB_O_COUNT0 + ulEndpoint));
  2401. }
  2402. //*****************************************************************************
  2403. //
  2404. //! Retrieves data from the given endpoint's FIFO.
  2405. //!
  2406. //! \param ulBase specifies the USB module base address.
  2407. //! \param ulEndpoint is the endpoint to access.
  2408. //! \param pucData is a pointer to the data area used to return the data from
  2409. //! the FIFO.
  2410. //! \param pulSize is initially the size of the buffer passed into this call
  2411. //! via the \e pucData parameter. It will be set to the amount of data
  2412. //! returned in the buffer.
  2413. //!
  2414. //! This function will return the data from the FIFO for the given endpoint.
  2415. //! The \e pulSize parameter should indicate the size of the buffer passed in
  2416. //! the \e pulData parameter. The data in the \e pulSize parameter will be
  2417. //! changed to match the amount of data returned in the \e pucData parameter.
  2418. //! If a zero byte packet was received this call will not return a error but
  2419. //! will instead just return a zero in the \e pulSize parameter. The only
  2420. //! error case occurs when there is no data packet available.
  2421. //!
  2422. //! \return This call will return 0, or -1 if no packet was received.
  2423. //
  2424. //*****************************************************************************
  2425. long
  2426. USBEndpointDataGet(unsigned long ulBase, unsigned long ulEndpoint,
  2427. unsigned char *pucData, unsigned long *pulSize)
  2428. {
  2429. unsigned long ulRegister, ulByteCount, ulFIFO;
  2430. //
  2431. // Check the arguments.
  2432. //
  2433. ASSERT(ulBase == USB0_BASE);
  2434. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2435. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2436. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2437. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2438. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2439. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2440. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2441. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2442. //
  2443. // Get the address of the receive status register to use, based on the
  2444. // endpoint.
  2445. //
  2446. if(ulEndpoint == USB_EP_0)
  2447. {
  2448. ulRegister = USB_O_CSRL0;
  2449. }
  2450. else
  2451. {
  2452. ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
  2453. }
  2454. //
  2455. // Don't allow reading of data if the RxPktRdy bit is not set.
  2456. //
  2457. if((HWREGH(ulBase + ulRegister) & USB_CSRL0_RXRDY) == 0)
  2458. {
  2459. //
  2460. // Can't read the data because none is available.
  2461. //
  2462. *pulSize = 0;
  2463. //
  2464. // Return a failure since there is no data to read.
  2465. //
  2466. return(-1);
  2467. }
  2468. //
  2469. // Get the byte count in the FIFO.
  2470. //
  2471. ulByteCount = HWREGH(ulBase + USB_O_COUNT0 + ulEndpoint);
  2472. //
  2473. // Determine how many bytes we will actually copy.
  2474. //
  2475. ulByteCount = (ulByteCount < *pulSize) ? ulByteCount : *pulSize;
  2476. //
  2477. // Return the number of bytes we are going to read.
  2478. //
  2479. *pulSize = ulByteCount;
  2480. //
  2481. // Calculate the FIFO address.
  2482. //
  2483. ulFIFO = ulBase + USB_O_FIFO0 + (ulEndpoint >> 2);
  2484. //
  2485. // Read the data out of the FIFO.
  2486. //
  2487. for(; ulByteCount > 0; ulByteCount--)
  2488. {
  2489. //
  2490. // Read a byte at a time from the FIFO.
  2491. //
  2492. *pucData++ = HWREGB(ulFIFO);
  2493. }
  2494. //
  2495. // Success.
  2496. //
  2497. return(0);
  2498. }
  2499. //*****************************************************************************
  2500. //
  2501. //! Acknowledge that data was read from the given endpoint's FIFO in device
  2502. //! mode.
  2503. //!
  2504. //! \param ulBase specifies the USB module base address.
  2505. //! \param ulEndpoint is the endpoint to access.
  2506. //! \param bIsLastPacket indicates if this is the last packet.
  2507. //!
  2508. //! This function acknowledges that the data was read from the endpoint's FIFO.
  2509. //! The \e bIsLastPacket parameter is set to a \b true value if this is the
  2510. //! last in a series of data packets on endpoint zero. The \e bIsLastPacket
  2511. //! parameter is not used for endpoints other than endpoint zero. This call
  2512. //! can be used if processing is required between reading the data and
  2513. //! acknowledging that the data has been read.
  2514. //!
  2515. //! \note This function should only be called in device mode.
  2516. //!
  2517. //! \return None.
  2518. //
  2519. //*****************************************************************************
  2520. void
  2521. USBDevEndpointDataAck(unsigned long ulBase, unsigned long ulEndpoint,
  2522. tBoolean bIsLastPacket)
  2523. {
  2524. //
  2525. // Check the arguments.
  2526. //
  2527. ASSERT(ulBase == USB0_BASE);
  2528. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2529. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2530. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2531. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2532. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2533. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2534. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2535. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2536. //
  2537. // Determine which endpoint is being acked.
  2538. //
  2539. if(ulEndpoint == USB_EP_0)
  2540. {
  2541. //
  2542. // Clear RxPktRdy, and optionally DataEnd, on endpoint zero.
  2543. //
  2544. HWREGB(ulBase + USB_O_CSRL0) =
  2545. USB_CSRL0_RXRDYC | (bIsLastPacket ? USB_CSRL0_DATAEND : 0);
  2546. }
  2547. else
  2548. {
  2549. //
  2550. // Clear RxPktRdy on all other endpoints.
  2551. //
  2552. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  2553. ~(USB_RXCSRL1_RXRDY);
  2554. }
  2555. }
  2556. //*****************************************************************************
  2557. //
  2558. //! Acknowledge that data was read from the given endpoint's FIFO in host
  2559. //! mode.
  2560. //!
  2561. //! \param ulBase specifies the USB module base address.
  2562. //! \param ulEndpoint is the endpoint to access.
  2563. //!
  2564. //! This function acknowledges that the data was read from the endpoint's FIFO.
  2565. //! This call is used if processing is required between reading the data and
  2566. //! acknowledging that the data has been read.
  2567. //!
  2568. //! \note This function should only be called in host mode.
  2569. //!
  2570. //! \return None.
  2571. //
  2572. //*****************************************************************************
  2573. void
  2574. USBHostEndpointDataAck(unsigned long ulBase, unsigned long ulEndpoint)
  2575. {
  2576. //
  2577. // Check the arguments.
  2578. //
  2579. ASSERT(ulBase == USB0_BASE);
  2580. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2581. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2582. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2583. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2584. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2585. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2586. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2587. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2588. //
  2589. // Clear RxPktRdy.
  2590. //
  2591. if(ulEndpoint == USB_EP_0)
  2592. {
  2593. HWREGB(ulBase + USB_O_CSRL0) &= ~USB_CSRL0_RXRDY;
  2594. }
  2595. else
  2596. {
  2597. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
  2598. ~(USB_RXCSRL1_RXRDY);
  2599. }
  2600. }
  2601. //*****************************************************************************
  2602. //
  2603. //! Puts data into the given endpoint's FIFO.
  2604. //!
  2605. //! \param ulBase specifies the USB module base address.
  2606. //! \param ulEndpoint is the endpoint to access.
  2607. //! \param pucData is a pointer to the data area used as the source for the
  2608. //! data to put into the FIFO.
  2609. //! \param ulSize is the amount of data to put into the FIFO.
  2610. //!
  2611. //! This function will put the data from the \e pucData parameter into the FIFO
  2612. //! for this endpoint. If a packet is already pending for transmission then
  2613. //! this call will not put any of the data into the FIFO and will return -1.
  2614. //! Care should be taken to not write more data than can fit into the FIFO
  2615. //! allocated by the call to USBFIFOConfig().
  2616. //!
  2617. //! \return This call will return 0 on success, or -1 to indicate that the FIFO
  2618. //! is in use and cannot be written.
  2619. //
  2620. //*****************************************************************************
  2621. long
  2622. USBEndpointDataPut(unsigned long ulBase, unsigned long ulEndpoint,
  2623. unsigned char *pucData, unsigned long ulSize)
  2624. {
  2625. unsigned long ulFIFO;
  2626. unsigned char ucTxPktRdy;
  2627. //
  2628. // Check the arguments.
  2629. //
  2630. ASSERT(ulBase == USB0_BASE);
  2631. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2632. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2633. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2634. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2635. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2636. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2637. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2638. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2639. //
  2640. // Get the bit position of TxPktRdy based on the endpoint.
  2641. //
  2642. if(ulEndpoint == USB_EP_0)
  2643. {
  2644. ucTxPktRdy = USB_CSRL0_TXRDY;
  2645. }
  2646. else
  2647. {
  2648. ucTxPktRdy = USB_TXCSRL1_TXRDY;
  2649. }
  2650. //
  2651. // Don't allow transmit of data if the TxPktRdy bit is already set.
  2652. //
  2653. if(HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) & ucTxPktRdy)
  2654. {
  2655. return(-1);
  2656. }
  2657. //
  2658. // Calculate the FIFO address.
  2659. //
  2660. ulFIFO = ulBase + USB_O_FIFO0 + (ulEndpoint >> 2);
  2661. //
  2662. // Write the data to the FIFO.
  2663. //
  2664. for(; ulSize > 0; ulSize--)
  2665. {
  2666. HWREGB(ulFIFO) = *pucData++;
  2667. }
  2668. //
  2669. // Success.
  2670. //
  2671. return(0);
  2672. }
  2673. //*****************************************************************************
  2674. //
  2675. //! Starts the transfer of data from an endpoint's FIFO.
  2676. //!
  2677. //! \param ulBase specifies the USB module base address.
  2678. //! \param ulEndpoint is the endpoint to access.
  2679. //! \param ulTransType is set to indicate what type of data is being sent.
  2680. //!
  2681. //! This function will start the transfer of data from the FIFO for a given
  2682. //! endpoint. This is necessary if the \b USB_EP_AUTO_SET bit was not enabled
  2683. //! for the endpoint. Setting the \e ulTransType parameter will allow the
  2684. //! appropriate signaling on the USB bus for the type of transaction being
  2685. //! requested. The \e ulTransType parameter should be one of the following:
  2686. //!
  2687. //! - USB_TRANS_OUT for OUT transaction on any endpoint in host mode.
  2688. //! - USB_TRANS_IN for IN transaction on any endpoint in device mode.
  2689. //! - USB_TRANS_IN_LAST for the last IN transactions on endpoint zero in a
  2690. //! sequence of IN transactions.
  2691. //! - USB_TRANS_SETUP for setup transactions on endpoint zero.
  2692. //! - USB_TRANS_STATUS for status results on endpoint zero.
  2693. //!
  2694. //! \return This call will return 0 on success, or -1 if a transmission is
  2695. //! already in progress.
  2696. //
  2697. //*****************************************************************************
  2698. long
  2699. USBEndpointDataSend(unsigned long ulBase, unsigned long ulEndpoint,
  2700. unsigned long ulTransType)
  2701. {
  2702. unsigned long ulTxPktRdy;
  2703. //
  2704. // CHeck the arguments.
  2705. //
  2706. ASSERT(ulBase == USB0_BASE);
  2707. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2708. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2709. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2710. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2711. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2712. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2713. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2714. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2715. //
  2716. // Get the bit position of TxPktRdy based on the endpoint.
  2717. //
  2718. if(ulEndpoint == USB_EP_0)
  2719. {
  2720. ulTxPktRdy = ulTransType & 0xff;
  2721. }
  2722. else
  2723. {
  2724. ulTxPktRdy = (ulTransType >> 8) & 0xff;
  2725. }
  2726. //
  2727. // Don't allow transmit of data if the TxPktRdy bit is already set.
  2728. //
  2729. if(HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) & USB_CSRL0_TXRDY)
  2730. {
  2731. return(-1);
  2732. }
  2733. //
  2734. // Set TxPktRdy in order to send the data.
  2735. //
  2736. HWREGB(ulBase + USB_O_CSRL0 + ulEndpoint) = ulTxPktRdy;
  2737. //
  2738. // Success.
  2739. //
  2740. return(0);
  2741. }
  2742. //*****************************************************************************
  2743. //
  2744. //! Forces a flush of an endpoint's FIFO.
  2745. //!
  2746. //! \param ulBase specifies the USB module base address.
  2747. //! \param ulEndpoint is the endpoint to access.
  2748. //! \param ulFlags specifies if the IN or OUT endpoint should be accessed.
  2749. //!
  2750. //! This function will force the controller to flush out the data in the FIFO.
  2751. //! The function can be called with either host or device controllers and
  2752. //! requires the \e ulFlags parameter be one of \b USB_EP_HOST_OUT,
  2753. //! \b USB_EP_HOST_IN, \b USB_EP_DEV_OUT, or \b USB_EP_DEV_IN.
  2754. //!
  2755. //! \return None.
  2756. //
  2757. //*****************************************************************************
  2758. void
  2759. USBFIFOFlush(unsigned long ulBase, unsigned long ulEndpoint,
  2760. unsigned long ulFlags)
  2761. {
  2762. //
  2763. // Check the arguments.
  2764. //
  2765. ASSERT(ulBase == USB0_BASE);
  2766. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2767. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2768. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2769. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2770. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2771. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2772. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2773. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2774. //
  2775. // Endpoint zero has a different register set for FIFO flushing.
  2776. //
  2777. if(ulEndpoint == USB_EP_0)
  2778. {
  2779. //
  2780. // Nothing in the FIFO if neither of these bits are set.
  2781. //
  2782. if((HWREGB(ulBase + USB_O_CSRL0) &
  2783. (USB_CSRL0_RXRDY | USB_CSRL0_TXRDY)) != 0)
  2784. {
  2785. //
  2786. // Hit the Flush FIFO bit.
  2787. //
  2788. HWREGB(ulBase + USB_O_CSRH0) = USB_CSRH0_FLUSH;
  2789. }
  2790. }
  2791. else
  2792. {
  2793. //
  2794. // Only reset the IN or OUT FIFO.
  2795. //
  2796. if(ulFlags & (USB_EP_HOST_OUT | USB_EP_DEV_IN))
  2797. {
  2798. //
  2799. // Make sure the FIFO is not empty.
  2800. //
  2801. if(HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &
  2802. USB_TXCSRL1_TXRDY)
  2803. {
  2804. //
  2805. // Hit the Flush FIFO bit.
  2806. //
  2807. HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  2808. USB_TXCSRL1_FLUSH;
  2809. }
  2810. }
  2811. else
  2812. {
  2813. //
  2814. // Make sure that the FIFO is not empty.
  2815. //
  2816. if(HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &
  2817. USB_RXCSRL1_RXRDY)
  2818. {
  2819. //
  2820. // Hit the Flush FIFO bit.
  2821. //
  2822. HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) |=
  2823. USB_RXCSRL1_FLUSH;
  2824. }
  2825. }
  2826. }
  2827. }
  2828. //*****************************************************************************
  2829. //
  2830. //! Schedules a request for an IN transaction on an endpoint in host mode.
  2831. //!
  2832. //! \param ulBase specifies the USB module base address.
  2833. //! \param ulEndpoint is the endpoint to access.
  2834. //!
  2835. //! This function will schedule a request for an IN transaction. When the USB
  2836. //! device being communicated with responds the data, the data can be retrieved
  2837. //! by calling USBEndpointDataGet() or via a DMA transfer.
  2838. //!
  2839. //! \note This function should only be called in host mode.
  2840. //!
  2841. //! \return None.
  2842. //
  2843. //*****************************************************************************
  2844. void
  2845. USBHostRequestIN(unsigned long ulBase, unsigned long ulEndpoint)
  2846. {
  2847. unsigned long ulRegister;
  2848. //
  2849. // Check the arguments.
  2850. //
  2851. ASSERT(ulBase == USB0_BASE);
  2852. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2853. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2854. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2855. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2856. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2857. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2858. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2859. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2860. //
  2861. // Endpoint zero uses a different offset than the other endpoints.
  2862. //
  2863. if(ulEndpoint == USB_EP_0)
  2864. {
  2865. ulRegister = USB_O_CSRL0;
  2866. }
  2867. else
  2868. {
  2869. ulRegister = USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint);
  2870. }
  2871. //
  2872. // Set the request for an IN transaction.
  2873. //
  2874. HWREGB(ulBase + ulRegister) = USB_RXCSRL1_REQPKT;
  2875. }
  2876. //*****************************************************************************
  2877. //
  2878. //! Issues a request for a status IN transaction on endpoint zero.
  2879. //!
  2880. //! \param ulBase specifies the USB module base address.
  2881. //!
  2882. //! This function is used to cause a request for an status IN transaction from
  2883. //! a device on endpoint zero. This function can only be used with endpoint
  2884. //! zero as that is the only control endpoint that supports this ability. This
  2885. //! is used to complete the last phase of a control transaction to a device and
  2886. //! an interrupt will be signaled when the status packet has been received.
  2887. //!
  2888. //! \return None.
  2889. //
  2890. //*****************************************************************************
  2891. void
  2892. USBHostRequestStatus(unsigned long ulBase)
  2893. {
  2894. //
  2895. // Check the arguments.
  2896. //
  2897. ASSERT(ulBase == USB0_BASE);
  2898. //
  2899. // Set the request for a status IN transaction.
  2900. //
  2901. HWREGB(ulBase + USB_O_CSRL0) = USB_CSRL0_REQPKT | USB_CSRL0_STATUS;
  2902. }
  2903. //*****************************************************************************
  2904. //
  2905. //! Sets the functional address for the device that is connected to an
  2906. //! endpoint in host mode.
  2907. //!
  2908. //! \param ulBase specifies the USB module base address.
  2909. //! \param ulEndpoint is the endpoint to access.
  2910. //! \param ulAddr is the functional address for the controller to use for this
  2911. //! endpoint.
  2912. //! \param ulFlags determines if this is an IN or an OUT endpoint.
  2913. //!
  2914. //! This function will set the functional address for a device that is using
  2915. //! this endpoint for communication. This \e ulAddr parameter is the address
  2916. //! of the target device that this endpoint will be used to communicate with.
  2917. //! The \e ulFlags parameter indicates if the IN or OUT endpoint should be set.
  2918. //!
  2919. //! \note This function should only be called in host mode.
  2920. //!
  2921. //! \return None.
  2922. //
  2923. //*****************************************************************************
  2924. void
  2925. USBHostAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
  2926. unsigned long ulAddr, unsigned long ulFlags)
  2927. {
  2928. //
  2929. // Check the arguments.
  2930. //
  2931. ASSERT(ulBase == USB0_BASE);
  2932. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2933. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2934. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2935. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2936. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2937. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2938. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2939. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2940. //
  2941. // See if the transmit or receive address should be set.
  2942. //
  2943. if(ulFlags & USB_EP_HOST_OUT)
  2944. {
  2945. //
  2946. // Set the transmit address.
  2947. //
  2948. HWREGB(ulBase + USB_O_TXFUNCADDR0 + (ulEndpoint >> 1)) = ulAddr;
  2949. }
  2950. else
  2951. {
  2952. //
  2953. // Set the receive address.
  2954. //
  2955. HWREGB(ulBase + USB_O_TXFUNCADDR0 + 4 + (ulEndpoint >> 1)) = ulAddr;
  2956. }
  2957. }
  2958. //*****************************************************************************
  2959. //
  2960. //! Gets the current functional device address for an endpoint.
  2961. //!
  2962. //! \param ulBase specifies the USB module base address.
  2963. //! \param ulEndpoint is the endpoint to access.
  2964. //! \param ulFlags determines if this is an IN or an OUT endpoint.
  2965. //!
  2966. //! This function returns the current functional address that an endpoint is
  2967. //! using to communicate with a device. The \e ulFlags parameter determines if
  2968. //! the IN or OUT endpoint's device address is returned.
  2969. //!
  2970. //! \note This function should only be called in host mode.
  2971. //!
  2972. //! \return Returns the current function address being used by an endpoint.
  2973. //
  2974. //*****************************************************************************
  2975. unsigned long
  2976. USBHostAddrGet(unsigned long ulBase, unsigned long ulEndpoint,
  2977. unsigned long ulFlags)
  2978. {
  2979. //
  2980. // Check the arguments.
  2981. //
  2982. ASSERT(ulBase == USB0_BASE);
  2983. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  2984. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  2985. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  2986. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  2987. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  2988. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  2989. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  2990. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  2991. //
  2992. // See if the transmit or receive address should be returned.
  2993. //
  2994. if(ulFlags & USB_EP_HOST_OUT)
  2995. {
  2996. //
  2997. // Return this endpoint's transmit address.
  2998. //
  2999. return(HWREGB(ulBase + USB_O_TXFUNCADDR0 + (ulEndpoint >> 1)));
  3000. }
  3001. else
  3002. {
  3003. //
  3004. // Return this endpoint's receive address.
  3005. //
  3006. return(HWREGB(ulBase + USB_O_TXFUNCADDR0 + 4 + (ulEndpoint >> 1)));
  3007. }
  3008. }
  3009. //*****************************************************************************
  3010. //
  3011. //! Set the hub address for the device that is connected to an endpoint.
  3012. //!
  3013. //! \param ulBase specifies the USB module base address.
  3014. //! \param ulEndpoint is the endpoint to access.
  3015. //! \param ulAddr is the hub address for the device using this endpoint.
  3016. //! \param ulFlags determines if this is an IN or an OUT endpoint.
  3017. //!
  3018. //! This function will set the hub address for a device that is using this
  3019. //! endpoint for communication. The \e ulFlags parameter determines if the
  3020. //! device address for the IN or the OUT endpoint is set by this call.
  3021. //!
  3022. //! \note This function should only be called in host mode.
  3023. //!
  3024. //! \return None.
  3025. //
  3026. //*****************************************************************************
  3027. void
  3028. USBHostHubAddrSet(unsigned long ulBase, unsigned long ulEndpoint,
  3029. unsigned long ulAddr, unsigned long ulFlags)
  3030. {
  3031. //
  3032. // Check the arguments.
  3033. //
  3034. ASSERT(ulBase == USB0_BASE);
  3035. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  3036. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  3037. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  3038. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  3039. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  3040. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  3041. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  3042. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  3043. //
  3044. // See if the hub transmit or receive address is being set.
  3045. //
  3046. if(ulFlags & USB_EP_HOST_OUT)
  3047. {
  3048. //
  3049. // Set the hub transmit address for this endpoint.
  3050. //
  3051. HWREGB(ulBase + USB_O_TXHUBADDR0 + (ulEndpoint >> 1)) = ulAddr;
  3052. }
  3053. else
  3054. {
  3055. //
  3056. // Set the hub receive address for this endpoint.
  3057. //
  3058. HWREGB(ulBase + USB_O_TXHUBADDR0 + 4 + (ulEndpoint >> 1)) = ulAddr;
  3059. }
  3060. }
  3061. //*****************************************************************************
  3062. //
  3063. //! Get the current device hub address for this endpoint.
  3064. //!
  3065. //! \param ulBase specifies the USB module base address.
  3066. //! \param ulEndpoint is the endpoint to access.
  3067. //! \param ulFlags determines if this is an IN or an OUT endpoint.
  3068. //!
  3069. //! This function will return the current hub address that an endpoint is using
  3070. //! to communicate with a device. The \e ulFlags parameter determines if the
  3071. //! device address for the IN or OUT endpoint is returned.
  3072. //!
  3073. //! \note This function should only be called in host mode.
  3074. //!
  3075. //! \return This function returns the current hub address being used by an
  3076. //! endpoint.
  3077. //
  3078. //*****************************************************************************
  3079. unsigned long
  3080. USBHostHubAddrGet(unsigned long ulBase, unsigned long ulEndpoint,
  3081. unsigned long ulFlags)
  3082. {
  3083. //
  3084. // Check the arguments.
  3085. //
  3086. ASSERT(ulBase == USB0_BASE);
  3087. ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
  3088. (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3) ||
  3089. (ulEndpoint == USB_EP_4) || (ulEndpoint == USB_EP_5) ||
  3090. (ulEndpoint == USB_EP_6) || (ulEndpoint == USB_EP_7) ||
  3091. (ulEndpoint == USB_EP_8) || (ulEndpoint == USB_EP_9) ||
  3092. (ulEndpoint == USB_EP_10) || (ulEndpoint == USB_EP_11) ||
  3093. (ulEndpoint == USB_EP_12) || (ulEndpoint == USB_EP_13) ||
  3094. (ulEndpoint == USB_EP_14) || (ulEndpoint == USB_EP_15));
  3095. //
  3096. // See if the hub transmit or receive address should be returned.
  3097. //
  3098. if(ulFlags & USB_EP_HOST_OUT)
  3099. {
  3100. //
  3101. // Return the hub transmit address for this endpoint.
  3102. //
  3103. return(HWREGB(ulBase + USB_O_TXHUBADDR0 + (ulEndpoint >> 1)));
  3104. }
  3105. else
  3106. {
  3107. //
  3108. // Return the hub receive address for this endpoint.
  3109. //
  3110. return(HWREGB(ulBase + USB_O_TXHUBADDR0 + 4 + (ulEndpoint >> 1)));
  3111. }
  3112. }
  3113. //*****************************************************************************
  3114. //
  3115. //! Sets the configuration for USB power fault.
  3116. //!
  3117. //! \param ulBase specifies the USB module base address.
  3118. //! \param ulFlags specifies the configuration of the power fault.
  3119. //!
  3120. //! This function controls how the USB controller uses its external power
  3121. //! control pins(USBnPFTL and USBnEPEN). The flags specify the power
  3122. //! fault level sensitivity, the power fault action, and the power enable level
  3123. //! and source.
  3124. //!
  3125. //! One of the following can be selected as the power fault level
  3126. //! sensitivity:
  3127. //!
  3128. //! - \b USB_HOST_PWRFLT_LOW - An external power fault is indicated by the pin
  3129. //! being driven low.
  3130. //! - \b USB_HOST_PWRFLT_HIGH - An external power fault is indicated by the pin
  3131. //! being driven high.
  3132. //!
  3133. //! One of the following can be selected as the power fault action:
  3134. //!
  3135. //! - \b USB_HOST_PWRFLT_EP_NONE - No automatic action when power fault
  3136. //! detected.
  3137. //! - \b USB_HOST_PWRFLT_EP_TRI - Automatically Tri-state the USBnEPEN pin on a
  3138. //! power fault.
  3139. //! - \b USB_HOST_PWRFLT_EP_LOW - Automatically drive USBnEPEN pin low on a
  3140. //! power fault.
  3141. //! - \b USB_HOST_PWRFLT_EP_HIGH - Automatically drive USBnEPEN pin high on a
  3142. //! power fault.
  3143. //!
  3144. //! One of the following can be selected as the power enable level and source:
  3145. //!
  3146. //! - \b USB_HOST_PWREN_MAN_LOW - USBEPEN is driven low by the USB controller
  3147. //! when USBHostPwrEnable() is called.
  3148. //! - \b USB_HOST_PWREN_MAN_HIGH - USBEPEN is driven high by the USB controller
  3149. //! when USBHostPwrEnable() is called.
  3150. //! - \b USB_HOST_PWREN_AUTOLOW - USBEPEN is driven low by the USB controller
  3151. //! automatically if USBOTGSessionRequest() has
  3152. //! enabled a session.
  3153. //! - \b USB_HOST_PWREN_AUTOHIGH - USBEPEN is driven high by the USB controller
  3154. //! automatically if USBOTGSessionRequest() has
  3155. //! enabled a session.
  3156. //!
  3157. //! On devices that support the VBUS glitch filter, the
  3158. //! \b USB_HOST_PWREN_FILTER can be added to ignore small short drops in VBUS
  3159. //! level caused by high power consumption. This is mainly used to avoid
  3160. //! causing VBUS errors caused by devices with high in-rush current.
  3161. //!
  3162. //! \note The following values have been deprecated and should no longer be
  3163. //! used.
  3164. //! - \b USB_HOST_PWREN_LOW - Automatically drive USBnEPEN low when power is
  3165. //! enabled.
  3166. //! - \b USB_HOST_PWREN_HIGH - Automatically drive USBnEPEN high when power is
  3167. //! enabled.
  3168. //! - \b USB_HOST_PWREN_VBLOW - Automatically drive USBnEPEN low when power is
  3169. //! enabled.
  3170. //! - \b USB_HOST_PWREN_VBHIGH - Automatically drive USBnEPEN high when power is
  3171. //! enabled.
  3172. //!
  3173. //! \note This function should only be called on microcontrollers that support
  3174. //! host mode or OTG operation.
  3175. //!
  3176. //! \return None.
  3177. //
  3178. //*****************************************************************************
  3179. void
  3180. USBHostPwrConfig(unsigned long ulBase, unsigned long ulFlags)
  3181. {
  3182. //
  3183. // Check the arguments.
  3184. //
  3185. ASSERT(ulBase == USB0_BASE);
  3186. ASSERT((ulFlags & ~(USB_EPC_PFLTACT_M | USB_EPC_PFLTAEN |
  3187. USB_EPC_PFLTSEN_HIGH | USB_EPC_EPEN_M)) == 0);
  3188. //
  3189. // If requested, enable VBUS droop detection on parts that support this
  3190. // feature.
  3191. //
  3192. HWREG(ulBase + USB_O_VDC) = ulFlags >> 16;
  3193. //
  3194. // Set the power fault configuration as specified. This will not change
  3195. // whether fault detection is enabled or not.
  3196. //
  3197. HWREGH(ulBase + USB_O_EPC) =
  3198. (ulFlags | (HWREGH(ulBase + USB_O_EPC) &
  3199. ~(USB_EPC_PFLTACT_M | USB_EPC_PFLTAEN |
  3200. USB_EPC_PFLTSEN_HIGH | USB_EPC_EPEN_M)));
  3201. }
  3202. //*****************************************************************************
  3203. //
  3204. //! Enables power fault detection.
  3205. //!
  3206. //! \param ulBase specifies the USB module base address.
  3207. //!
  3208. //! This function enables power fault detection in the USB controller. If the
  3209. //! USBPFLT pin is not in use this function should not be used.
  3210. //!
  3211. //! \note This function should only be called in host mode.
  3212. //!
  3213. //! \return None.
  3214. //
  3215. //*****************************************************************************
  3216. void
  3217. USBHostPwrFaultEnable(unsigned long ulBase)
  3218. {
  3219. //
  3220. // Check the arguments.
  3221. //
  3222. ASSERT(ulBase == USB0_BASE);
  3223. //
  3224. // Enable power fault input.
  3225. //
  3226. HWREGH(ulBase + USB_O_EPC) |= USB_EPC_PFLTEN;
  3227. }
  3228. //*****************************************************************************
  3229. //
  3230. //! Disables power fault detection.
  3231. //!
  3232. //! \param ulBase specifies the USB module base address.
  3233. //!
  3234. //! This function disables power fault detection in the USB controller.
  3235. //!
  3236. //! \note This function should only be called in host mode.
  3237. //!
  3238. //! \return None.
  3239. //
  3240. //*****************************************************************************
  3241. void
  3242. USBHostPwrFaultDisable(unsigned long ulBase)
  3243. {
  3244. //
  3245. // Check the arguments.
  3246. //
  3247. ASSERT(ulBase == USB0_BASE);
  3248. //
  3249. // Enable power fault input.
  3250. //
  3251. HWREGH(ulBase + USB_O_EPC) &= ~USB_EPC_PFLTEN;
  3252. }
  3253. //*****************************************************************************
  3254. //
  3255. //! Enables the external power pin.
  3256. //!
  3257. //! \param ulBase specifies the USB module base address.
  3258. //!
  3259. //! This function enables the USBEPEN signal to enable an external power supply
  3260. //! in host mode operation.
  3261. //!
  3262. //! \note This function should only be called in host mode.
  3263. //!
  3264. //! \return None.
  3265. //
  3266. //*****************************************************************************
  3267. void
  3268. USBHostPwrEnable(unsigned long ulBase)
  3269. {
  3270. //
  3271. // Check the arguments.
  3272. //
  3273. ASSERT(ulBase == USB0_BASE);
  3274. //
  3275. // Enable the external power supply enable signal.
  3276. //
  3277. HWREGH(ulBase + USB_O_EPC) |= USB_EPC_EPENDE;
  3278. }
  3279. //*****************************************************************************
  3280. //
  3281. //! Disables the external power pin.
  3282. //!
  3283. //! \param ulBase specifies the USB module base address.
  3284. //!
  3285. //! This function disables the USBEPEN signal to disable an external power
  3286. //! supply in host mode operation.
  3287. //!
  3288. //! \note This function should only be called in host mode.
  3289. //!
  3290. //! \return None.
  3291. //
  3292. //*****************************************************************************
  3293. void
  3294. USBHostPwrDisable(unsigned long ulBase)
  3295. {
  3296. //
  3297. // Check the arguments.
  3298. //
  3299. ASSERT(ulBase == USB0_BASE);
  3300. //
  3301. // Disable the external power supply enable signal.
  3302. //
  3303. HWREGH(ulBase + USB_O_EPC) &= ~USB_EPC_EPENDE;
  3304. }
  3305. //*****************************************************************************
  3306. //
  3307. //! Get the current frame number.
  3308. //!
  3309. //! \param ulBase specifies the USB module base address.
  3310. //!
  3311. //! This function returns the last frame number received.
  3312. //!
  3313. //! \return The last frame number received.
  3314. //
  3315. //*****************************************************************************
  3316. unsigned long
  3317. USBFrameNumberGet(unsigned long ulBase)
  3318. {
  3319. //
  3320. // Check the arguments.
  3321. //
  3322. ASSERT(ulBase == USB0_BASE);
  3323. //
  3324. // Return the most recent frame number.
  3325. //
  3326. return(HWREGH(ulBase + USB_O_FRAME));
  3327. }
  3328. //*****************************************************************************
  3329. //
  3330. //! Starts or ends a session.
  3331. //!
  3332. //! \param ulBase specifies the USB module base address.
  3333. //! \param bStart specifies if this call starts or ends a session.
  3334. //!
  3335. //! This function is used in OTG mode to start a session request or end a
  3336. //! session. If the \e bStart parameter is set to \b true, then this function
  3337. //! start a session and if it is \b false it will end a session.
  3338. //!
  3339. //! \return None.
  3340. //
  3341. //*****************************************************************************
  3342. void
  3343. USBOTGSessionRequest(unsigned long ulBase, tBoolean bStart)
  3344. {
  3345. //
  3346. // Check the arguments.
  3347. //
  3348. ASSERT(ulBase == USB0_BASE);
  3349. //
  3350. // Start or end the session as directed.
  3351. //
  3352. if(bStart)
  3353. {
  3354. HWREGB(ulBase + USB_O_DEVCTL) |= USB_DEVCTL_SESSION;
  3355. }
  3356. else
  3357. {
  3358. HWREGB(ulBase + USB_O_DEVCTL) &= ~USB_DEVCTL_SESSION;
  3359. }
  3360. }
  3361. //*****************************************************************************
  3362. //
  3363. //! Returns the absolute FIFO address for a given endpoint.
  3364. //!
  3365. //! \param ulBase specifies the USB module base address.
  3366. //! \param ulEndpoint specifies which endpoint's FIFO address to return.
  3367. //!
  3368. //! This function returns the actual physical address of the FIFO. This is
  3369. //! needed when the USB is going to be used with the uDMA controller and the
  3370. //! source or destination address needs to be set to the physical FIFO address
  3371. //! for a given endpoint.
  3372. //!
  3373. //! \return None.
  3374. //
  3375. //*****************************************************************************
  3376. unsigned long
  3377. USBFIFOAddrGet(unsigned long ulBase, unsigned long ulEndpoint)
  3378. {
  3379. //
  3380. // Return the FIFO address for this endpoint.
  3381. //
  3382. return(ulBase + USB_O_FIFO0 + (ulEndpoint >> 2));
  3383. }
  3384. //*****************************************************************************
  3385. //
  3386. //! Returns the current operating mode of the controller.
  3387. //!
  3388. //! \param ulBase specifies the USB module base address.
  3389. //!
  3390. //! This function returns the current operating mode on USB controllers with
  3391. //! OTG or Dual mode functionality.
  3392. //!
  3393. //! For OTG controllers:
  3394. //!
  3395. //! The function will return on of the following values on OTG controllers:
  3396. //! \b USB_OTG_MODE_ASIDE_HOST, \b USB_OTG_MODE_ASIDE_DEV,
  3397. //! \b USB_OTG_MODE_BSIDE_HOST, \b USB_OTG_MODE_BSIDE_DEV,
  3398. //! \b USB_OTG_MODE_NONE.
  3399. //!
  3400. //! \b USB_OTG_MODE_ASIDE_HOST indicates that the controller is in host mode
  3401. //! on the A-side of the cable.
  3402. //!
  3403. //! \b USB_OTG_MODE_ASIDE_DEV indicates that the controller is in device mode
  3404. //! on the A-side of the cable.
  3405. //!
  3406. //! \b USB_OTG_MODE_BSIDE_HOST indicates that the controller is in host mode
  3407. //! on the B-side of the cable.
  3408. //!
  3409. //! \b USB_OTG_MODE_BSIDE_DEV indicates that the controller is in device mode
  3410. //! on the B-side of the cable. If and OTG session request is started with no
  3411. //! cable in place this is the default mode for the controller.
  3412. //!
  3413. //! \b USB_OTG_MODE_NONE indicates that the controller is not attempting to
  3414. //! determine its role in the system.
  3415. //!
  3416. //! For Dual Mode controllers:
  3417. //!
  3418. //! The function will return on of the following values:
  3419. //! \b USB_DUAL_MODE_HOST, \b USB_DUAL_MODE_DEVICE, or
  3420. //! \b USB_DUAL_MODE_NONE.
  3421. //!
  3422. //! \b USB_DUAL_MODE_HOST indicates that the controller is acting as a host.
  3423. //!
  3424. //! \b USB_DUAL_MODE_DEVICE indicates that the controller acting as a device.
  3425. //!
  3426. //! \b USB_DUAL_MODE_NONE indicates that the controller is not active as
  3427. //! either a host or device.
  3428. //!
  3429. //! \return Returns \b USB_OTG_MODE_ASIDE_HOST, \b USB_OTG_MODE_ASIDE_DEV,
  3430. //! \b USB_OTG_MODE_BSIDE_HOST, \b USB_OTG_MODE_BSIDE_DEV,
  3431. //! \b USB_OTG_MODE_NONE, \b USB_DUAL_MODE_HOST, \b USB_DUAL_MODE_DEVICE, or
  3432. //! \b USB_DUAL_MODE_NONE.
  3433. //
  3434. //*****************************************************************************
  3435. unsigned long
  3436. USBModeGet(unsigned long ulBase)
  3437. {
  3438. //
  3439. // Check the arguments.
  3440. //
  3441. ASSERT(ulBase == USB0_BASE);
  3442. //
  3443. // Checks the current mode in the USB_O_DEVCTL and returns the current
  3444. // mode.
  3445. //
  3446. // USB_OTG_MODE_ASIDE_HOST: USB_DEVCTL_HOST | USB_DEVCTL_SESSION
  3447. // USB_OTG_MODE_ASIDE_DEV: USB_DEVCTL_SESSION
  3448. // USB_OTG_MODE_BSIDE_HOST: USB_DEVCTL_DEV | USB_DEVCTL_SESSION |
  3449. // USB_DEVCTL_HOST
  3450. // USB_OTG_MODE_BSIDE_DEV: USB_DEVCTL_DEV | USB_DEVCTL_SESSION
  3451. // USB_OTG_MODE_NONE: USB_DEVCTL_DEV
  3452. //
  3453. return(HWREGB(ulBase + USB_O_DEVCTL) &
  3454. (USB_DEVCTL_DEV | USB_DEVCTL_HOST | USB_DEVCTL_SESSION |
  3455. USB_DEVCTL_VBUS_M));
  3456. }
  3457. //*****************************************************************************
  3458. //
  3459. //! Sets the DMA channel to use for a given endpoint.
  3460. //!
  3461. //! \param ulBase specifies the USB module base address.
  3462. //! \param ulEndpoint specifies which endpoint's FIFO address to return.
  3463. //! \param ulChannel specifies which DMA channel to use for which endpoint.
  3464. //!
  3465. //! This function is used to configure which DMA channel to use with a given
  3466. //! endpoint. Receive DMA channels can only be used with receive endpoints
  3467. //! and transmit DMA channels can only be used with transmit endpoints. This
  3468. //! allows the 3 receive and 3 transmit DMA channels to be mapped to any
  3469. //! endpoint other than 0. The values that should be passed into the \e
  3470. //! ulChannel value are the UDMA_CHANNEL_USBEP* values defined in udma.h.
  3471. //!
  3472. //! \note This function only has an effect on microcontrollers that have the
  3473. //! ability to change the DMA channel for an endpoint. Calling this function
  3474. //! on other devices will have no effect.
  3475. //!
  3476. //! \return None.
  3477. //!
  3478. //*****************************************************************************
  3479. void
  3480. USBEndpointDMAChannel(unsigned long ulBase, unsigned long ulEndpoint,
  3481. unsigned long ulChannel)
  3482. {
  3483. unsigned long ulMask;
  3484. //
  3485. // Check the arguments.
  3486. //
  3487. ASSERT(ulBase == USB0_BASE);
  3488. ASSERT((ulEndpoint == USB_EP_1) || (ulEndpoint == USB_EP_2) ||
  3489. (ulEndpoint == USB_EP_3) || (ulEndpoint == USB_EP_4) ||
  3490. (ulEndpoint == USB_EP_5) || (ulEndpoint == USB_EP_6) ||
  3491. (ulEndpoint == USB_EP_7) || (ulEndpoint == USB_EP_8) ||
  3492. (ulEndpoint == USB_EP_9) || (ulEndpoint == USB_EP_10) ||
  3493. (ulEndpoint == USB_EP_11) || (ulEndpoint == USB_EP_12) ||
  3494. (ulEndpoint == USB_EP_13) || (ulEndpoint == USB_EP_14) ||
  3495. (ulEndpoint == USB_EP_15));
  3496. ASSERT(ulChannel <= UDMA_CHANNEL_USBEP3TX);
  3497. //
  3498. // The input select mask needs to be shifted into the correct position
  3499. // based on the channel.
  3500. //
  3501. ulMask = 0xf << (ulChannel * 4);
  3502. //
  3503. // Clear out the current selection for the channel.
  3504. //
  3505. ulMask = HWREG(ulBase + USB_O_DMASEL) & (~ulMask);
  3506. //
  3507. // The input select is now shifted into the correct position based on the
  3508. // channel.
  3509. //
  3510. ulMask |= (USB_EP_TO_INDEX(ulEndpoint)) << (ulChannel * 4);
  3511. //
  3512. // Write the value out to the register.
  3513. //
  3514. HWREG(ulBase + USB_O_DMASEL) = ulMask;
  3515. }
  3516. //*****************************************************************************
  3517. //
  3518. //! Change the mode of the USB controller to host.
  3519. //!
  3520. //! \param ulBase specifies the USB module base address.
  3521. //!
  3522. //! This function changes the mode of the USB controller to host mode. This
  3523. //! is only valid on microcontrollers that have the host and device
  3524. //! capabilities and not the OTG capabilities.
  3525. //!
  3526. //! \return None.
  3527. //
  3528. //*****************************************************************************
  3529. void
  3530. USBHostMode(unsigned long ulBase)
  3531. {
  3532. //
  3533. // Check the arguments.
  3534. //
  3535. ASSERT(ulBase == USB0_BASE);
  3536. //
  3537. // Force mode in OTG parts that support forcing USB controller mode.
  3538. // This bit is not writable in USB controllers that do not support
  3539. // forcing the mode. Not setting the USB_GPCS_DEVMOD bit makes this a
  3540. // force of host mode.
  3541. //
  3542. HWREGB(ulBase + USB_O_GPCS) = USB_GPCS_DEVMODOTG;
  3543. }
  3544. //*****************************************************************************
  3545. //
  3546. //! Change the mode of the USB controller to device.
  3547. //!
  3548. //! \param ulBase specifies the USB module base address.
  3549. //!
  3550. //! This function changes the mode of the USB controller to device mode. This
  3551. //! is only valid on microcontrollers that have the host and device
  3552. //! capabilities and not the OTG capabilities.
  3553. //!
  3554. //! \return None.
  3555. //
  3556. //*****************************************************************************
  3557. void
  3558. USBDevMode(unsigned long ulBase)
  3559. {
  3560. //
  3561. // Check the arguments.
  3562. //
  3563. ASSERT(ulBase == USB0_BASE);
  3564. //
  3565. // Set the USB controller mode to device.
  3566. //
  3567. HWREGB(ulBase + USB_O_GPCS) = USB_GPCS_DEVMODOTG | USB_GPCS_DEVMOD;
  3568. }
  3569. //*****************************************************************************
  3570. //
  3571. // Close the Doxygen group.
  3572. //! @}
  3573. //
  3574. //*****************************************************************************