usb_glue_esp.c 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120
  1. /*
  2. * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. */
  6. #include "sdkconfig.h"
  7. #include "esp_idf_version.h"
  8. #include "esp_intr_alloc.h"
  9. #include "esp_private/usb_phy.h"
  10. #include "soc/periph_defs.h"
  11. #include "usbd_core.h"
  12. #include "usbh_core.h"
  13. #ifdef CONFIG_IDF_TARGET_ESP32S2
  14. #define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ
  15. #elif CONFIG_IDF_TARGET_ESP32S3
  16. #define DEFAULT_CPU_FREQ_MHZ CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ
  17. #else
  18. #define DEFAULT_CPU_FREQ_MHZ 160
  19. #endif
  20. uint32_t SystemCoreClock = (DEFAULT_CPU_FREQ_MHZ * 1000 * 1000);
  21. static usb_phy_handle_t s_phy_handle = NULL;
  22. static intr_handle_t s_interrupt_handle = NULL;
  23. static void usb_dc_interrupt_cb(void *arg_pv)
  24. {
  25. extern void USBD_IRQHandler(uint8_t busid);
  26. USBD_IRQHandler(0);
  27. }
  28. void usb_dc_low_level_init(void)
  29. {
  30. usb_phy_config_t phy_config = {
  31. .controller = USB_PHY_CTRL_OTG,
  32. .otg_mode = USB_OTG_MODE_DEVICE,
  33. .target = USB_PHY_TARGET_INT,
  34. };
  35. esp_err_t ret = usb_new_phy(&phy_config, &s_phy_handle);
  36. if (ret != ESP_OK) {
  37. USB_LOG_ERR("USB Phy Init Failed!\r\n");
  38. return;
  39. }
  40. // TODO: Check when to enable interrupt
  41. ret = esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LEVEL2, usb_dc_interrupt_cb, 0, &s_interrupt_handle);
  42. if (ret != ESP_OK) {
  43. USB_LOG_ERR("USB Interrupt Init Failed!\r\n");
  44. return;
  45. }
  46. USB_LOG_INFO("cherryusb, version: 0x%06x\r\n", CHERRYUSB_VERSION);
  47. }
  48. void usb_dc_low_level_deinit(void)
  49. {
  50. if (s_interrupt_handle) {
  51. esp_intr_free(s_interrupt_handle);
  52. s_interrupt_handle = NULL;
  53. }
  54. if (s_phy_handle) {
  55. usb_del_phy(s_phy_handle);
  56. s_phy_handle = NULL;
  57. }
  58. }
  59. uint32_t usbd_get_dwc2_gccfg_conf(uint32_t reg_base)
  60. {
  61. return 0;
  62. }
  63. static void usb_hc_interrupt_cb(void *arg_pv)
  64. {
  65. extern void USBH_IRQHandler(uint8_t busid);
  66. USBH_IRQHandler(0);
  67. }
  68. void usb_hc_low_level_init(struct usbh_bus *bus)
  69. {
  70. // Host Library defaults to internal PHY
  71. usb_phy_config_t phy_config = {
  72. .controller = USB_PHY_CTRL_OTG,
  73. .target = USB_PHY_TARGET_INT,
  74. .otg_mode = USB_OTG_MODE_HOST,
  75. .otg_speed = USB_PHY_SPEED_UNDEFINED, // In Host mode, the speed is determined by the connected device
  76. .ext_io_conf = NULL,
  77. .otg_io_conf = NULL,
  78. };
  79. esp_err_t ret = usb_new_phy(&phy_config, &s_phy_handle);
  80. if (ret != ESP_OK) {
  81. USB_LOG_ERR("USB Phy Init Failed!\r\n");
  82. return;
  83. }
  84. // TODO: Check when to enable interrupt
  85. ret = esp_intr_alloc(ETS_USB_INTR_SOURCE, ESP_INTR_FLAG_LEVEL2, usb_hc_interrupt_cb, 0, &s_interrupt_handle);
  86. if (ret != ESP_OK) {
  87. USB_LOG_ERR("USB Interrupt Init Failed!\r\n");
  88. return;
  89. }
  90. USB_LOG_INFO("cherryusb, version: 0x%06x\r\n", CHERRYUSB_VERSION);
  91. }
  92. void usb_hc_low_level_deinit(struct usbh_bus *bus)
  93. {
  94. if (s_interrupt_handle) {
  95. esp_intr_free(s_interrupt_handle);
  96. s_interrupt_handle = NULL;
  97. }
  98. if (s_phy_handle) {
  99. usb_del_phy(s_phy_handle);
  100. s_phy_handle = NULL;
  101. }
  102. }
  103. uint32_t usbh_get_dwc2_gccfg_conf(uint32_t reg_base)
  104. {
  105. return 0;
  106. }