board.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371
  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x.h"
  17. #include "board.h"
  18. static void rt_hw_console_init(void);
  19. /**
  20. * @addtogroup STM32
  21. */
  22. /*@{*/
  23. /*******************************************************************************
  24. * Function Name : RCC_Configuration
  25. * Description : Configures the different system clocks.
  26. * Input : None
  27. * Output : None
  28. * Return : None
  29. *******************************************************************************/
  30. void RCC_Configuration(void)
  31. {
  32. ErrorStatus HSEStartUpStatus;
  33. /* RCC system reset(for debug purpose) */
  34. RCC_DeInit();
  35. /* Enable HSE */
  36. RCC_HSEConfig(RCC_HSE_ON);
  37. /* Wait till HSE is ready */
  38. HSEStartUpStatus = RCC_WaitForHSEStartUp();
  39. if (HSEStartUpStatus == SUCCESS)
  40. {
  41. /* HCLK = SYSCLK */
  42. RCC_HCLKConfig(RCC_SYSCLK_Div1);
  43. /* PCLK2 = HCLK */
  44. RCC_PCLK2Config(RCC_HCLK_Div1);
  45. /* PCLK1 = HCLK/2 */
  46. RCC_PCLK1Config(RCC_HCLK_Div2);
  47. /* Flash 2 wait state */
  48. FLASH_SetLatency(FLASH_Latency_2);
  49. /* Enable Prefetch Buffer */
  50. FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
  51. /* PLLCLK = 8MHz * 9 = 72 MHz */
  52. RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
  53. /* Enable PLL */
  54. RCC_PLLCmd(ENABLE);
  55. /* Wait till PLL is ready */
  56. while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
  57. /* Select PLL as system clock source */
  58. RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  59. /* Wait till PLL is used as system clock source */
  60. while (RCC_GetSYSCLKSource() != 0x08) ;
  61. }
  62. }
  63. /*******************************************************************************
  64. * Function Name : NVIC_Configuration
  65. * Description : Configures Vector Table base location.
  66. * Input : None
  67. * Output : None
  68. * Return : None
  69. *******************************************************************************/
  70. void NVIC_Configuration(void)
  71. {
  72. #ifdef VECT_TAB_RAM
  73. /* Set the Vector Table base location at 0x20000000 */
  74. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  75. #else /* VECT_TAB_FLASH */
  76. /* Set the Vector Table base location at 0x08000000 */
  77. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  78. #endif
  79. /*
  80. * set priority group:
  81. * 2 bits for pre-emption priority
  82. * 2 bits for subpriority
  83. */
  84. NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
  85. }
  86. /*******************************************************************************
  87. * Function Name : SysTick_Configuration
  88. * Description : Configures the SysTick for OS tick.
  89. * Input : None
  90. * Output : None
  91. * Return : None
  92. *******************************************************************************/
  93. void SysTick_Configuration(void)
  94. {
  95. RCC_ClocksTypeDef rcc_clocks;
  96. rt_uint32_t cnts;
  97. RCC_GetClocksFreq(&rcc_clocks);
  98. cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
  99. SysTick_Config(cnts);
  100. SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
  101. }
  102. extern void rt_hw_interrupt_thread_switch(void);
  103. /**
  104. * This is the timer interrupt service routine.
  105. *
  106. */
  107. void rt_hw_timer_handler(void)
  108. {
  109. /* enter interrupt */
  110. rt_interrupt_enter();
  111. rt_tick_increase();
  112. /* leave interrupt */
  113. rt_interrupt_leave();
  114. }
  115. /* NAND Flash */
  116. #include "fsmc_nand.h"
  117. /**
  118. * This function will initial STM32 Radio board.
  119. */
  120. extern void FSMC_SRAM_Init(void);
  121. void rt_hw_board_init()
  122. {
  123. NAND_IDTypeDef NAND_ID;
  124. /* Configure the system clocks */
  125. RCC_Configuration();
  126. /* DM9000A */
  127. {
  128. GPIO_InitTypeDef GPIO_InitStructure;
  129. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE,ENABLE);
  130. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
  131. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  132. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  133. GPIO_Init(GPIOE,&GPIO_InitStructure);
  134. GPIO_SetBits(GPIOE,GPIO_Pin_5);
  135. }
  136. /* NVIC Configuration */
  137. NVIC_Configuration();
  138. /* Configure the SysTick */
  139. SysTick_Configuration();
  140. /* Console Initialization*/
  141. rt_hw_console_init();
  142. /* FSMC Initialization */
  143. FSMC_NAND_Init();
  144. /* NAND read ID command */
  145. FSMC_NAND_ReadID(&NAND_ID);
  146. rt_kprintf("\r\n\r\nRead the NAND ID:%02X%02X%02X%02X",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
  147. /* SRAM init */
  148. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  149. FSMC_SRAM_Init();
  150. /* memtest */
  151. {
  152. unsigned char * p_extram = (unsigned char *)0x68000000;
  153. unsigned int temp;
  154. rt_kprintf("\r\nmem testing....");
  155. for(temp=0; temp<0x80000; temp++)
  156. {
  157. *p_extram++ = (unsigned char)temp;
  158. }
  159. p_extram = (unsigned char *)0x68000000;
  160. for(temp=0; temp<0x80000; temp++)
  161. {
  162. if( *p_extram++ != (unsigned char)temp )
  163. {
  164. rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
  165. while(1);
  166. }
  167. }
  168. rt_kprintf("\rmem test pass!!\r\n");
  169. }/* memtest */
  170. {
  171. /* PC6 for SDCard Rst */
  172. GPIO_InitTypeDef GPIO_InitStructure;
  173. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  174. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  175. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  176. GPIO_Init(GPIOC,&GPIO_InitStructure);
  177. GPIO_SetBits(GPIOC,GPIO_Pin_6);
  178. }
  179. /* SPI1 config */
  180. {
  181. GPIO_InitTypeDef GPIO_InitStructure;
  182. SPI_InitTypeDef SPI_InitStructure;
  183. /* Enable SPI1 Periph clock */
  184. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
  185. | RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
  186. ENABLE);
  187. /* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
  188. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
  189. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  190. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  191. GPIO_Init(GPIOA, &GPIO_InitStructure);
  192. /*------------------------ SPI1 configuration ------------------------*/
  193. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
  194. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  195. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  196. SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
  197. SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
  198. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  199. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;/* 72M/64=1.125M */
  200. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  201. SPI_InitStructure.SPI_CRCPolynomial = 7;
  202. SPI_I2S_DeInit(SPI1);
  203. SPI_Init(SPI1, &SPI_InitStructure);
  204. /* Enable SPI_MASTER */
  205. SPI_Cmd(SPI1, ENABLE);
  206. SPI_CalculateCRC(SPI1, DISABLE);
  207. }
  208. }/* rt_hw_board_init */
  209. #if STM32_CONSOLE_USART == 1
  210. #define CONSOLE_RX_PIN GPIO_Pin_9
  211. #define CONSOLE_TX_PIN GPIO_Pin_10
  212. #define CONSOLE_GPIO GPIOA
  213. #define CONSOLE_USART USART1
  214. #elif STM32_CONSOLE_USART == 2
  215. #if defined(STM32_LD) || defined(STM32_MD)
  216. #define CONSOLE_RX_PIN GPIO_Pin_6
  217. #define CONSOLE_TX_PIN GPIO_Pin_5
  218. #define CONSOLE_GPIO GPIOD
  219. #elif defined(STM32_HD)
  220. #define CONSOLE_RX_PIN GPIO_Pin_3
  221. #define CONSOLE_TX_PIN GPIO_Pin_2
  222. #define CONSOLE_GPIO GPIOA
  223. #endif
  224. #define CONSOLE_USART USART2
  225. #elif STM32_CONSOLE_USART == 2
  226. #define CONSOLE_RX_PIN GPIO_Pin_11
  227. #define CONSOLE_TX_PIN GPIO_Pin_10
  228. #define CONSOLE_GPIO GPIOB
  229. #define CONSOLE_USART USART3
  230. #endif
  231. /* init console to support rt_kprintf */
  232. static void rt_hw_console_init(void)
  233. {
  234. /* Enable USART1 and GPIOA clocks */
  235. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1
  236. | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC
  237. | RCC_APB2Periph_GPIOF, ENABLE);
  238. #if STM32_CONSOLE_USART == 0
  239. #else
  240. /* GPIO configuration */
  241. {
  242. GPIO_InitTypeDef GPIO_InitStructure;
  243. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  244. GPIO_InitStructure.GPIO_Pin = CONSOLE_RX_PIN;
  245. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  246. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  247. GPIO_Init(CONSOLE_GPIO, &GPIO_InitStructure);
  248. /* Configure USART1 Rx (PA.10) as input floating */
  249. GPIO_InitStructure.GPIO_Pin = CONSOLE_TX_PIN;
  250. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
  251. GPIO_Init(CONSOLE_GPIO, &GPIO_InitStructure);
  252. }
  253. /* USART configuration */
  254. {
  255. USART_InitTypeDef USART_InitStructure;
  256. /* USART configured as follow:
  257. - BaudRate = 115200 baud
  258. - Word Length = 8 Bits
  259. - One Stop Bit
  260. - No parity
  261. - Hardware flow control disabled (RTS and CTS signals)
  262. - Receive and transmit enabled
  263. - USART Clock disabled
  264. - USART CPOL: Clock is active low
  265. - USART CPHA: Data is captured on the middle
  266. - USART LastBit: The clock pulse of the last data bit is not output to
  267. the SCLK pin
  268. */
  269. USART_InitStructure.USART_BaudRate = 115200;
  270. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  271. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  272. USART_InitStructure.USART_Parity = USART_Parity_No;
  273. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  274. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  275. USART_Init(CONSOLE_USART, &USART_InitStructure);
  276. /* Enable USART1 */
  277. USART_Cmd(CONSOLE_USART, ENABLE);
  278. }
  279. #endif
  280. }
  281. /* write one character to serial, must not trigger interrupt */
  282. static void rt_hw_console_putc(const char c)
  283. {
  284. /*
  285. to be polite with serial console add a line feed
  286. to the carriage return character
  287. */
  288. if (c=='\n')rt_hw_console_putc('\r');
  289. while (!(CONSOLE_USART->SR & USART_FLAG_TXE));
  290. CONSOLE_USART->DR = (c & 0x1FF);
  291. }
  292. /**
  293. * This function is used by rt_kprintf to display a string on console.
  294. *
  295. * @param str the displayed string
  296. */
  297. void rt_hw_console_output(const char* str)
  298. {
  299. #if STM32_CONSOLE_USART == 0
  300. /* no console */
  301. #else
  302. while (*str)
  303. {
  304. rt_hw_console_putc (*str++);
  305. }
  306. #endif
  307. }
  308. /*@}*/