serial.c 14 KB

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  1. /*
  2. * File : serial.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-02-05 Bernard first version
  13. * 2009-10-25 Bernard fix rt_serial_read bug when there is no data
  14. * in the buffer.
  15. */
  16. #include "serial.h"
  17. #include <stm32f10x_dma.h>
  18. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  19. rt_uint32_t address, rt_uint32_t size);
  20. /**
  21. * @addtogroup STM32
  22. */
  23. /*@{*/
  24. /**
  25. * This function read a character from serial without interrupt enable mode
  26. *
  27. * @return the read char
  28. */
  29. int rt_serial_getc(struct stm32_serial_device* uart)
  30. {
  31. rt_base_t level;
  32. int ch = -1;
  33. /* disable interrupt */
  34. level = rt_hw_interrupt_disable();
  35. if (uart->int_rx->read_index != uart->int_rx->save_index)
  36. {
  37. ch = uart->int_rx->rx_buffer[uart->int_rx->read_index];
  38. uart->int_rx->read_index ++;
  39. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  40. uart->int_rx->read_index = 0;
  41. }
  42. /* enable interrupt */
  43. rt_hw_interrupt_enable(level);
  44. return ch;
  45. }
  46. /* save a char to serial buffer */
  47. void rt_serial_savechar(struct stm32_serial_device* uart, char ch)
  48. {
  49. rt_base_t level;
  50. /* disable interrupt */
  51. level = rt_hw_interrupt_disable();
  52. uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
  53. uart->int_rx->save_index ++;
  54. if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
  55. uart->int_rx->save_index = 0;
  56. /* if the next position is read index, discard this 'read char' */
  57. if (uart->int_rx->save_index == uart->int_rx->read_index)
  58. {
  59. uart->int_rx->read_index ++;
  60. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  61. uart->int_rx->read_index = 0;
  62. }
  63. /* enable interrupt */
  64. rt_hw_interrupt_enable(level);
  65. }
  66. /**
  67. * This function will write a character to serial without interrupt enable mode
  68. *
  69. * @param c the char to write
  70. */
  71. void rt_serial_putc(rt_device_t device, const char c)
  72. {
  73. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  74. /*
  75. * to be polite with serial console add a line feed
  76. * to the carriage return character
  77. */
  78. if (c=='\n' && (device->flag & RT_DEVICE_FLAG_STREAM))
  79. rt_serial_putc(device, '\r');
  80. while (!(uart->uart_device->SR & USART_FLAG_TXE));
  81. uart->uart_device->DR = (c & 0x1FF);
  82. }
  83. /* RT-Thread Device Interface */
  84. static rt_err_t rt_serial_init (rt_device_t dev)
  85. {
  86. struct stm32_serial_device* uart = (struct stm32_serial_device*) dev->private;
  87. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  88. {
  89. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  90. {
  91. rt_memset(uart->int_rx->rx_buffer, 0,
  92. sizeof(uart->int_rx->rx_buffer));
  93. uart->int_rx->read_index = 0;
  94. uart->int_rx->save_index = 0;
  95. }
  96. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  97. {
  98. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  99. uart->dma_rx->read_index = uart->dma_rx->read_descriptor = 0;
  100. uart->dma_rx->is_full = RT_FALSE;
  101. }
  102. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  103. {
  104. rt_memset(uart->int_tx->tx_buffer, 0,
  105. sizeof(uart->int_tx->tx_buffer));
  106. uart->int_tx->write_index = uart->int_tx->save_index = 0;
  107. }
  108. if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  109. {
  110. RT_ASSERT(uart->dma_rx->dma_channel != RT_NULL);
  111. uart->dma_tx->list_head = uart->dma_tx->list_tail = RT_NULL;
  112. }
  113. /* Enable USART */
  114. USART_Cmd(uart->uart_device, ENABLE);
  115. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  116. }
  117. return RT_EOK;
  118. }
  119. static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
  120. {
  121. struct stm32_serial_device* uart;
  122. RT_ASSERT(dev != RT_NULL);
  123. uart = (struct stm32_serial_device*)dev->private;
  124. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  125. {
  126. /* enable Rx DMA */
  127. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  128. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  129. UART_DMA_RX_BUFFER_SIZE);
  130. }
  131. return RT_EOK;
  132. }
  133. static rt_err_t rt_serial_close(rt_device_t dev)
  134. {
  135. struct stm32_serial_device* uart;
  136. RT_ASSERT(dev != RT_NULL);
  137. uart = (struct stm32_serial_device*)dev->private;
  138. if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  139. {
  140. /* disable DMA */
  141. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  142. }
  143. return RT_EOK;
  144. }
  145. static rt_size_t rt_serial_read (rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  146. {
  147. rt_uint8_t* ptr;
  148. rt_err_t err_code;
  149. struct stm32_serial_device* uart;
  150. ptr = buffer;
  151. err_code = RT_EOK;
  152. uart = (struct stm32_serial_device*)dev->private;
  153. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  154. {
  155. rt_int32_t ch;
  156. /* interrupt mode Rx */
  157. while (size)
  158. {
  159. /* get a character */
  160. ch = rt_serial_getc(uart);
  161. if (ch < 0)
  162. {
  163. /* set error code */
  164. err_code = -RT_EEMPTY;
  165. break;
  166. }
  167. else
  168. {
  169. *ptr++ = ch;
  170. size --;
  171. }
  172. }
  173. }
  174. else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
  175. {
  176. /* check queue empty */
  177. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  178. {
  179. /* set error code */
  180. err_code = -RT_EEMPTY;
  181. }
  182. else
  183. {
  184. /* read data */
  185. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  186. {
  187. /* read buffer */
  188. *ptr ++ = uart->dma_rx->
  189. rx_buffer[uart->dma_rx->read_descriptor][uart->dma_rx->read_index];
  190. /* move to next position */
  191. uart->dma_rx->read_index ++;
  192. /* wrap read index */
  193. if (uart->dma_rx->read_index >= UART_DMA_RX_BUFFER_SIZE)
  194. {
  195. /* wrap read index */
  196. uart->dma_rx->read_index = 0;
  197. /* move to next read descriptor */
  198. uart->dma_rx->read_descriptor ++;
  199. /* wrap read descriptor */
  200. if (uart->dma_rx->read_descriptor >= UART_DMA_RX_DESCRIPTOR)
  201. uart->dma_rx->read_descriptor = 0;
  202. if (uart->dma_rx->is_full == RT_TRUE)
  203. {
  204. rt_uint32_t level;
  205. level = rt_hw_interrupt_disable();
  206. uart->dma_rx->save_descriptor ++;
  207. if (uart->dma_rx->save_descriptor >= UART_DMA_RX_DESCRIPTOR)
  208. uart->dma_rx->save_descriptor = 0;
  209. rt_hw_interrupt_enable(level);
  210. /* re-enable DMA to receive */
  211. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  212. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  213. UART_DMA_RX_BUFFER_SIZE);
  214. }
  215. /* check queue empty */
  216. if ((uart->dma_rx->read_descriptor == uart->dma_rx->save_descriptor))
  217. {
  218. /* set error code */
  219. err_code = -RT_EEMPTY;
  220. break;
  221. }
  222. }
  223. }
  224. }
  225. }
  226. else
  227. {
  228. /* polling mode */
  229. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  230. {
  231. while (uart->uart_device->SR & USART_FLAG_RXNE)
  232. {
  233. *ptr = uart->uart_device->DR & 0xff;
  234. ptr ++;
  235. }
  236. }
  237. }
  238. /* set error code */
  239. rt_set_errno(err_code);
  240. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  241. }
  242. static void rt_serial_enable_dma(DMA_Channel_TypeDef* dma_channel,
  243. rt_uint32_t address, rt_uint32_t size)
  244. {
  245. RT_ASSERT(dma_channel != RT_NULL);
  246. /* disable DMA */
  247. DMA_Cmd(dma_channel, DISABLE);
  248. /* set buffer address */
  249. dma_channel->CMAR = address;
  250. /* set size */
  251. dma_channel->CNDTR = size;
  252. /* enable DMA */
  253. DMA_Cmd(dma_channel, ENABLE);
  254. }
  255. static rt_size_t rt_serial_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  256. {
  257. rt_uint8_t* ptr;
  258. rt_err_t err_code;
  259. struct stm32_serial_device* uart;
  260. err_code = RT_EOK;
  261. ptr = (rt_uint8_t*)buffer;
  262. uart = (struct stm32_serial_device*)dev->private;
  263. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  264. {
  265. /* interrupt mode Tx */
  266. while (uart->int_tx->save_index != uart->int_tx->write_index)
  267. {
  268. /* save on tx buffer */
  269. uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
  270. -- size;
  271. /* move to next position */
  272. uart->int_tx->save_index ++;
  273. /* wrap save index */
  274. if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
  275. uart->int_tx->save_index = 0;
  276. }
  277. /* set error code */
  278. if (size > 0)
  279. err_code = -RT_EFULL;
  280. }
  281. else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  282. {
  283. /* DMA mode Tx */
  284. /* allocate a data node */
  285. struct stm32_serial_data_node* data_node =
  286. (struct stm32_serial_data_node*) rt_malloc (sizeof(struct stm32_serial_data_node));
  287. if (data_node == RT_NULL)
  288. {
  289. /* set error code */
  290. err_code = -RT_ENOMEM;
  291. }
  292. else
  293. {
  294. rt_uint32_t level;
  295. /* fill data node */
  296. data_node->data_ptr = ptr;
  297. data_node->data_size = size;
  298. /* insert to data link */
  299. data_node->next = RT_NULL;
  300. /* disable interrupt */
  301. level = rt_hw_interrupt_disable();
  302. data_node->prev = uart->dma_tx->list_tail;
  303. if (uart->dma_tx->list_tail != RT_NULL)
  304. uart->dma_tx->list_tail->next = data_node;
  305. uart->dma_tx->list_tail = data_node;
  306. if (uart->dma_tx->list_head == RT_NULL)
  307. {
  308. /* start DMA to transmit data */
  309. uart->dma_tx->list_head = data_node;
  310. /* Enable DMA Channel */
  311. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  312. (rt_uint32_t)uart->dma_tx->list_head->data_ptr,
  313. uart->dma_tx->list_head->data_size);
  314. }
  315. /* enable interrupt */
  316. rt_hw_interrupt_enable(level);
  317. }
  318. }
  319. else
  320. {
  321. /* polling mode */
  322. while (size)
  323. {
  324. rt_serial_putc(dev, *ptr);
  325. ++ptr; --size;
  326. }
  327. }
  328. /* set error code */
  329. rt_set_errno(err_code);
  330. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  331. }
  332. static rt_err_t rt_serial_control (rt_device_t dev, rt_uint8_t cmd, void *args)
  333. {
  334. struct stm32_serial_device* uart;
  335. RT_ASSERT(dev != RT_NULL);
  336. uart = (struct stm32_serial_device*)dev->private;
  337. switch (cmd)
  338. {
  339. case RT_DEVICE_CTRL_SUSPEND:
  340. /* suspend device */
  341. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  342. USART_Cmd(uart->uart_device, DISABLE);
  343. break;
  344. case RT_DEVICE_CTRL_RESUME:
  345. /* resume device */
  346. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  347. USART_Cmd(uart->uart_device, ENABLE);
  348. break;
  349. }
  350. return RT_EOK;
  351. }
  352. /*
  353. * serial register for STM32
  354. * support STM32F103VB and STM32F103ZE
  355. */
  356. rt_err_t rt_hw_serial_register(rt_device_t device, const char* name, rt_uint32_t flag, struct stm32_serial_device *serial)
  357. {
  358. RT_ASSERT(device != RT_NULL);
  359. device->type = RT_Device_Class_Char;
  360. device->rx_indicate = RT_NULL;
  361. device->tx_complete = RT_NULL;
  362. device->init = rt_serial_init;
  363. device->open = rt_serial_open;
  364. device->close = rt_serial_close;
  365. device->read = rt_serial_read;
  366. device->write = rt_serial_write;
  367. device->control = rt_serial_control;
  368. device->private = serial;
  369. /* register a character device */
  370. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  371. }
  372. /* ISR for serial interrupt */
  373. void rt_hw_serial_isr(rt_device_t device)
  374. {
  375. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  376. if(USART_GetITStatus(uart->uart_device, USART_IT_RXNE) != RESET)
  377. {
  378. /* interrupt mode receive */
  379. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
  380. /* save on rx buffer */
  381. while (uart->uart_device->SR & USART_FLAG_RXNE)
  382. {
  383. rt_serial_savechar(uart, uart->uart_device->DR & 0xff);
  384. }
  385. /* clear interrupt */
  386. USART_ClearITPendingBit(uart->uart_device, USART_IT_RXNE);
  387. /* invoke callback */
  388. if (device->rx_indicate != RT_NULL)
  389. {
  390. rt_size_t rx_length;
  391. /* get rx length */
  392. rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
  393. UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
  394. uart->int_rx->save_index - uart->int_rx->read_index;
  395. device->rx_indicate(device, rx_length);
  396. }
  397. }
  398. if (USART_GetITStatus(uart->uart_device, USART_IT_TC) != RESET)
  399. {
  400. /* interrupt mode transmission */
  401. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_TX);
  402. /* transmission completed */
  403. uart->int_tx->write_index ++;
  404. if (uart->int_tx->write_index >= UART_TX_BUFFER_SIZE)
  405. uart->int_tx->write_index = 0;
  406. /* clear interrupt */
  407. USART_ClearITPendingBit(uart->uart_device, USART_IT_TC);
  408. /* start next transmission */
  409. if (uart->int_tx->write_index <
  410. uart->int_tx->save_index)
  411. {
  412. uart->uart_device->DR = uart->int_tx
  413. ->tx_buffer[uart->int_tx->write_index];
  414. }
  415. }
  416. }
  417. /*
  418. * ISR for DMA mode Rx
  419. */
  420. void rt_hw_serial_dma_rx_isr(rt_device_t device)
  421. {
  422. rt_uint32_t next_descriptor;
  423. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  424. /* DMA mode receive */
  425. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_RX);
  426. /* invoke callback */
  427. if (device->rx_indicate != RT_NULL)
  428. device->rx_indicate(device, UART_DMA_RX_BUFFER_SIZE);
  429. next_descriptor = uart->dma_rx->save_descriptor;
  430. /* move to next descriptor */
  431. next_descriptor ++;
  432. if (next_descriptor >= UART_DMA_RX_DESCRIPTOR)
  433. next_descriptor = 0;
  434. if (next_descriptor != uart->dma_rx->read_descriptor)
  435. {
  436. uart->dma_rx->save_descriptor = next_descriptor;
  437. /* enable next DMA */
  438. rt_serial_enable_dma(uart->dma_rx->dma_channel,
  439. (rt_uint32_t)&(uart->dma_rx->rx_buffer[uart->dma_rx->save_descriptor][0]),
  440. UART_DMA_RX_BUFFER_SIZE);
  441. }
  442. else
  443. {
  444. /* no descriptor yet, disable DMA */
  445. DMA_Cmd(uart->dma_rx->dma_channel, DISABLE);
  446. uart->dma_rx->is_full = RT_TRUE;
  447. }
  448. }
  449. /*
  450. * ISR for DMA mode Tx
  451. */
  452. void rt_hw_serial_dma_tx_isr(rt_device_t device)
  453. {
  454. rt_uint32_t level;
  455. struct stm32_serial_data_node* data_node;
  456. struct stm32_serial_device* uart = (struct stm32_serial_device*) device->private;
  457. /* DMA mode receive */
  458. RT_ASSERT(device->flag & RT_DEVICE_FLAG_DMA_TX);
  459. /* get the first data node */
  460. data_node = uart->dma_tx->list_head;
  461. RT_ASSERT(data_node != RT_NULL);
  462. /* invoke call to notify tx complete */
  463. if (device->tx_complete != RT_NULL)
  464. device->tx_complete(device, data_node->data_ptr);
  465. /* disable interrupt */
  466. level = rt_hw_interrupt_disable();
  467. /* remove list tail */
  468. uart->dma_tx->list_tail = data_node->prev;
  469. if (uart->dma_tx->list_tail == RT_NULL)
  470. uart->dma_tx->list_head = RT_NULL;
  471. /* enable interrupt */
  472. rt_hw_interrupt_enable(level);
  473. /* free data node memory */
  474. rt_free(data_node);
  475. if (uart->dma_tx->list_tail != RT_NULL)
  476. {
  477. /* transmit next data node */
  478. rt_serial_enable_dma(uart->dma_tx->dma_channel,
  479. (rt_uint32_t)uart->dma_tx->list_tail->data_ptr,
  480. uart->dma_tx->list_tail->data_size);
  481. }
  482. else
  483. {
  484. /* no data to be transmitted, disable DMA */
  485. DMA_Cmd(uart->dma_tx->dma_channel, DISABLE);
  486. }
  487. }
  488. /*@}*/