lib_u32k.c 8.4 KB

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  1. /**
  2. ******************************************************************************
  3. * @file lib_u32k.c
  4. * @author Application Team
  5. * @version V4.5.0
  6. * @date 2019-05-14
  7. * @brief UART 32K library.
  8. ******************************************************************************
  9. * @attention
  10. *
  11. ******************************************************************************
  12. */
  13. #include "lib_u32k.h"
  14. #define U32K_STS_Msk (0x7UL)
  15. #define U32K_CTRL0_RSTValue (0UL)
  16. #define U32K_CTRL1_RSTValue (0UL)
  17. #define U32K_PHASE_RSTValue (0x4B00UL)
  18. /**
  19. * @brief Initializes the U32Kx peripheral registers to their default reset
  20. values.
  21. * @param U32Kx: U32K0~U32K1
  22. * @retval None
  23. */
  24. void U32K_DeInit(U32K_TypeDef *U32Kx)
  25. {
  26. /* Check parameters */
  27. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  28. /* Disable U32K */
  29. U32Kx->CTRL0 &= ~U32K_CTRL0_EN;
  30. /* clear interrupt status */
  31. U32Kx->STS = U32K_STS_Msk;
  32. /* write default reset values */
  33. U32Kx->CTRL0 = U32K_CTRL0_RSTValue;
  34. U32Kx->CTRL1 = U32K_CTRL1_RSTValue;
  35. U32Kx->PHASE = U32K_PHASE_RSTValue;
  36. }
  37. /**
  38. * @brief U32K initialization.
  39. * @param U32Kx:
  40. U32K0~U32K1
  41. InitStruct: U32K configuration
  42. Debsel:
  43. U32K_DEBSEL_0
  44. U32K_DEBSEL_1
  45. U32K_DEBSEL_2
  46. U32K_DEBSEL_3
  47. Parity:
  48. U32K_PARITY_EVEN
  49. U32K_PARITY_ODD
  50. U32K_PARITY_0
  51. U32K_PARITY_1
  52. U32K_PARITY_NONE
  53. WordLen:
  54. U32K_WORDLEN_8B
  55. U32K_WORDLEN_9B
  56. FirstBit:
  57. U32K_FIRSTBIT_LSB
  58. U32K_FIRSTBIT_MSB
  59. AutoCal:
  60. U32K_AUTOCAL_ON
  61. U32K_AUTOCAL_OFF
  62. LineSel:
  63. U32K_LINE_RX0
  64. U32K_LINE_RX1
  65. U32K_LINE_RX2
  66. U32K_LINE_RX3
  67. Baudrate: Baudrate value
  68. * @retval None
  69. */
  70. void U32K_Init(U32K_TypeDef *U32Kx, U32K_InitType *InitStruct)
  71. {
  72. uint32_t tmp_reg1, tmp_reg2;
  73. /* Check parameters */
  74. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  75. assert_parameters(IS_U32K_DEBSEL(InitStruct->Debsel));
  76. assert_parameters(IS_U32K_PARITY(InitStruct->Parity));
  77. assert_parameters(IS_U32K_WORDLEN(InitStruct->WordLen));
  78. assert_parameters(IS_U32K_FIRSTBIT(InitStruct->FirstBit));
  79. assert_parameters(IS_U32K_AUTOCAL(InitStruct->AutoCal));
  80. assert_parameters(IS_U32K_LINE(InitStruct->LineSel));
  81. assert_parameters(IS_U32K_BAUDRATE(InitStruct->Baudrate));
  82. tmp_reg1 = U32Kx->CTRL0;
  83. tmp_reg1 &= ~(U32K_CTRL0_DEBSEL\
  84. |U32K_CTRL0_PMODE\
  85. |U32K_CTRL0_MODE\
  86. |U32K_CTRL0_MSB\
  87. |U32K_CTRL0_ACOFF);
  88. tmp_reg1 |= (InitStruct->Debsel\
  89. |InitStruct->Parity\
  90. |InitStruct->WordLen\
  91. |InitStruct->FirstBit\
  92. |InitStruct->AutoCal);
  93. U32Kx->CTRL0 = tmp_reg1;
  94. if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_0) //RTCCLK 32768Hz
  95. U32Kx->PHASE = 65536*InitStruct->Baudrate/32768;
  96. else if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_1) //RTCCLK 8192Hz
  97. U32Kx->PHASE = 65536*InitStruct->Baudrate/8192;
  98. else
  99. assert_parameters(0);
  100. tmp_reg2 = U32Kx->CTRL1;
  101. tmp_reg2 &= ~(U32K_CTRL1_RXSEL);
  102. tmp_reg2 |= (InitStruct->LineSel);
  103. U32Kx->CTRL1 = tmp_reg2;
  104. }
  105. /**
  106. * @brief Fills each U32K_InitType member with its default value.
  107. * @param InitStruct: pointer to an U32K_InitType structure which will be initialized.
  108. * @retval None
  109. */
  110. void U32K_StructInit(U32K_InitType *InitStruct)
  111. {
  112. /*-------------- Reset U32K init structure parameters values ---------------*/
  113. /* Initialize the AutoCal member */
  114. InitStruct->AutoCal = U32K_AUTOCAL_ON;
  115. /* Initialize the Baudrate member */
  116. InitStruct->Baudrate = 9600;
  117. /* Initialize the Debsel member */
  118. InitStruct->Debsel = U32K_DEBSEL_0;
  119. /* Initialize the FirstBit member */
  120. InitStruct->FirstBit = U32K_FIRSTBIT_LSB;
  121. /* Initialize the LineSel member */
  122. InitStruct->LineSel = U32K_LINE_RX0;
  123. /* Initialize the Parity member */
  124. InitStruct->Parity = U32K_PARITY_NONE;
  125. /* Initialize the Parity member */
  126. InitStruct->WordLen = U32K_WORDLEN_8B;
  127. }
  128. /**
  129. * @brief U32K interrupt configuration.
  130. * @param U32Kx:
  131. U32K0~U32K1
  132. INTMask: can use the ¡®|¡¯ operator
  133. U32K_INT_RXOV
  134. U32K_INT_RXPE
  135. U32K_INT_RX
  136. NewState:
  137. ENABLE
  138. DISABLE
  139. * @retval None
  140. */
  141. void U32K_INTConfig(U32K_TypeDef *U32Kx, uint32_t INTMask, uint8_t NewState)
  142. {
  143. uint32_t tmp;
  144. /* Check parameters */
  145. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  146. assert_parameters(IS_U32K_INT(INTMask));
  147. assert_parameters(IS_FUNCTIONAL_STATE(NewState));
  148. tmp = U32Kx->CTRL1;
  149. tmp &= ~INTMask;
  150. if (NewState == ENABLE)
  151. {
  152. tmp |= INTMask;
  153. }
  154. U32Kx->CTRL1 = tmp;
  155. }
  156. /**
  157. * @brief Get interrupt flag status.
  158. * @param U32Kx:
  159. U32K0~U32K1
  160. INTMask:
  161. U32K_INTSTS_RXOV
  162. U32K_INTSTS_RXPE
  163. U32K_INTSTS_RX
  164. * @retval Flag status
  165. */
  166. uint8_t U32K_GetINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask)
  167. {
  168. /* Check parameters */
  169. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  170. assert_parameters(IS_U32K_INTFLAGR(INTMask));
  171. if (U32Kx->STS&INTMask)
  172. return 1;
  173. else
  174. return 0;
  175. }
  176. /**
  177. * @brief Clear flag status.
  178. * @param U32Kx:
  179. U32K0~U32K1
  180. INTMask: can use the ¡®|¡¯ operator
  181. U32K_INTSTS_RXOV
  182. U32K_INTSTS_RXPE
  183. U32K_INTSTS_RX
  184. * @retval None
  185. */
  186. void U32K_ClearINTStatus(U32K_TypeDef *U32Kx, uint32_t INTMask)
  187. {
  188. /* Check parameters */
  189. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  190. assert_parameters(IS_U32K_INTFLAGC(INTMask));
  191. U32Kx->STS = INTMask;
  192. }
  193. /**
  194. * @brief Read receive data register.
  195. * @param U32Kx:
  196. U32K0~U32K1
  197. * @retval Receive data value
  198. */
  199. uint8_t U32K_ReceiveData(U32K_TypeDef *U32Kx)
  200. {
  201. /* Check parameters */
  202. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  203. return (U32Kx->DATA);
  204. }
  205. /**
  206. * @brief U32K Baudrate control.
  207. * @param U32Kx: U32K0~U32K1
  208. BaudRate: Baudrate value
  209. * @retval None
  210. */
  211. void U32K_BaudrateConfig(U32K_TypeDef *U32Kx, uint32_t BaudRate)
  212. {
  213. /* Check parameters */
  214. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  215. assert_parameters(IS_U32K_BAUDRATE(BaudRate));
  216. if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_0) //RTCCLK 32768Hz
  217. U32Kx->PHASE = 65536*BaudRate/32768;
  218. else if ((RTC->PSCA & RTC_PSCA_PSCA) == RTC_PSCA_PSCA_1) //RTCCLK 8192Hz
  219. U32Kx->PHASE = 65536*BaudRate/8192;
  220. else
  221. assert_parameters(0);
  222. }
  223. /**
  224. * @brief U32K controlller enable.
  225. * @param U32Kx:
  226. U32K0~U32K1
  227. NewState:
  228. ENABLE
  229. DISABLE
  230. * @retval None
  231. */
  232. void U32K_Cmd(U32K_TypeDef *U32Kx, uint32_t NewState)
  233. {
  234. uint32_t tmp;
  235. /* Check parameters */
  236. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  237. assert_parameters(IS_FUNCTIONAL_STATE(NewState));
  238. tmp = U32Kx->CTRL0;
  239. tmp &= ~(U32K_CTRL0_EN);
  240. if (NewState == ENABLE)
  241. {
  242. tmp |= U32K_CTRL0_EN;
  243. }
  244. U32Kx->CTRL0 = tmp;
  245. }
  246. /**
  247. * @brief U32K receive line selection.
  248. * @param U32Kx:
  249. U32K0~U32K1
  250. Line:
  251. U32K_LINE_RX0
  252. U32K_LINE_RX1
  253. U32K_LINE_RX2
  254. U32K_LINE_RX3
  255. * @retval None
  256. */
  257. void U32K_LineConfig(U32K_TypeDef *U32Kx, uint32_t Line)
  258. {
  259. uint32_t tmp;
  260. /* Check parameters */
  261. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  262. assert_parameters(IS_U32K_LINE(Line));
  263. tmp = U32Kx->CTRL1;
  264. tmp &= ~U32K_CTRL1_RXSEL;
  265. tmp |= Line;
  266. U32Kx->CTRL1 = tmp;
  267. }
  268. /**
  269. * @brief Wake-up mode configure.
  270. * @param U32Kx:
  271. U32K0~U32K1
  272. WKUMode:
  273. U32K_WKUMOD_RX
  274. U32K_WKUMOD_PC
  275. * @retval None
  276. */
  277. void U32K_WKUModeConfig(U32K_TypeDef *U32Kx, uint32_t WKUMode)
  278. {
  279. uint32_t tmp;
  280. /* Check parameters */
  281. assert_parameters(IS_U32K_ALL_INSTANCE(U32Kx));
  282. assert_parameters(IS_U32K_WKUMODE(WKUMode));
  283. tmp = U32Kx->CTRL0;
  284. tmp &= ~U32K_CTRL0_WKUMODE;
  285. tmp |= WKUMode;
  286. U32Kx->CTRL0 = tmp;
  287. }
  288. /*********************************** END OF FILE ******************************/