drv_gpio.c 4.6 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-02-22 airm2m first version
  9. */
  10. #include <board.h>
  11. #include "drv_gpio.h"
  12. #ifdef RT_USING_PIN
  13. static struct rt_pin_irq_hdr pin_irq_hdr_tab[GPIO_MAX];
  14. static rt_base_t air105_pin_get(const char *name)
  15. {
  16. rt_base_t pin = 0;
  17. int hw_port_num, hw_pin_num = 0;
  18. int i, name_len;
  19. name_len = rt_strlen(name);
  20. if ((name_len < 4) || (name_len >= 6))
  21. {
  22. return -RT_EINVAL;
  23. }
  24. if ((name[0] != 'P') || (name[2] != '.'))
  25. {
  26. return -RT_EINVAL;
  27. }
  28. if ((name[1] >= 'A') && (name[1] <= 'Z'))
  29. {
  30. hw_port_num = (int)(name[1] - 'A');
  31. }
  32. else
  33. {
  34. return -RT_EINVAL;
  35. }
  36. for (i = 3; i < name_len; i++)
  37. {
  38. hw_pin_num *= 10;
  39. hw_pin_num += name[i] - '0';
  40. }
  41. pin = (hw_port_num << 4) + hw_pin_num;
  42. return pin;
  43. }
  44. static void air105_pin_write(rt_device_t dev, rt_base_t pin, rt_base_t value)
  45. {
  46. if (pin < GPIO_MAX)
  47. {
  48. GPIO_Output(pin, value);
  49. }
  50. }
  51. static int air105_pin_read(rt_device_t dev, rt_base_t pin)
  52. {
  53. if (pin < GPIO_MAX)
  54. {
  55. return GPIO_Input(pin);
  56. }
  57. else
  58. {
  59. return -1;
  60. }
  61. }
  62. static void air105_pin_mode(rt_device_t dev, rt_base_t pin, rt_base_t mode)
  63. {
  64. if (pin >= GPIO_MAX)
  65. {
  66. return;
  67. }
  68. switch(mode)
  69. {
  70. case PIN_MODE_OUTPUT:
  71. GPIO_PullConfig(pin, 0, 0);
  72. GPIO_Config(pin, 0, 0);
  73. break;
  74. case PIN_MODE_INPUT:
  75. case PIN_MODE_INPUT_PULLDOWN:
  76. GPIO_PullConfig(pin, 0, 0);
  77. GPIO_Config(pin, 1, 0);
  78. break;
  79. case PIN_MODE_INPUT_PULLUP:
  80. GPIO_PullConfig(pin, 1, 1);
  81. GPIO_Config(pin, 1, 0);
  82. break;
  83. case PIN_MODE_OUTPUT_OD:
  84. GPIO_ODConfig(pin, 0);
  85. break;
  86. }
  87. }
  88. static rt_err_t air105_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
  89. rt_uint32_t mode, void (*hdr)(void *args), void *args)
  90. {
  91. rt_base_t level;
  92. level = rt_hw_interrupt_disable();
  93. if (pin_irq_hdr_tab[pin].pin == pin &&
  94. pin_irq_hdr_tab[pin].hdr == hdr &&
  95. pin_irq_hdr_tab[pin].mode == mode &&
  96. pin_irq_hdr_tab[pin].args == args)
  97. {
  98. rt_hw_interrupt_enable(level);
  99. return RT_EOK;
  100. }
  101. pin_irq_hdr_tab[pin].pin = pin;
  102. pin_irq_hdr_tab[pin].hdr = hdr;
  103. pin_irq_hdr_tab[pin].mode = mode;
  104. pin_irq_hdr_tab[pin].args = args;
  105. rt_hw_interrupt_enable(level);
  106. return RT_EOK;
  107. }
  108. static rt_err_t air105_pin_dettach_irq(struct rt_device *device, rt_int32_t pin)
  109. {
  110. rt_base_t level;
  111. level = rt_hw_interrupt_disable();
  112. pin_irq_hdr_tab[pin].pin = -1;
  113. pin_irq_hdr_tab[pin].hdr = RT_NULL;
  114. pin_irq_hdr_tab[pin].mode = 0;
  115. pin_irq_hdr_tab[pin].args = RT_NULL;
  116. rt_hw_interrupt_enable(level);
  117. return RT_EOK;
  118. }
  119. static rt_err_t air105_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  120. rt_uint32_t enabled)
  121. {
  122. rt_base_t level;
  123. if (pin >= GPIO_MAX)
  124. {
  125. return -RT_ENOSYS;
  126. }
  127. if (enabled == PIN_IRQ_ENABLE)
  128. {
  129. level = rt_hw_interrupt_disable();
  130. if (pin_irq_hdr_tab[pin].pin == -1)
  131. {
  132. rt_hw_interrupt_enable(level);
  133. return RT_ENOSYS;
  134. }
  135. switch (pin_irq_hdr_tab[pin].mode)
  136. {
  137. case PIN_IRQ_MODE_RISING:
  138. GPIO_ExtiConfig(pin, 0, 1, 0);
  139. break;
  140. case PIN_IRQ_MODE_FALLING:
  141. GPIO_ExtiConfig(pin, 0, 0, 1);
  142. break;
  143. case PIN_IRQ_MODE_RISING_FALLING:
  144. GPIO_ExtiConfig(pin, 0, 1, 1);
  145. break;
  146. }
  147. rt_hw_interrupt_enable(level);
  148. }
  149. else if (enabled == PIN_IRQ_DISABLE)
  150. {
  151. level = rt_hw_interrupt_disable();
  152. GPIO_ExtiConfig(pin, 0, 0, 0);
  153. rt_hw_interrupt_enable(level);
  154. }
  155. else
  156. {
  157. return -RT_ENOSYS;
  158. }
  159. return RT_EOK;
  160. }
  161. const static struct rt_pin_ops _air105_pin_ops =
  162. {
  163. air105_pin_mode,
  164. air105_pin_write,
  165. air105_pin_read,
  166. air105_pin_attach_irq,
  167. air105_pin_dettach_irq,
  168. air105_pin_irq_enable,
  169. air105_pin_get,
  170. };
  171. static int pin_irq_hdr(void *pData, void *pParam)
  172. {
  173. rt_uint32_t irqno = (rt_uint32_t)pData;
  174. if (pin_irq_hdr_tab[irqno].hdr)
  175. {
  176. pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
  177. }
  178. return 0;
  179. }
  180. int rt_hw_pin_init(void)
  181. {
  182. GPIO_GlobalInit(pin_irq_hdr);
  183. return rt_device_pin_register("pin", &_air105_pin_ops, RT_NULL);
  184. }
  185. #endif /* RT_USING_PIN */