am_hal_itm.c 13 KB

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  1. //*****************************************************************************
  2. //
  3. // am_hal_itm.c
  4. //! @file
  5. //!
  6. //! @brief Functions for operating the instrumentation trace macrocell
  7. //!
  8. //! @addtogroup itm2 Instrumentation Trace Macrocell (ITM)
  9. //! @ingroup apollo2hal
  10. //! @{
  11. //
  12. //*****************************************************************************
  13. //*****************************************************************************
  14. //
  15. // Copyright (c) 2017, Ambiq Micro
  16. // All rights reserved.
  17. //
  18. // Redistribution and use in source and binary forms, with or without
  19. // modification, are permitted provided that the following conditions are met:
  20. //
  21. // 1. Redistributions of source code must retain the above copyright notice,
  22. // this list of conditions and the following disclaimer.
  23. //
  24. // 2. Redistributions in binary form must reproduce the above copyright
  25. // notice, this list of conditions and the following disclaimer in the
  26. // documentation and/or other materials provided with the distribution.
  27. //
  28. // 3. Neither the name of the copyright holder nor the names of its
  29. // contributors may be used to endorse or promote products derived from this
  30. // software without specific prior written permission.
  31. //
  32. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  33. // AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  34. // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  35. // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  36. // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  37. // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  38. // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  39. // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  40. // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  41. // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  42. // POSSIBILITY OF SUCH DAMAGE.
  43. //
  44. // This is part of revision 1.2.11 of the AmbiqSuite Development Package.
  45. //
  46. //*****************************************************************************
  47. #include <stdint.h>
  48. #include <stdbool.h>
  49. #include "am_mcu_apollo.h"
  50. //*****************************************************************************
  51. //
  52. // Global Variables
  53. //
  54. //*****************************************************************************
  55. //*****************************************************************************
  56. //
  57. //! @brief Enables the ITM
  58. //!
  59. //! This function enables the ARM ITM by setting the TRCENA bit in the DEMCR
  60. //! register.
  61. //!
  62. //! @return None.
  63. //
  64. //*****************************************************************************
  65. void
  66. am_hal_itm_enable(void)
  67. {
  68. if (g_ui32HALflags & AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M)
  69. {
  70. return;
  71. }
  72. //
  73. // To be able to access ITM registers, set the Trace Enable bit
  74. // in the Debug Exception and Monitor Control Register (DEMCR).
  75. //
  76. AM_REG(SYSCTRL, DEMCR) |= AM_REG_SYSCTRL_DEMCR_TRCENA(1);
  77. while ( !(AM_REG(SYSCTRL, DEMCR) & AM_REG_SYSCTRL_DEMCR_TRCENA(1)) );
  78. //
  79. // Write the key to the ITM Lock Access register to unlock the ITM_TCR.
  80. //
  81. AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL;
  82. //
  83. // Set the enable bits in the ITM trace enable register, and the ITM
  84. // control registers to enable trace data output.
  85. //
  86. AM_REGVAL(AM_REG_ITM_TPR_O) = 0x0000000f;
  87. AM_REGVAL(AM_REG_ITM_TER_O) = 0xffffffff;
  88. //
  89. // Write to the ITM control and status register.
  90. //
  91. AM_REGVAL(AM_REG_ITM_TCR_O) =
  92. AM_WRITE_SM(AM_REG_ITM_TCR_ATB_ID, 0x15) |
  93. AM_WRITE_SM(AM_REG_ITM_TCR_TS_FREQ, 1) |
  94. AM_WRITE_SM(AM_REG_ITM_TCR_TS_PRESCALE, 1) |
  95. AM_WRITE_SM(AM_REG_ITM_TCR_SWV_ENABLE, 1) |
  96. AM_WRITE_SM(AM_REG_ITM_TCR_DWT_ENABLE, 0) |
  97. AM_WRITE_SM(AM_REG_ITM_TCR_SYNC_ENABLE, 0) |
  98. AM_WRITE_SM(AM_REG_ITM_TCR_TS_ENABLE, 0) |
  99. AM_WRITE_SM(AM_REG_ITM_TCR_ITM_ENABLE, 1);
  100. }
  101. //*****************************************************************************
  102. //
  103. //! @brief Disables the ITM
  104. //!
  105. //! This function completely disables the ARM ITM by resetting the TRCENA bit
  106. //! in the DEMCR register.
  107. //!
  108. //! @return None.
  109. //
  110. //*****************************************************************************
  111. void
  112. am_hal_itm_disable(void)
  113. {
  114. if (g_ui32HALflags & AM_HAL_FLAGS_ITMSKIPENABLEDISABLE_M)
  115. {
  116. return;
  117. }
  118. //
  119. // Make sure the ITM_TCR is unlocked.
  120. //
  121. AM_REGVAL(AM_REG_ITM_LOCKAREG_O) = AM_REG_ITM_LOCKAREG_KEYVAL;
  122. //
  123. // Make sure the ITM/TPIU is not busy.
  124. //
  125. while ( AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1) );
  126. //
  127. // Disable the ITM.
  128. //
  129. for (int ix = 0; ix < 100; ix++)
  130. {
  131. AM_REG(ITM, TCR) &= ~AM_REG_ITM_TCR_ITM_ENABLE(1);
  132. while ( AM_REG(ITM, TCR) & (AM_REG_ITM_TCR_ITM_ENABLE(1) | AM_REG_ITM_TCR_BUSY(1)) );
  133. }
  134. //
  135. // Reset the TRCENA bit in the DEMCR register, which should disable the ITM
  136. // for operation.
  137. //
  138. AM_REG(SYSCTRL, DEMCR) &= ~AM_REG_SYSCTRL_DEMCR_TRCENA(1);
  139. //
  140. // Disable the TPIU clock source in MCU control.
  141. //
  142. AM_REG(MCUCTRL, TPIUCTRL) = AM_REG_MCUCTRL_TPIUCTRL_CLKSEL_0MHz |
  143. AM_REG_MCUCTRL_TPIUCTRL_ENABLE_DIS;
  144. }
  145. //*****************************************************************************
  146. //
  147. //! @brief Checks if itm is busy and provides a delay to flush the fifo
  148. //!
  149. //! This function disables the ARM ITM by resetting the TRCENA bit in the DEMCR
  150. //! register.
  151. //!
  152. //! @return None.
  153. //
  154. //*****************************************************************************
  155. void
  156. am_hal_itm_not_busy(void)
  157. {
  158. //
  159. // Make sure the ITM/TPIU is not busy.
  160. //
  161. while (AM_REG(ITM, TCR) & AM_REG_ITM_TCR_BUSY(1));
  162. //
  163. // wait for 50us for the data to flush out
  164. //
  165. am_hal_flash_delay(FLASH_CYCLES_US(50));
  166. }
  167. //*****************************************************************************
  168. //
  169. //! @brief Enables tracing on a given set of ITM ports
  170. //!
  171. //! @param ui8portNum - Set ports to be enabled
  172. //!
  173. //! Enables tracing on the ports referred to by \e ui8portNum by writing the
  174. //! associated bit in the Trace Privilege Register in the ITM. The value for
  175. //! ui8portNum should be the logical OR one or more of the following values:
  176. //!
  177. //! \e ITM_PRIVMASK_0_7 - enable ports 0 through 7
  178. //! \e ITM_PRIVMASK_8_15 - enable ports 8 through 15
  179. //! \e ITM_PRIVMASK_16_23 - enable ports 16 through 23
  180. //! \e ITM_PRIVMASK_24_31 - enable ports 24 through 31
  181. //!
  182. //! @return None.
  183. //
  184. //*****************************************************************************
  185. void
  186. am_hal_itm_trace_port_enable(uint8_t ui8portNum)
  187. {
  188. AM_REGVAL(AM_REG_ITM_TPR_O) |= (0x00000001 << (ui8portNum>>3));
  189. }
  190. //*****************************************************************************
  191. //
  192. //! @brief Disable tracing on the given ITM stimulus port.
  193. //!
  194. //! @param ui8portNum
  195. //!
  196. //! Disables tracing on the ports referred to by \e ui8portNum by writing the
  197. //! associated bit in the Trace Privilege Register in the ITM. The value for
  198. //! ui8portNum should be the logical OR one or more of the following values:
  199. //!
  200. //! \e ITM_PRIVMASK_0_7 - disable ports 0 through 7
  201. //! \e ITM_PRIVMASK_8_15 - disable ports 8 through 15
  202. //! \e ITM_PRIVMASK_16_23 - disable ports 16 through 23
  203. //! \e ITM_PRIVMASK_24_31 - disable ports 24 through 31
  204. //!
  205. //! @return None.
  206. //
  207. //*****************************************************************************
  208. void
  209. am_hal_itm_trace_port_disable(uint8_t ui8portNum)
  210. {
  211. AM_REGVAL(AM_REG_ITM_TPR_O) &= ~(0x00000001 << (ui8portNum >> 3));
  212. }
  213. //*****************************************************************************
  214. //
  215. //! @brief Poll the given ITM stimulus register until not busy.
  216. //!
  217. //! @param ui32StimReg - stimulus register
  218. //!
  219. //! @return true if not busy, false if busy (timed out or other error).
  220. //
  221. //*****************************************************************************
  222. bool
  223. am_hal_itm_stimulus_not_busy(uint32_t ui32StimReg)
  224. {
  225. uint32_t ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
  226. //
  227. // Busy waiting until it is available, non-zero means ready.
  228. //
  229. while (!AM_REGVAL(ui32StimAddr));
  230. return true;
  231. }
  232. //*****************************************************************************
  233. //
  234. //! @brief Writes a 32-bit value to the given ITM stimulus register.
  235. //!
  236. //! @param ui32StimReg - stimulus register
  237. //! @param ui32Value - value to be written.
  238. //!
  239. //! Write a word to the desired stimulus register.
  240. //!
  241. //! @return None.
  242. //
  243. //*****************************************************************************
  244. void
  245. am_hal_itm_stimulus_reg_word_write(uint32_t ui32StimReg, uint32_t ui32Value)
  246. {
  247. uint32_t ui32StimAddr;
  248. ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
  249. //
  250. // Busy waiting until it is available, non-zero means ready
  251. //
  252. while (!AM_REGVAL(ui32StimAddr));
  253. //
  254. // Write the register.
  255. //
  256. AM_REGVAL(ui32StimAddr) = ui32Value;
  257. }
  258. //*****************************************************************************
  259. //
  260. //! @brief Writes a short to the given ITM stimulus register.
  261. //!
  262. //! @param ui32StimReg - stimulus register
  263. //! @param ui16Value - short to be written.
  264. //!
  265. //! Write a short to the desired stimulus register.
  266. //!
  267. //! @return None.
  268. //
  269. //*****************************************************************************
  270. void
  271. am_hal_itm_stimulus_reg_short_write(uint32_t ui32StimReg, uint16_t ui16Value)
  272. {
  273. uint32_t ui32StimAddr;
  274. ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
  275. //
  276. // Busy waiting until it is available non-zero means ready
  277. //
  278. while (!AM_REGVAL(ui32StimAddr));
  279. //
  280. // Write the register.
  281. //
  282. *((volatile uint16_t *) ui32StimAddr) = ui16Value;
  283. }
  284. //*****************************************************************************
  285. //
  286. //! @brief Writes a byte to the given ITM stimulus register.
  287. //!
  288. //! @param ui32StimReg - stimulus register
  289. //! @param ui8Value - byte to be written.
  290. //!
  291. //! Write a byte to the desired stimulus register.
  292. //!
  293. //! @return None.
  294. //
  295. //*****************************************************************************
  296. void
  297. am_hal_itm_stimulus_reg_byte_write(uint32_t ui32StimReg, uint8_t ui8Value)
  298. {
  299. uint32_t ui32StimAddr;
  300. ui32StimAddr = (AM_REG_ITM_STIM0_O + (4 * ui32StimReg));
  301. //
  302. // Busy waiting until it is available (non-zero means ready)
  303. //
  304. while (!AM_REGVAL(ui32StimAddr));
  305. //
  306. // Write the register.
  307. //
  308. *((volatile uint8_t *) ui32StimAddr) = ui8Value;
  309. }
  310. //*****************************************************************************
  311. //
  312. //! @brief Sends a Sync Packet.
  313. //!
  314. //! Sends a sync packet. This can be useful for external software should it
  315. //! become out of sync with the ITM stream.
  316. //!
  317. //! @return None.
  318. //
  319. //*****************************************************************************
  320. void
  321. am_hal_itm_sync_send(void)
  322. {
  323. //
  324. // Write the register.
  325. //
  326. am_hal_itm_stimulus_reg_word_write(AM_HAL_ITM_SYNC_REG,
  327. AM_HAL_ITM_SYNC_VAL);
  328. }
  329. //*****************************************************************************
  330. //
  331. //! @brief Poll the print stimulus registers until not busy.
  332. //!
  333. //! @return true if not busy, false if busy (timed out or other error).
  334. //
  335. //*****************************************************************************
  336. bool
  337. am_hal_itm_print_not_busy(void)
  338. {
  339. //
  340. // Poll stimulus register allocated for printing.
  341. //
  342. am_hal_itm_stimulus_not_busy(0);
  343. return true;
  344. }
  345. //*****************************************************************************
  346. //
  347. //! @brief Prints a char string out of the ITM.
  348. //!
  349. //! @param pcString pointer to the character sting
  350. //!
  351. //! This function prints a sting out of the ITM.
  352. //!
  353. //! @return None.
  354. //
  355. //*****************************************************************************
  356. void
  357. am_hal_itm_print(char *pcString)
  358. {
  359. uint32_t ui32Length = 0;
  360. //
  361. // Determine the length of the string.
  362. //
  363. while (*(pcString + ui32Length))
  364. {
  365. ui32Length++;
  366. }
  367. //
  368. // If there is no longer a word left, empty out the remaining characters.
  369. //
  370. while (ui32Length)
  371. {
  372. //
  373. // Print string out the ITM.
  374. //
  375. am_hal_itm_stimulus_reg_byte_write(0, (uint8_t)*pcString++);
  376. //
  377. // Subtract from length.
  378. //
  379. ui32Length--;
  380. }
  381. }
  382. //*****************************************************************************
  383. //
  384. // End Doxygen group.
  385. //! @}
  386. //
  387. //*****************************************************************************