1
0

drv_can.c 33 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-05-16 shelton first version
  9. */
  10. #include "drv_can.h"
  11. #ifdef BSP_USING_CAN
  12. #define LOG_TAG "drv_can"
  13. #include <drv_log.h>
  14. #ifdef SOC_SERIES_AT32F403A
  15. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 120 / ((1 + 8 + 3) * 10) = 1MHz*/
  16. /* attention !!! default apbclk 120 mhz */
  17. static const struct at32_baud_rate can_baud_rate_tab[] =
  18. {
  19. {CAN1MBaud, {10 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  20. {CAN800kBaud, {15 , CAN_RSAW_2TQ, CAN_BTS1_7TQ, CAN_BTS2_2TQ}},
  21. {CAN500kBaud, {20 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  22. {CAN250kBaud, {40 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  23. {CAN125kBaud, {80 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  24. {CAN100kBaud, {75 , CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  25. {CAN50kBaud, {150, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  26. {CAN20kBaud, {375, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  27. {CAN10kBaud, {750, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}}
  28. };
  29. #endif
  30. #ifdef SOC_SERIES_AT32F407
  31. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 100 / ((1 + 7 + 2) * 10) = 1MHz*/
  32. /* attention !!! default apbclk 100 mhz */
  33. static const struct at32_baud_rate can_baud_rate_tab[] =
  34. {
  35. {CAN1MBaud, {10 , CAN_RSAW_3TQ, CAN_BTS1_7TQ, CAN_BTS2_2TQ}},
  36. {CAN800kBaud, {25, CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_1TQ}},
  37. {CAN500kBaud, {10, CAN_RSAW_3TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  38. {CAN250kBaud, {20, CAN_RSAW_3TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  39. {CAN125kBaud, {40, CAN_RSAW_3TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  40. {CAN100kBaud, {50, CAN_RSAW_3TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  41. {CAN50kBaud, {100, CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  42. {CAN20kBaud, {250, CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  43. {CAN10kBaud, {500, CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}}
  44. };
  45. #endif
  46. #ifdef SOC_SERIES_AT32F413
  47. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 96 / ((1 + 8 + 3) * 8) = 1MHz*/
  48. /* attention !!! default apbclk 96 mhz */
  49. static const struct at32_baud_rate can_baud_rate_tab[] =
  50. {
  51. {CAN1MBaud, {8 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  52. {CAN800kBaud, {20, CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_2TQ}},
  53. {CAN500kBaud, {16, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  54. {CAN250kBaud, {32, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  55. {CAN125kBaud, {64, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  56. {CAN100kBaud, {160, CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_2TQ}},
  57. {CAN50kBaud, {320, CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_2TQ}},
  58. {CAN20kBaud, {800, CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_2TQ}},
  59. {CAN10kBaud, {800, CAN_RSAW_1TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  60. };
  61. #endif
  62. #ifdef SOC_SERIES_AT32F415
  63. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 72 / ((1 + 8 + 3) * 10) = 1MHz*/
  64. /* attention !!! default apbclk 72 mhz */
  65. static const struct at32_baud_rate can_baud_rate_tab[] =
  66. {
  67. {CAN1MBaud, {6 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  68. {CAN800kBaud, {10 , CAN_RSAW_2TQ, CAN_BTS1_6TQ, CAN_BTS2_2TQ}},
  69. {CAN500kBaud, {12 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  70. {CAN250kBaud, {24 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  71. {CAN125kBaud, {48 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  72. {CAN100kBaud, {60 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  73. {CAN50kBaud, {120, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  74. {CAN20kBaud, {300, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  75. {CAN10kBaud, {600, CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}}
  76. };
  77. #endif
  78. #ifdef SOC_SERIES_AT32F435
  79. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 144 / ((1 + 8 + 3) * 12) = 1MHz*/
  80. /* attention !!! default apbclk 144 mhz */
  81. static const struct at32_baud_rate can_baud_rate_tab[] =
  82. {
  83. {CAN1MBaud, {12 , CAN_RSAW_3TQ, CAN_BTS1_8TQ, CAN_BTS2_3TQ}},
  84. {CAN800kBaud, {18 , CAN_RSAW_2TQ, CAN_BTS1_7TQ, CAN_BTS2_2TQ}},
  85. {CAN500kBaud, {24 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  86. {CAN250kBaud, {48 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  87. {CAN125kBaud, {96 , CAN_RSAW_2TQ, CAN_BTS1_9TQ, CAN_BTS2_2TQ}},
  88. {CAN100kBaud, {90 , CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  89. {CAN50kBaud, {180, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  90. {CAN20kBaud, {450, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}},
  91. {CAN10kBaud, {900, CAN_RSAW_2TQ, CAN_BTS1_13TQ, CAN_BTS2_2TQ}}
  92. };
  93. #endif
  94. #ifdef SOC_SERIES_AT32F437
  95. /* attention !!! baud calculation example: apbclk / ((ss + bs1 + bs2) * brp), ep: 125 / ((1 + 3 + 1) * 25) = 1MHz*/
  96. /* attention !!! default apbclk 125 mhz */
  97. static const struct at32_baud_rate can_baud_rate_tab[] =
  98. {
  99. {CAN1MBaud, {25 , CAN_RSAW_1TQ, CAN_BTS1_3TQ, CAN_BTS2_1TQ}},
  100. //none
  101. {CAN500kBaud, {25 , CAN_RSAW_2TQ, CAN_BTS1_7TQ, CAN_BTS2_2TQ}},
  102. {CAN250kBaud, {25 , CAN_RSAW_3TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  103. {CAN125kBaud, {50 , CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  104. {CAN100kBaud, {125, CAN_RSAW_1TQ, CAN_BTS1_8TQ, CAN_BTS2_1TQ}},
  105. {CAN50kBaud, {125, CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}},
  106. {CAN20kBaud, {625, CAN_RSAW_1TQ, CAN_BTS1_8TQ, CAN_BTS2_1TQ}},
  107. {CAN10kBaud, {625, CAN_RSAW_2TQ, CAN_BTS1_16TQ, CAN_BTS2_3TQ}}
  108. };
  109. #endif
  110. #if defined (SOC_SERIES_AT32F415) || defined (SOC_SERIES_AT32F435) || \
  111. defined (SOC_SERIES_AT32F437)
  112. #define CAN1_RX0_IRQ_NUM CAN1_RX0_IRQn
  113. #define CAN1_RX1_IRQ_NUM CAN1_RX1_IRQn
  114. #define CAN1_TX_IRQ_NUM CAN1_TX_IRQn
  115. #define CAN1_RX0_IRQ_HANDLER CAN1_RX0_IRQHandler
  116. #define CAN1_RX1_IRQ_HANDLER CAN1_RX1_IRQHandler
  117. #define CAN1_TX_IRQ_HANDLER CAN1_TX_IRQHandler
  118. #else
  119. #define CAN1_RX0_IRQ_NUM USBFS_L_CAN1_RX0_IRQn
  120. #define CAN1_RX1_IRQ_NUM CAN1_RX1_IRQn
  121. #define CAN1_TX_IRQ_NUM USBFS_H_CAN1_TX_IRQn
  122. #define CAN1_RX0_IRQ_HANDLER USBFS_L_CAN1_RX0_IRQHandler
  123. #define CAN1_RX1_IRQ_HANDLER CAN1_RX1_IRQHandler
  124. #define CAN1_TX_IRQ_HANDLER USBFS_H_CAN1_TX_IRQHandler
  125. #endif
  126. #ifdef BSP_USING_CAN1
  127. static struct at32_can can_instance1 =
  128. {
  129. .name = "can1",
  130. .config.can_x = CAN1,
  131. };
  132. #endif
  133. #ifdef BSP_USING_CAN2
  134. static struct at32_can can_instance2 =
  135. {
  136. .name = "can2",
  137. .config.can_x = CAN2,
  138. };
  139. #endif
  140. static rt_uint32_t get_can_baud_index(rt_uint32_t baud)
  141. {
  142. rt_uint32_t len, index;
  143. len = sizeof(can_baud_rate_tab) / sizeof(can_baud_rate_tab[0]);
  144. for (index = 0; index < len; index++)
  145. {
  146. if (can_baud_rate_tab[index].baud_rate == baud)
  147. return index;
  148. }
  149. /* default baud is CAN1MBaud */
  150. return 0;
  151. }
  152. static rt_err_t _can_config(struct rt_can_device *can, struct can_configure *cfg)
  153. {
  154. struct at32_can *can_instance;
  155. rt_uint32_t baud_index;
  156. RT_ASSERT(can);
  157. RT_ASSERT(cfg);
  158. can_instance = (struct at32_can *)can->parent.user_data;
  159. RT_ASSERT(can_instance);
  160. at32_msp_can_init((void *)can_instance->config.can_x);
  161. baud_index = get_can_baud_index(cfg->baud_rate);
  162. /* get baudrate parameters */
  163. can_baudrate_default_para_init(&can_instance->config.baudrate_init_struct);
  164. can_instance->config.baudrate_init_struct.rsaw_size = can_baud_rate_tab[baud_index].baud_struct.rsaw_size;
  165. can_instance->config.baudrate_init_struct.bts1_size = can_baud_rate_tab[baud_index].baud_struct.bts1_size;
  166. can_instance->config.baudrate_init_struct.bts2_size = can_baud_rate_tab[baud_index].baud_struct.bts2_size;
  167. can_instance->config.baudrate_init_struct.baudrate_div = can_baud_rate_tab[baud_index].baud_struct.baudrate_div;
  168. /* config can baudrate */
  169. if(can_baudrate_set(can_instance->config.can_x, &(can_instance->config.baudrate_init_struct)) != SUCCESS)
  170. {
  171. return -RT_ERROR;
  172. }
  173. /* config can base parameters */
  174. can_default_para_init(&(can_instance->config.base_init_struct));
  175. switch (cfg->mode)
  176. {
  177. case RT_CAN_MODE_NORMAL:
  178. can_instance->config.base_init_struct.mode_selection = CAN_MODE_COMMUNICATE;
  179. break;
  180. case RT_CAN_MODE_LISEN:
  181. can_instance->config.base_init_struct.mode_selection = CAN_MODE_LISTENONLY;
  182. break;
  183. case RT_CAN_MODE_LOOPBACK:
  184. can_instance->config.base_init_struct.mode_selection = CAN_MODE_LOOPBACK;
  185. break;
  186. case RT_CAN_MODE_LOOPBACKANLISEN:
  187. can_instance->config.base_init_struct.mode_selection = CAN_MODE_LISTENONLY_LOOPBACK;
  188. break;
  189. }
  190. can_instance->config.base_init_struct.aebo_enable = TRUE;
  191. can_instance->config.base_init_struct.aed_enable = TRUE;
  192. can_instance->config.base_init_struct.prsf_enable = FALSE;
  193. can_instance->config.base_init_struct.mdrsel_selection = CAN_DISCARDING_FIRST_RECEIVED;
  194. can_instance->config.base_init_struct.mmssr_selection = CAN_SENDING_BY_REQUEST;
  195. /* init can base function */
  196. if (can_base_init(can_instance->config.can_x, &(can_instance->config.base_init_struct)) != SUCCESS)
  197. {
  198. return -RT_ERROR;
  199. }
  200. /* config filter parameters */
  201. can_filter_init(can_instance->config.can_x, &can_instance->config.filter_init_struct);
  202. return RT_EOK;
  203. }
  204. static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg)
  205. {
  206. rt_uint32_t argval;
  207. struct at32_can *can_instance;
  208. struct rt_can_filter_config *filter_cfg;
  209. RT_ASSERT(can != RT_NULL);
  210. can_instance = (struct at32_can *)can->parent.user_data;
  211. RT_ASSERT(can_instance != RT_NULL);
  212. switch (cmd)
  213. {
  214. case RT_DEVICE_CTRL_CLR_INT:
  215. argval = (rt_uint32_t) arg;
  216. if (argval == RT_DEVICE_FLAG_INT_RX)
  217. {
  218. if (CAN1 == can_instance->config.can_x)
  219. {
  220. nvic_irq_disable(CAN1_RX0_IRQ_NUM);
  221. nvic_irq_disable(CAN1_RX1_IRQ_NUM);
  222. }
  223. #if defined (CAN2)
  224. if (CAN2 == can_instance->config.can_x)
  225. {
  226. nvic_irq_disable(CAN2_RX0_IRQn);
  227. nvic_irq_disable(CAN2_RX1_IRQn);
  228. }
  229. #endif
  230. /* disable interrupt */
  231. can_interrupt_enable(can_instance->config.can_x, CAN_RF0MIEN_INT, FALSE);
  232. can_interrupt_enable(can_instance->config.can_x, CAN_RF0FIEN_INT, FALSE);
  233. can_interrupt_enable(can_instance->config.can_x, CAN_RF0OIEN_INT, FALSE);
  234. can_interrupt_enable(can_instance->config.can_x, CAN_RF1MIEN_INT, FALSE);
  235. can_interrupt_enable(can_instance->config.can_x, CAN_RF1FIEN_INT, FALSE);
  236. can_interrupt_enable(can_instance->config.can_x, CAN_RF1OIEN_INT, FALSE);
  237. }
  238. else if (argval == RT_DEVICE_FLAG_INT_TX)
  239. {
  240. if (CAN1 == can_instance->config.can_x)
  241. {
  242. nvic_irq_disable(CAN1_TX_IRQ_NUM);
  243. }
  244. #if defined (CAN2)
  245. if (CAN2 == can_instance->config.can_x)
  246. {
  247. nvic_irq_disable(CAN2_TX_IRQn);
  248. }
  249. #endif
  250. can_interrupt_enable(can_instance->config.can_x, CAN_TCIEN_INT, FALSE);
  251. }
  252. else if (argval == RT_DEVICE_CAN_INT_ERR)
  253. {
  254. if (CAN1 == can_instance->config.can_x)
  255. {
  256. nvic_irq_disable(CAN1_SE_IRQn);
  257. }
  258. #if defined (CAN2)
  259. if (CAN2 == can_instance->config.can_x)
  260. {
  261. nvic_irq_disable(CAN2_SE_IRQn);
  262. }
  263. #endif
  264. can_interrupt_enable(can_instance->config.can_x, CAN_EAIEN_INT, FALSE);
  265. can_interrupt_enable(can_instance->config.can_x, CAN_EPIEN_INT, FALSE);
  266. can_interrupt_enable(can_instance->config.can_x, CAN_BOIEN_INT, FALSE);
  267. can_interrupt_enable(can_instance->config.can_x, CAN_ETRIEN_INT, FALSE);
  268. can_interrupt_enable(can_instance->config.can_x, CAN_EOIEN_INT, FALSE);
  269. }
  270. break;
  271. case RT_DEVICE_CTRL_SET_INT:
  272. argval = (rt_uint32_t) arg;
  273. if (argval == RT_DEVICE_FLAG_INT_RX)
  274. {
  275. can_interrupt_enable(can_instance->config.can_x, CAN_RF0MIEN_INT, TRUE);
  276. can_interrupt_enable(can_instance->config.can_x, CAN_RF0FIEN_INT, TRUE);
  277. can_interrupt_enable(can_instance->config.can_x, CAN_RF0OIEN_INT, TRUE);
  278. can_interrupt_enable(can_instance->config.can_x, CAN_RF1MIEN_INT, TRUE);
  279. can_interrupt_enable(can_instance->config.can_x, CAN_RF1FIEN_INT, TRUE);
  280. can_interrupt_enable(can_instance->config.can_x, CAN_RF1OIEN_INT, TRUE);
  281. if (CAN1 == can_instance->config.can_x)
  282. {
  283. nvic_irq_enable(CAN1_RX0_IRQ_NUM, 1, 0);
  284. nvic_irq_enable(CAN1_RX1_IRQ_NUM, 1, 0);
  285. }
  286. #if defined (CAN2)
  287. if (CAN2 == can_instance->config.can_x)
  288. {
  289. nvic_irq_enable(CAN2_RX0_IRQn, 1, 0);
  290. nvic_irq_enable(CAN2_RX1_IRQn, 1, 0);
  291. }
  292. #endif
  293. }
  294. else if (argval == RT_DEVICE_FLAG_INT_TX)
  295. {
  296. can_interrupt_enable(can_instance->config.can_x, CAN_TCIEN_INT, TRUE);
  297. if (CAN1 == can_instance->config.can_x)
  298. {
  299. nvic_irq_enable(CAN1_TX_IRQ_NUM, 1, 0);
  300. }
  301. #if defined (CAN2)
  302. if (CAN2 == can_instance->config.can_x)
  303. {
  304. nvic_irq_enable(CAN2_TX_IRQn, 1, 0);
  305. }
  306. #endif
  307. }
  308. else if (argval == RT_DEVICE_CAN_INT_ERR)
  309. {
  310. can_interrupt_enable(can_instance->config.can_x, CAN_EAIEN_INT, TRUE);
  311. can_interrupt_enable(can_instance->config.can_x, CAN_EPIEN_INT, TRUE);
  312. can_interrupt_enable(can_instance->config.can_x, CAN_BOIEN_INT, TRUE);
  313. can_interrupt_enable(can_instance->config.can_x, CAN_ETRIEN_INT, TRUE);
  314. can_interrupt_enable(can_instance->config.can_x, CAN_EOIEN_INT, TRUE);
  315. if (CAN1 == can_instance->config.can_x)
  316. {
  317. nvic_irq_enable(CAN1_SE_IRQn, 1, 0);
  318. }
  319. #if defined (CAN2)
  320. if (CAN2 == can_instance->config.can_x)
  321. {
  322. nvic_irq_enable(CAN2_SE_IRQn, 1, 0);
  323. }
  324. #endif
  325. }
  326. break;
  327. case RT_CAN_CMD_SET_FILTER:
  328. {
  329. rt_uint32_t id_h = 0;
  330. rt_uint32_t id_l = 0;
  331. rt_uint32_t mask_h = 0;
  332. rt_uint32_t mask_l = 0;
  333. rt_uint32_t mask_l_tail = 0;
  334. if (RT_NULL == arg)
  335. {
  336. /* default filter config */
  337. can_filter_init(can_instance->config.can_x, &can_instance->config.filter_init_struct);
  338. }
  339. else
  340. {
  341. filter_cfg = (struct rt_can_filter_config *)arg;
  342. /* get default filter */
  343. for (int i = 0; i < filter_cfg->count; i++)
  344. {
  345. if (filter_cfg->items[i].hdr == -1)
  346. {
  347. can_instance->config.filter_init_struct.filter_number = i;
  348. }
  349. else
  350. {
  351. can_instance->config.filter_init_struct.filter_number = filter_cfg->items[i].hdr;
  352. }
  353. /**
  354. * ID | CAN_FxR1[31:24] | CAN_FxR1[23:16] | CAN_FxR1[15:8] | CAN_FxR1[7:0] |
  355. * MASK | CAN_FxR2[31:24] | CAN_FxR1[23:16] | CAN_FxR1[15:8] | CAN_FxR1[7:0] |
  356. * STD ID | STID[10:3] | STDID[2:0] |<- 21bit ->|
  357. * EXT ID | EXTID[28:21] | EXTID[20:13] | EXTID[12:5] | EXTID[4:0] IDE RTR 0|
  358. * @note the 32bit STD ID must << 21 to fill CAN_FxR1[31:21] and EXT ID must << 3,
  359. * -> but the id bit of struct rt_can_filter_item is 29,
  360. * -> so STD id << 18 and EXT id Don't need << 3, when get the high 16bit.
  361. * -> FilterIdHigh : (((STDid << 18) or (EXT id)) >> 13) & 0xFFFF,
  362. * -> FilterIdLow: ((STDid << 18) or (EXT id << 3)) & 0xFFFF.
  363. * @note the mask bit of struct rt_can_filter_item is 32,
  364. * -> FilterMaskIdHigh: (((STD mask << 21) or (EXT mask <<3)) >> 16) & 0xFFFF
  365. * -> FilterMaskIdLow: ((STD mask << 21) or (EXT mask <<3)) & 0xFFFF
  366. */
  367. if (filter_cfg->items[i].mode == CAN_FILTER_MODE_ID_MASK)
  368. {
  369. mask_l_tail = 0x06;
  370. }
  371. else if (filter_cfg->items[i].mode == CAN_FILTER_MODE_ID_LIST)
  372. {
  373. mask_l_tail = (filter_cfg->items[i].ide << 2) |
  374. (filter_cfg->items[i].rtr << 1);
  375. }
  376. if (filter_cfg->items[i].ide == RT_CAN_STDID)
  377. {
  378. id_h = ((filter_cfg->items[i].id << 18) >> 13) & 0xFFFF;
  379. id_l = ((filter_cfg->items[i].id << 18) |
  380. (filter_cfg->items[i].ide << 2) |
  381. (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
  382. mask_h = ((filter_cfg->items[i].mask << 21) >> 16) & 0xFFFF;
  383. mask_l = ((filter_cfg->items[i].mask << 21) | mask_l_tail) & 0xFFFF;
  384. }
  385. else if (filter_cfg->items[i].ide == RT_CAN_EXTID)
  386. {
  387. id_h = (filter_cfg->items[i].id >> 13) & 0xFFFF;
  388. id_l = ((filter_cfg->items[i].id << 3) |
  389. (filter_cfg->items[i].ide << 2) |
  390. (filter_cfg->items[i].rtr << 1)) & 0xFFFF;
  391. mask_h = ((filter_cfg->items[i].mask << 3) >> 16) & 0xFFFF;
  392. mask_l = ((filter_cfg->items[i].mask << 3) | mask_l_tail) & 0xFFFF;
  393. }
  394. can_instance->config.filter_init_struct.filter_id_high = id_h;
  395. can_instance->config.filter_init_struct.filter_id_low = id_l;
  396. can_instance->config.filter_init_struct.filter_mask_high = mask_h;
  397. can_instance->config.filter_init_struct.filter_mask_low = mask_l;
  398. can_instance->config.filter_init_struct.filter_mode = (can_filter_mode_type)filter_cfg->items[i].mode;
  399. /* filter conf */
  400. can_filter_init(can_instance->config.can_x, &can_instance->config.filter_init_struct);
  401. }
  402. }
  403. break;
  404. }
  405. case RT_CAN_CMD_SET_MODE:
  406. argval = (rt_uint32_t) arg;
  407. if (argval != RT_CAN_MODE_NORMAL &&
  408. argval != RT_CAN_MODE_LISEN &&
  409. argval != RT_CAN_MODE_LOOPBACK &&
  410. argval != RT_CAN_MODE_LOOPBACKANLISEN)
  411. {
  412. return -RT_ERROR;
  413. }
  414. if (argval != can_instance->device.config.mode)
  415. {
  416. can_instance->device.config.mode = argval;
  417. return _can_config(&can_instance->device, &can_instance->device.config);
  418. }
  419. break;
  420. case RT_CAN_CMD_SET_BAUD:
  421. argval = (rt_uint32_t) arg;
  422. if (argval != CAN1MBaud &&
  423. argval != CAN800kBaud &&
  424. argval != CAN500kBaud &&
  425. argval != CAN250kBaud &&
  426. argval != CAN125kBaud &&
  427. argval != CAN100kBaud &&
  428. argval != CAN50kBaud &&
  429. argval != CAN20kBaud &&
  430. argval != CAN10kBaud)
  431. {
  432. return -RT_ERROR;
  433. }
  434. if (argval != can_instance->device.config.baud_rate)
  435. {
  436. can_instance->device.config.baud_rate = argval;
  437. return _can_config(&can_instance->device, &can_instance->device.config);
  438. }
  439. break;
  440. case RT_CAN_CMD_SET_PRIV:
  441. argval = (rt_uint32_t) arg;
  442. if (argval != RT_CAN_MODE_PRIV &&
  443. argval != RT_CAN_MODE_NOPRIV)
  444. {
  445. return -RT_ERROR;
  446. }
  447. if (argval != can_instance->device.config.privmode)
  448. {
  449. can_instance->device.config.privmode = argval;
  450. return _can_config(&can_instance->device, &can_instance->device.config);
  451. }
  452. break;
  453. case RT_CAN_CMD_GET_STATUS:
  454. {
  455. rt_uint32_t errtype;
  456. errtype = can_instance->config.can_x->ests;
  457. can_instance->device.status.rcverrcnt = errtype >> 24;
  458. can_instance->device.status.snderrcnt = (errtype >> 16 & 0xFF);
  459. can_instance->device.status.lasterrtype = errtype & 0x70;
  460. can_instance->device.status.errcode = errtype & 0x07;
  461. rt_memcpy(arg, &can_instance->device.status, sizeof(can_instance->device.status));
  462. }
  463. break;
  464. }
  465. return RT_EOK;
  466. }
  467. static int _can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_t box_num)
  468. {
  469. struct can_config *hcan;
  470. hcan = &((struct at32_can *) can->parent.user_data)->config;
  471. struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
  472. can_tx_message_type tx_message;
  473. /* check select mailbox is empty */
  474. switch (box_num)
  475. {
  476. case CAN_TX_MAILBOX0:
  477. if (hcan->can_x->tsts_bit.tm0ef != 1)
  478. {
  479. /* return function status */
  480. return -RT_ERROR;
  481. }
  482. break;
  483. case CAN_TX_MAILBOX1:
  484. if (hcan->can_x->tsts_bit.tm1ef != 1)
  485. {
  486. /* return function status */
  487. return -RT_ERROR;
  488. }
  489. break;
  490. case CAN_TX_MAILBOX2:
  491. if (hcan->can_x->tsts_bit.tm2ef != 1)
  492. {
  493. /* return function status */
  494. return -RT_ERROR;
  495. }
  496. break;
  497. default:
  498. RT_ASSERT(0);
  499. break;
  500. }
  501. if (RT_CAN_STDID == pmsg->ide)
  502. {
  503. tx_message.id_type = CAN_ID_STANDARD;
  504. tx_message.standard_id = pmsg->id;
  505. }
  506. else
  507. {
  508. tx_message.id_type = CAN_ID_EXTENDED;
  509. tx_message.extended_id = pmsg->id;
  510. }
  511. if (RT_CAN_DTR == pmsg->rtr)
  512. {
  513. tx_message.frame_type = CAN_TFT_DATA;
  514. }
  515. else
  516. {
  517. tx_message.frame_type = CAN_TFT_REMOTE;
  518. }
  519. /* set up the dlc */
  520. tx_message.dlc = pmsg->len & 0x0FU;
  521. /* set up the data field */
  522. tx_message.data[0] = (uint32_t)pmsg->data[0];
  523. tx_message.data[1] = (uint32_t)pmsg->data[1];
  524. tx_message.data[2] = (uint32_t)pmsg->data[2];
  525. tx_message.data[3] = (uint32_t)pmsg->data[3];
  526. tx_message.data[4] = (uint32_t)pmsg->data[4];
  527. tx_message.data[5] = (uint32_t)pmsg->data[5];
  528. tx_message.data[6] = (uint32_t)pmsg->data[6];
  529. tx_message.data[7] = (uint32_t)pmsg->data[7];
  530. can_message_transmit(hcan->can_x, &tx_message);
  531. return RT_EOK;
  532. }
  533. static int _can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t fifo)
  534. {
  535. struct can_config *hcan;
  536. hcan = &((struct at32_can *) can->parent.user_data)->config;
  537. struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
  538. can_rx_message_type rx_message;
  539. RT_ASSERT(can);
  540. /* get data */
  541. can_message_receive(hcan->can_x, (can_rx_fifo_num_type)fifo, &rx_message);
  542. pmsg->data[0] = rx_message.data[0];
  543. pmsg->data[1] = rx_message.data[1];
  544. pmsg->data[2] = rx_message.data[2];
  545. pmsg->data[3] = rx_message.data[3];
  546. pmsg->data[4] = rx_message.data[4];
  547. pmsg->data[5] = rx_message.data[5];
  548. pmsg->data[6] = rx_message.data[6];
  549. pmsg->data[7] = rx_message.data[7];
  550. pmsg->len = rx_message.dlc;
  551. pmsg->id = rx_message.id_type;
  552. if (rx_message.id_type == CAN_ID_STANDARD)
  553. pmsg->id = rx_message.standard_id;
  554. else
  555. pmsg->ide = rx_message.extended_id;
  556. pmsg->rtr = rx_message.frame_type;
  557. pmsg->hdr = rx_message.filter_index;
  558. return RT_EOK;
  559. }
  560. static const struct rt_can_ops _can_ops =
  561. {
  562. _can_config,
  563. _can_control,
  564. _can_sendmsg,
  565. _can_recvmsg,
  566. };
  567. static void _can_rx_isr(struct rt_can_device *can, rt_uint32_t fifo)
  568. {
  569. struct can_config *hcan;
  570. RT_ASSERT(can);
  571. hcan = &((struct at32_can *) can->parent.user_data)->config;
  572. switch (fifo)
  573. {
  574. case CAN_RX_FIFO0:
  575. /* save to user list */
  576. if (can_receive_message_pending_get(hcan->can_x, CAN_RX_FIFO0) && \
  577. can_flag_get(hcan->can_x, CAN_RF0MN_FLAG))
  578. {
  579. rt_hw_can_isr(can, RT_CAN_EVENT_RX_IND | fifo << 8);
  580. }
  581. /* check full flag for fifo0 */
  582. if (can_flag_get(hcan->can_x, CAN_RF0FF_FLAG) == SET)
  583. {
  584. /* clear fifo0 full flag */
  585. can_flag_clear(hcan->can_x, CAN_RF0FF_FLAG);
  586. }
  587. /* check overrun flag for fifo0 */
  588. if (can_flag_get(hcan->can_x, CAN_RF0OF_FLAG) == SET)
  589. {
  590. /* clear fifo0 overrun flag */
  591. can_flag_clear(hcan->can_x, CAN_RF0OF_FLAG);
  592. rt_hw_can_isr(can, RT_CAN_EVENT_RXOF_IND | fifo << 8);
  593. }
  594. break;
  595. case CAN_RX_FIFO1:
  596. /* save to user list */
  597. if (can_receive_message_pending_get(hcan->can_x, CAN_RX_FIFO1) && \
  598. can_flag_get(hcan->can_x, CAN_RF1MN_FLAG))
  599. {
  600. rt_hw_can_isr(can, RT_CAN_EVENT_RX_IND | fifo << 8);
  601. }
  602. /* check full flag for fifo1 */
  603. if (can_flag_get(hcan->can_x, CAN_RF1FF_FLAG) == SET)
  604. {
  605. /* clear fifo1 full flag */
  606. can_flag_clear(hcan->can_x, CAN_RF1FF_FLAG);
  607. }
  608. /* check overrun flag for fifo1 */
  609. if (can_flag_get(hcan->can_x, CAN_RF1OF_FLAG) == SET)
  610. {
  611. /* clear fifo1 overrun flag */
  612. can_flag_clear(hcan->can_x, CAN_RF1OF_FLAG);
  613. rt_hw_can_isr(can, RT_CAN_EVENT_RXOF_IND | fifo << 8);
  614. }
  615. break;
  616. }
  617. }
  618. #ifdef BSP_USING_CAN1
  619. /**
  620. * @brief this function handles can1 tx interrupts. transmit fifo0/1/2 is empty can trigger this interrupt
  621. */
  622. void CAN1_TX_IRQ_HANDLER(void)
  623. {
  624. rt_interrupt_enter();
  625. struct can_config *hcan;
  626. hcan = &can_instance1.config;
  627. if (can_flag_get(hcan->can_x, CAN_TM0TCF_FLAG) == SET)
  628. {
  629. if (hcan->can_x->tsts_bit.tm0tsf == 1)
  630. {
  631. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_DONE | 0 << 8);
  632. }
  633. else
  634. {
  635. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  636. }
  637. /* write 0 to clear transmission status flag */
  638. can_flag_clear(hcan->can_x, CAN_TM0TCF_FLAG);
  639. }
  640. else if (can_flag_get(hcan->can_x, CAN_TM1TCF_FLAG) == SET)
  641. {
  642. if (hcan->can_x->tsts_bit.tm1tsf == 1)
  643. {
  644. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_DONE | 1 << 8);
  645. }
  646. else
  647. {
  648. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  649. }
  650. /* write 0 to clear transmission status flag */
  651. can_flag_clear(hcan->can_x, CAN_TM1TCF_FLAG);
  652. }
  653. else if (can_flag_get(hcan->can_x, CAN_TM2TCF_FLAG) == SET)
  654. {
  655. if (hcan->can_x->tsts_bit.tm2tsf == 1)
  656. {
  657. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_DONE | 2 << 8);
  658. }
  659. else
  660. {
  661. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  662. }
  663. /* write 0 to clear transmission status flag */
  664. can_flag_clear(hcan->can_x, CAN_TM2TCF_FLAG);
  665. }
  666. rt_interrupt_leave();
  667. }
  668. /**
  669. * @brief this function handles can1 rx0 interrupts.
  670. */
  671. void CAN1_RX0_IRQ_HANDLER(void)
  672. {
  673. rt_interrupt_enter();
  674. _can_rx_isr(&can_instance1.device, CAN_RX_FIFO0);
  675. rt_interrupt_leave();
  676. }
  677. /**
  678. * @brief this function handles can1 rx1 interrupts.
  679. */
  680. void CAN1_RX1_IRQ_HANDLER(void)
  681. {
  682. rt_interrupt_enter();
  683. _can_rx_isr(&can_instance1.device, CAN_RX_FIFO1);
  684. rt_interrupt_leave();
  685. }
  686. /**
  687. * @brief this function handles can1 sce interrupts.
  688. */
  689. void CAN1_SE_IRQHandler(void)
  690. {
  691. rt_uint32_t errtype;
  692. struct can_config *hcan;
  693. hcan = &can_instance1.config;
  694. errtype = hcan->can_x->ests;
  695. rt_interrupt_enter();
  696. switch ((errtype & 0x70) >> 4)
  697. {
  698. case RT_CAN_BUS_BIT_PAD_ERR:
  699. can_instance1.device.status.bitpaderrcnt++;
  700. break;
  701. case RT_CAN_BUS_FORMAT_ERR:
  702. can_instance1.device.status.formaterrcnt++;
  703. break;
  704. case RT_CAN_BUS_ACK_ERR:/* attention !!! test ack err's unit is transmit unit */
  705. can_instance1.device.status.ackerrcnt++;
  706. if (!(can_instance1.config.can_x->tsts_bit.tm0tsf == 1))
  707. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  708. else if (!(can_instance1.config.can_x->tsts_bit.tm1tsf == 1))
  709. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  710. else if (!(can_instance1.config.can_x->tsts_bit.tm2tsf == 1))
  711. rt_hw_can_isr(&can_instance1.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  712. break;
  713. case RT_CAN_BUS_IMPLICIT_BIT_ERR:
  714. case RT_CAN_BUS_EXPLICIT_BIT_ERR:
  715. can_instance1.device.status.biterrcnt++;
  716. break;
  717. case RT_CAN_BUS_CRC_ERR:
  718. can_instance1.device.status.crcerrcnt++;
  719. break;
  720. }
  721. can_instance1.device.status.lasterrtype = errtype & 0x70;
  722. can_instance1.device.status.rcverrcnt = errtype >> 24;
  723. can_instance1.device.status.snderrcnt = (errtype >> 16 & 0xFF);
  724. can_instance1.device.status.errcode = errtype & 0x07;
  725. /* clear error flags */
  726. can_flag_clear(hcan->can_x, CAN_ETR_FLAG);
  727. rt_interrupt_leave();
  728. }
  729. #endif
  730. #ifdef BSP_USING_CAN2
  731. /**
  732. * @brief this function handles can2 tx interrupts.
  733. */
  734. void CAN2_TX_IRQHandler(void)
  735. {
  736. rt_interrupt_enter();
  737. struct can_config *hcan;
  738. hcan = &can_instance2.config;
  739. if (can_flag_get(hcan->can_x, CAN_TM0TCF_FLAG) == SET)
  740. {
  741. if (hcan->can_x->tsts_bit.tm0tsf == 1)
  742. {
  743. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_DONE | 0 << 8);
  744. }
  745. else
  746. {
  747. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  748. }
  749. /* write 0 to clear transmission status flag rqcpx */
  750. can_flag_clear(hcan->can_x, CAN_TM0TCF_FLAG);
  751. }
  752. else if (can_flag_get(hcan->can_x, CAN_TM1TCF_FLAG) == SET)
  753. {
  754. if (hcan->can_x->tsts_bit.tm1tsf == 1)
  755. {
  756. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_DONE | 1 << 8);
  757. }
  758. else
  759. {
  760. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  761. }
  762. /* write 0 to clear transmission status flag rqcpx */
  763. can_flag_clear(hcan->can_x, CAN_TM1TCF_FLAG);
  764. }
  765. else if (can_flag_get(hcan->can_x, CAN_TM2TCF_FLAG) == SET)
  766. {
  767. if (hcan->can_x->tsts_bit.tm2tsf == 1)
  768. {
  769. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_DONE | 2 << 8);
  770. }
  771. else
  772. {
  773. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  774. }
  775. /* write 0 to clear transmission status flag rqcpx */
  776. can_flag_clear(hcan->can_x, CAN_TM2TCF_FLAG);
  777. }
  778. rt_interrupt_leave();
  779. }
  780. /**
  781. * @brief this function handles can2 rx0 interrupts.
  782. */
  783. void CAN2_RX0_IRQHandler(void)
  784. {
  785. rt_interrupt_enter();
  786. _can_rx_isr(&can_instance2.device, CAN_RX_FIFO0);
  787. rt_interrupt_leave();
  788. }
  789. /**
  790. * @brief this function handles can2 rx1 interrupts.
  791. */
  792. void CAN2_RX1_IRQHandler(void)
  793. {
  794. rt_interrupt_enter();
  795. _can_rx_isr(&can_instance2.device, CAN_RX_FIFO1);
  796. rt_interrupt_leave();
  797. }
  798. /**
  799. * @brief this function handles can2 sce interrupts.
  800. */
  801. void CAN2_SE_IRQHandler(void)
  802. {
  803. rt_uint32_t errtype;
  804. struct can_config *hcan;
  805. hcan = &can_instance2.config;
  806. errtype = hcan->can_x->ests;
  807. rt_interrupt_enter();
  808. switch ((errtype & 0x70) >> 4)
  809. {
  810. case RT_CAN_BUS_BIT_PAD_ERR:
  811. can_instance2.device.status.bitpaderrcnt++;
  812. break;
  813. case RT_CAN_BUS_FORMAT_ERR:
  814. can_instance2.device.status.formaterrcnt++;
  815. break;
  816. case RT_CAN_BUS_ACK_ERR:
  817. can_instance2.device.status.ackerrcnt++;
  818. if (!(can_instance2.config.can_x->tsts_bit.tm0tsf == 1))
  819. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 0 << 8);
  820. else if (!(can_instance2.config.can_x->tsts_bit.tm1tsf == 1))
  821. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 1 << 8);
  822. else if (!(can_instance2.config.can_x->tsts_bit.tm2tsf == 1))
  823. rt_hw_can_isr(&can_instance2.device, RT_CAN_EVENT_TX_FAIL | 2 << 8);
  824. break;
  825. case RT_CAN_BUS_IMPLICIT_BIT_ERR:
  826. case RT_CAN_BUS_EXPLICIT_BIT_ERR:
  827. can_instance2.device.status.biterrcnt++;
  828. break;
  829. case RT_CAN_BUS_CRC_ERR:
  830. can_instance2.device.status.crcerrcnt++;
  831. break;
  832. }
  833. can_instance2.device.status.lasterrtype = errtype & 0x70;
  834. can_instance2.device.status.rcverrcnt = errtype >> 24;
  835. can_instance2.device.status.snderrcnt = (errtype >> 16 & 0xFF);
  836. can_instance2.device.status.errcode = errtype & 0x07;
  837. /* clear error flags */
  838. can_flag_clear(hcan->can_x, CAN_ETR_FLAG);
  839. rt_interrupt_leave();
  840. }
  841. #endif
  842. int rt_hw_can_init(void)
  843. {
  844. struct can_configure config = CANDEFAULTCONFIG;
  845. config.privmode = RT_CAN_MODE_NOPRIV;
  846. config.ticks = 50;
  847. #ifdef RT_CAN_USING_HDR
  848. config.maxhdr = 14;
  849. #endif
  850. /* config default filter */
  851. can_filter_init_type filter_conf;
  852. can_filter_default_para_init(&filter_conf);
  853. filter_conf.filter_activate_enable = TRUE;
  854. filter_conf.filter_bit = CAN_FILTER_32BIT;
  855. #ifdef BSP_USING_CAN1
  856. filter_conf.filter_number = 0;
  857. can_instance1.config.filter_init_struct = filter_conf;
  858. can_instance1.device.config = config;
  859. /* register can1 device */
  860. rt_hw_can_register(&can_instance1.device,
  861. can_instance1.name,
  862. &_can_ops,
  863. &can_instance1);
  864. #endif /* BSP_USING_CAN1 */
  865. #ifdef BSP_USING_CAN2
  866. filter_conf.filter_number = 0;
  867. can_instance2.config.filter_init_struct = filter_conf;
  868. can_instance2.device.config = config;
  869. /* register can2 device */
  870. rt_hw_can_register(&can_instance2.device,
  871. can_instance2.name,
  872. &_can_ops,
  873. &can_instance2);
  874. #endif /* BSP_USING_CAN2 */
  875. return 0;
  876. }
  877. INIT_BOARD_EXPORT(rt_hw_can_init);
  878. #endif /* BSP_USING_CAN */