drv_spi.c 9.7 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-05-16 shelton first version
  9. */
  10. #include "drv_common.h"
  11. #include "drv_spi.h"
  12. #ifdef RT_USING_SPI
  13. #if !defined(BSP_USING_SPI1) && !defined(BSP_USING_SPI2) && \
  14. !defined(BSP_USING_SPI3) && !defined(BSP_USING_SPI4)
  15. #error "Please define at least one BSP_USING_SPIx"
  16. #endif
  17. #define ARR_LEN(__N) (sizeof(__N) / sizeof(__N[0]))
  18. //#define DRV_DEBUG
  19. #define LOG_TAG "drv.pwm"
  20. #include <drv_log.h>
  21. /* private rt-thread spi ops function */
  22. static rt_err_t configure(struct rt_spi_device* device, struct rt_spi_configuration* configuration);
  23. static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message);
  24. static struct rt_spi_ops at32_spi_ops =
  25. {
  26. configure,
  27. xfer
  28. };
  29. /**
  30. * attach the spi device to spi bus, this function must be used after initialization.
  31. */
  32. rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, gpio_type *cs_gpiox, uint16_t cs_gpio_pin)
  33. {
  34. gpio_init_type gpio_init_struct;
  35. RT_ASSERT(bus_name != RT_NULL);
  36. RT_ASSERT(device_name != RT_NULL);
  37. rt_err_t result;
  38. struct rt_spi_device *spi_device;
  39. struct at32_spi_cs *cs_pin;
  40. /* initialize the cs pin & select the slave*/
  41. gpio_default_para_init(&gpio_init_struct);
  42. gpio_init_struct.gpio_pins = cs_gpio_pin;
  43. gpio_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
  44. gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
  45. gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
  46. gpio_init(cs_gpiox, &gpio_init_struct);
  47. gpio_bits_set(cs_gpiox, cs_gpio_pin);
  48. /* attach the device to spi bus */
  49. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  50. RT_ASSERT(spi_device != RT_NULL);
  51. cs_pin = (struct at32_spi_cs *)rt_malloc(sizeof(struct at32_spi_cs));
  52. RT_ASSERT(cs_pin != RT_NULL);
  53. cs_pin->gpio_x = cs_gpiox;
  54. cs_pin->gpio_pin = cs_gpio_pin;
  55. result = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
  56. if (result != RT_EOK)
  57. {
  58. LOG_D("%s attach to %s faild, %d\n", device_name, bus_name, result);
  59. }
  60. RT_ASSERT(result == RT_EOK);
  61. LOG_D("%s attach to %s done", device_name, bus_name);
  62. return result;
  63. }
  64. static rt_err_t configure(struct rt_spi_device* device,
  65. struct rt_spi_configuration* configuration)
  66. {
  67. struct rt_spi_bus * spi_bus = (struct rt_spi_bus *)device->bus;
  68. struct at32_spi *spi_instance = (struct at32_spi *)spi_bus->parent.user_data;
  69. spi_init_type spi_init_struct;
  70. RT_ASSERT(device != RT_NULL);
  71. RT_ASSERT(configuration != RT_NULL);
  72. at32_msp_spi_init(spi_instance->config->spi_x);
  73. /* data_width */
  74. if(configuration->data_width <= 8)
  75. {
  76. spi_init_struct.frame_bit_num = SPI_FRAME_8BIT;
  77. }
  78. else if(configuration->data_width <= 16)
  79. {
  80. spi_init_struct.frame_bit_num = SPI_FRAME_16BIT;
  81. }
  82. else
  83. {
  84. return RT_EIO;
  85. }
  86. /* baudrate */
  87. {
  88. uint32_t spi_apb_clock;
  89. uint32_t max_hz;
  90. crm_clocks_freq_type clocks_struct;
  91. max_hz = configuration->max_hz;
  92. crm_clocks_freq_get(&clocks_struct);
  93. LOG_D("sys freq: %d\n", clocks_struct.sclk_freq);
  94. LOG_D("max freq: %d\n", max_hz);
  95. if (spi_instance->config->spi_x == SPI1)
  96. {
  97. spi_apb_clock = clocks_struct.apb2_freq;
  98. LOG_D("pclk2 freq: %d\n", clocks_struct.apb2_freq);
  99. }
  100. else
  101. {
  102. spi_apb_clock = clocks_struct.apb1_freq;
  103. LOG_D("pclk1 freq: %d\n", clocks_struct.apb1_freq);
  104. }
  105. if(max_hz >= (spi_apb_clock / 2))
  106. {
  107. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_2;
  108. }
  109. else if (max_hz >= (spi_apb_clock / 4))
  110. {
  111. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_4;
  112. }
  113. else if (max_hz >= (spi_apb_clock / 8))
  114. {
  115. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_8;
  116. }
  117. else if (max_hz >= (spi_apb_clock / 16))
  118. {
  119. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_16;
  120. }
  121. else if (max_hz >= (spi_apb_clock / 32))
  122. {
  123. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_32;
  124. }
  125. else if (max_hz >= (spi_apb_clock / 64))
  126. {
  127. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_64;
  128. }
  129. else if (max_hz >= (spi_apb_clock / 128))
  130. {
  131. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_128;
  132. }
  133. else
  134. {
  135. /* min prescaler 256 */
  136. spi_init_struct.mclk_freq_division = SPI_MCLK_DIV_256;
  137. }
  138. } /* baudrate */
  139. switch(configuration->mode & RT_SPI_MODE_3)
  140. {
  141. case RT_SPI_MODE_0:
  142. spi_init_struct.clock_phase = SPI_CLOCK_PHASE_1EDGE;
  143. spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
  144. break;
  145. case RT_SPI_MODE_1:
  146. spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
  147. spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_LOW;
  148. break;
  149. case RT_SPI_MODE_2:
  150. spi_init_struct.clock_phase = SPI_CLOCK_PHASE_1EDGE;
  151. spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
  152. break;
  153. case RT_SPI_MODE_3:
  154. spi_init_struct.clock_phase = SPI_CLOCK_PHASE_2EDGE;
  155. spi_init_struct.clock_polarity = SPI_CLOCK_POLARITY_HIGH;
  156. break;
  157. }
  158. /* msb or lsb */
  159. if(configuration->mode & RT_SPI_MSB)
  160. {
  161. spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_MSB;
  162. }
  163. else
  164. {
  165. spi_init_struct.first_bit_transmission = SPI_FIRST_BIT_LSB;
  166. }
  167. spi_init_struct.transmission_mode = SPI_TRANSMIT_FULL_DUPLEX;
  168. spi_init_struct.master_slave_mode = SPI_MODE_MASTER;
  169. spi_init_struct.cs_mode_selection = SPI_CS_SOFTWARE_MODE;
  170. /* init spi */
  171. spi_init(spi_instance->config->spi_x, &spi_init_struct);
  172. /* enable spi */
  173. spi_enable(spi_instance->config->spi_x, TRUE);
  174. /* disable spi crc */
  175. spi_crc_enable(spi_instance->config->spi_x, FALSE);
  176. return RT_EOK;
  177. };
  178. static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* message)
  179. {
  180. struct rt_spi_bus * at32_spi_bus = (struct rt_spi_bus *)device->bus;
  181. struct at32_spi *spi_instance = (struct at32_spi *)at32_spi_bus->parent.user_data;
  182. struct rt_spi_configuration * config = &device->config;
  183. struct at32_spi_cs * at32_spi_cs = device->parent.user_data;
  184. RT_ASSERT(device != NULL);
  185. RT_ASSERT(message != NULL);
  186. /* take cs */
  187. if(message->cs_take)
  188. {
  189. gpio_bits_reset(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
  190. LOG_D("spi take cs\n");
  191. }
  192. if(config->data_width <= 8)
  193. {
  194. const rt_uint8_t *send_ptr = message->send_buf;
  195. rt_uint8_t * recv_ptr = message->recv_buf;
  196. rt_uint32_t size = message->length;
  197. LOG_D("spi poll transfer start: %d\n", size);
  198. while(size--)
  199. {
  200. rt_uint8_t data = 0xFF;
  201. if(send_ptr != RT_NULL)
  202. {
  203. data = *send_ptr++;
  204. }
  205. /* wait until the transmit buffer is empty */
  206. while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
  207. /* send the byte */
  208. spi_i2s_data_transmit(spi_instance->config->spi_x, data);
  209. /* wait until a data is received */
  210. while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
  211. /* get the received data */
  212. data = spi_i2s_data_receive(spi_instance->config->spi_x);
  213. if(recv_ptr != RT_NULL)
  214. {
  215. *recv_ptr++ = data;
  216. }
  217. }
  218. LOG_D("spi poll transfer finsh\n");
  219. }
  220. else if(config->data_width <= 16)
  221. {
  222. const rt_uint16_t * send_ptr = message->send_buf;
  223. rt_uint16_t * recv_ptr = message->recv_buf;
  224. rt_uint32_t size = message->length;
  225. while(size--)
  226. {
  227. rt_uint16_t data = 0xFF;
  228. if(send_ptr != RT_NULL)
  229. {
  230. data = *send_ptr++;
  231. }
  232. /* wait until the transmit buffer is empty */
  233. while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_TDBE_FLAG) == RESET);
  234. /* send the byte */
  235. spi_i2s_data_transmit(spi_instance->config->spi_x, data);
  236. /* wait until a data is received */
  237. while(spi_i2s_flag_get(spi_instance->config->spi_x, SPI_I2S_RDBF_FLAG) == RESET);
  238. /* get the received data */
  239. data = spi_i2s_data_receive(spi_instance->config->spi_x);
  240. if(recv_ptr != RT_NULL)
  241. {
  242. *recv_ptr++ = data;
  243. }
  244. }
  245. }
  246. /* release cs */
  247. if(message->cs_release)
  248. {
  249. gpio_bits_set(at32_spi_cs->gpio_x, at32_spi_cs->gpio_pin);
  250. LOG_D("spi release cs\n");
  251. }
  252. return message->length;
  253. };
  254. static struct at32_spi_config configs[] = {
  255. #ifdef BSP_USING_SPI1
  256. {SPI1, "spi1"},
  257. #endif
  258. #ifdef BSP_USING_SPI2
  259. {SPI2, "spi2"},
  260. #endif
  261. #ifdef BSP_USING_SPI3
  262. {SPI3, "spi3"},
  263. #endif
  264. #ifdef BSP_USING_SPI4
  265. {SPI4, "spi4"},
  266. #endif
  267. };
  268. static struct at32_spi spis[sizeof(configs) / sizeof(configs[0])] = {0};
  269. int rt_hw_spi_init(void)
  270. {
  271. int i;
  272. rt_err_t result;
  273. rt_size_t obj_num = sizeof(spis) / sizeof(struct at32_spi);
  274. for (i = 0; i < obj_num; i++)
  275. {
  276. spis[i].config = &configs[i];
  277. spis[i].spi_bus.parent.user_data = (void *)&spis[i];
  278. result = rt_spi_bus_register(&(spis[i].spi_bus), spis[i].config->spi_name, &at32_spi_ops);
  279. }
  280. return result;
  281. }
  282. INIT_BOARD_EXPORT(rt_hw_spi_init);
  283. #endif