uart_reg.h 5.8 KB

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  1. #ifndef SERIAL_REG_H
  2. #define SERIAL_REG_H
  3. /** @brief Base addresses of UART memory mapped registers */
  4. #define UART0_BASE (0x44E09000)
  5. #define UART1_BASE (0x48022000)
  6. #define UART2_BASE (0x48024000)
  7. #define UART3_BASE (0x481A6000)
  8. #define UART4_BASE (0x481A8000)
  9. #define UART5_BASE (0x481AA000)
  10. /* UART registers */
  11. #define UART_DLL(base) (base + 0x0)
  12. #define UART_RHR(base) (base + 0x0)
  13. #define UART_THR(base) (base + 0x0)
  14. #define UART_DLH(base) (base + 0x4)
  15. #define UART_IER(base) (base + 0x4)
  16. #define UART_EFR(base) (base + 0x8)
  17. #define UART_FCR(base) (base + 0x8)
  18. #define UART_IIR(base) (base + 0x8)
  19. #define UART_LCR(base) (base + 0xC)
  20. #define UART_MCR(base) (base + 0x10)
  21. #define UART_XON1_ADDR1(base) (base + 0x10)
  22. #define UART_LSR(base) (base + 0x14)
  23. #define UART_XON2_ADDR2(base) (base + 0x14)
  24. #define UART_MSR(base) (base + 0x18)
  25. #define UART_TCR(base) (base + 0x18)
  26. #define UART_XOFF1(base) (base + 0x18)
  27. #define UART_SPR(base) (base + 0x1C)
  28. #define UART_TLR(base) (base + 0x1C)
  29. #define UART_XOFF2(base) (base + 0x1C)
  30. #define UART_MDR1(base) (base + 0x20)
  31. #define UART_MDR2(base) (base + 0x24)
  32. #define UART_SFLSR(base) (base + 0x28)
  33. #define UART_TXFLL(base) (base + 0x28)
  34. #define UART_RESUME(base) (base + 0x2C)
  35. #define UART_TXFLH(base) (base + 0x2C)
  36. #define UART_RXFLL(base) (base + 0x30)
  37. #define UART_SFREGL(base) (base + 0x30)
  38. #define UART_RXFLH(base) (base + 0x34)
  39. #define UART_SFREGH(base) (base + 0x34)
  40. #define UART_BLR(base) (base + 0x38)
  41. #define UART_UASR(base) (base + 0x38)
  42. #define UART_ACREG(base) (base + 0x3C)
  43. #define UART_SCR(base) (base + 0x40)
  44. #define UART_SSR(base) (base + 0x44)
  45. #define UART_EBLR(base) (base + 0x48)
  46. #define UART_MVR(base) (base + 0x50)
  47. #define UART_SYSC(base) (base + 0x54)
  48. #define UART_SYSS(base) (base + 0x58)
  49. #define UART_WER(base) (base + 0x5C)
  50. #define UART_CFPS(base) (base + 0x60)
  51. #define UART_RXFIFO_LVL(base) (base + 0x64)
  52. #define UART_TXFIFO_LVL(base) (base + 0x68)
  53. #define UART_IER2(base) (base + 0x6C)
  54. #define UART_ISR2(base) (base + 0x70)
  55. #define UART_FREQ_SEL(base) (base + 0x74)
  56. #define UART_MDR3(base) (base + 0x80)
  57. #define UART_TX_DMA_THRESHOLD(base) (base + 0x84)
  58. #define UART_DLL_REG(base) REG16(UART_DLL(base))
  59. #define UART_RHR_REG(base) REG16(UART_RHR(base))
  60. #define UART_THR_REG(base) REG16(UART_THR(base))
  61. #define UART_DLH_REG(base) REG16(UART_DLH(base))
  62. #define UART_IER_REG(base) REG16(UART_IER(base))
  63. #define UART_EFR_REG(base) REG16(UART_EFR(base))
  64. #define UART_FCR_REG(base) REG16(UART_FCR(base))
  65. #define UART_IIR_REG(base) REG16(UART_IIR(base))
  66. #define UART_LCR_REG(base) REG16(UART_LCR(base))
  67. #define UART_MCR_REG(base) REG16(UART_MCR(base))
  68. #define UART_XON1_ADDR1_REG(base) REG16(UART_XON1_ADDR1(base))
  69. #define UART_LSR_REG(base) REG16(UART_LSR(base))
  70. #define UART_XON2_ADDR2_REG(base) REG16(UART_XON2_ADDR2(base))
  71. #define UART_MSR_REG(base) REG16(UART_MSR(base))
  72. #define UART_TCR_REG(base) REG16(UART_TCR(base))
  73. #define UART_XOFF1_REG(base) REG16(UART_XOFF1(base))
  74. #define UART_SPR_REG(base) REG16(UART_SPR(base))
  75. #define UART_TLR_REG(base) REG16(UART_TLR(base))
  76. #define UART_XOFF2_REG(base) REG16(UART_XOFF2(base))
  77. #define UART_MDR1_REG(base) REG16(UART_MDR1(base))
  78. #define UART_MDR2_REG(base) REG16(UART_MDR2(base))
  79. #define UART_SFLSR_REG(base) REG16(UART_SFLSR(base))
  80. #define UART_TXFLL_REG(base) REG16(UART_TXFLL(base))
  81. #define UART_RESUME_REG(base) REG16(UART_RESUME(base))
  82. #define UART_TXFLH_REG(base) REG16(UART_TXFLH(base))
  83. #define UART_RXFLL_REG(base) REG16(UART_RXFLL(base))
  84. #define UART_SFREGL_REG(base) REG16(UART_SFREGL(base))
  85. #define UART_RXFLH_REG(base) REG16(UART_RXFLH(base))
  86. #define UART_SFREGH_REG(base) REG16(UART_SFREGH(base))
  87. #define UART_BLR_REG(base) REG16(UART_BLR(base))
  88. #define UART_UASR_REG(base) REG16(UART_UASR(base))
  89. #define UART_ACREG_REG(base) REG16(UART_ACREG(base))
  90. #define UART_SCR_REG(base) REG16(UART_SCR(base))
  91. #define UART_SSR_REG(base) REG16(UART_SSR(base))
  92. #define UART_EBLR_REG(base) REG16(UART_EBLR(base))
  93. #define UART_MVR_REG(base) REG16(UART_MVR(base))
  94. #define UART_SYSC_REG(base) REG16(UART_SYSC(base))
  95. #define UART_SYSS_REG(base) REG16(UART_SYSS(base))
  96. #define UART_WER_REG(base) REG16(UART_WER(base))
  97. #define UART_CFPS_REG(base) REG16(UART_CFPS(base))
  98. #define UART_RXFIFO_LVL_REG(base) REG16(UART_RXFIFO_LVL(base))
  99. #define UART_TXFIFO_LVL_REG(base) REG16(UART_TXFIFO_LVL(base))
  100. #define UART_IER2_REG(base) REG16(UART_IER2(base))
  101. #define UART_ISR2_REG(base) REG16(UART_ISR2(base))
  102. #define UART_FREQ_SEL_REG(base) REG16(UART_FREQ_SEL(base))
  103. #define UART_MDR3_REG(base) REG16(UART_MDR3(base))
  104. #define UART_TX_DMA_THRESHOLD_REG(base) REG16(UART_TX_DMA_THRESHOLD(base))
  105. #endif /* end of include guard: SERIAL_REG_H */