gpio.c 3.4 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2011-01-13 weety first version
  9. */
  10. #include <rtthread.h>
  11. #include "gpio.h"
  12. #define GPIO0_BASE (DAVINCI_GPIO_BASE + 0x10)
  13. #define GPIO1_BASE (DAVINCI_GPIO_BASE + 0x38)
  14. #define GPIO2_BASE (DAVINCI_GPIO_BASE + 0x60)
  15. #define GPIO3_BASE (DAVINCI_GPIO_BASE + 0x88)
  16. static unsigned int dm365_gpio_base = (unsigned int)GPIO0_BASE;
  17. #define GPIO_OE (dm365_gpio_base + 0x00)
  18. #define GPIO_DATAIN (dm365_gpio_base + 0x10)
  19. #define GPIO_DATAOUT (dm365_gpio_base + 0x04)
  20. #define GPIO_CLROUT (dm365_gpio_base + 0x0C)
  21. #define GPIO_SETOUT (dm365_gpio_base + 0x08)
  22. #define gpio_dirin(n) *(volatile unsigned int *)((GPIO_OE)) |= 1<<(n)
  23. #define gpio_dirout(n) *(volatile unsigned int *)((GPIO_OE)) &= ~(1u<<(n))
  24. #define gpio_set(n) *(volatile unsigned int *)((GPIO_SETOUT)) = 1<<(n)
  25. #define gpio_clr(n) *(volatile unsigned int *)((GPIO_CLROUT)) = 1<<(n)
  26. #define gpio_get(n) ( ( *(volatile unsigned int *)((GPIO_DATAIN)) & (1<<(n)) ) ? 1 : 0 )
  27. #define GPIO_GRP_MASK (5)
  28. static int gpio_to_base(unsigned int gpio)
  29. {
  30. unsigned int grp_idx;
  31. int ret;
  32. grp_idx = gpio >> GPIO_GRP_MASK;
  33. switch (grp_idx) {
  34. case 0:
  35. dm365_gpio_base = (unsigned int)GPIO0_BASE;
  36. ret = 0;
  37. break;
  38. case 1:
  39. dm365_gpio_base = (unsigned int)GPIO1_BASE;
  40. ret = 0;
  41. break;
  42. case 2:
  43. dm365_gpio_base = (unsigned int)GPIO2_BASE;
  44. ret = 0;
  45. break;
  46. case 3:
  47. dm365_gpio_base = (unsigned int)GPIO3_BASE;
  48. ret = 0;
  49. break;
  50. default:
  51. ret =-RT_EIO;
  52. break;
  53. }
  54. return ret;
  55. }
  56. int gpio_direction_input(unsigned int gpio)
  57. {
  58. unsigned int offset;
  59. int ret=0;
  60. rt_ubase_t temp = rt_hw_interrupt_disable();
  61. ret = gpio_to_base(gpio);
  62. if (ret < 0) {
  63. goto gpio_free;
  64. }
  65. offset = gpio & ((1 << GPIO_GRP_MASK) -1);
  66. gpio_dirin(offset);
  67. gpio_free:
  68. rt_hw_interrupt_enable(temp);
  69. return ret;
  70. }
  71. int gpio_direction_output(unsigned int gpio, int value)
  72. {
  73. unsigned int offset;
  74. int ret=0;
  75. rt_ubase_t temp = rt_hw_interrupt_disable();
  76. ret = gpio_to_base(gpio);
  77. if (ret < 0) {
  78. goto gpio_free;
  79. }
  80. offset = gpio & ((1 << GPIO_GRP_MASK) -1);
  81. if (value) {
  82. gpio_set(offset);
  83. }
  84. else {
  85. gpio_clr(offset);
  86. }
  87. gpio_dirout(offset);
  88. gpio_free:
  89. rt_hw_interrupt_enable(temp);
  90. return ret;
  91. }
  92. int gpio_set_value(unsigned int gpio, int value)
  93. {
  94. unsigned int offset;
  95. int ret=0;
  96. rt_ubase_t temp = rt_hw_interrupt_disable();
  97. ret = gpio_to_base(gpio);
  98. if (ret < 0) {
  99. goto gpio_free;
  100. }
  101. offset = gpio & ((1 << GPIO_GRP_MASK) -1);
  102. if (value) {
  103. gpio_set(offset);
  104. }
  105. else {
  106. gpio_clr(offset);
  107. }
  108. gpio_free:
  109. rt_hw_interrupt_enable(temp);
  110. return ret;
  111. }
  112. int gpio_get_value(unsigned int gpio)
  113. {
  114. unsigned int offset;
  115. int ret=0;
  116. rt_ubase_t temp = rt_hw_interrupt_disable();
  117. ret = gpio_to_base(gpio);
  118. if (ret < 0) {
  119. goto gpio_free;
  120. }
  121. offset = gpio & ((1 << GPIO_GRP_MASK) -1);
  122. ret = gpio_get(offset);
  123. gpio_free:
  124. rt_hw_interrupt_enable(temp);
  125. return ret;
  126. }