fsl_pit.c 4.3 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #include "fsl_pit.h"
  31. /*******************************************************************************
  32. * Prototypes
  33. ******************************************************************************/
  34. /*!
  35. * @brief Gets the instance from the base address to be used to gate or ungate the module clock
  36. *
  37. * @param base PIT peripheral base address
  38. *
  39. * @return The PIT instance
  40. */
  41. static uint32_t PIT_GetInstance(PIT_Type *base);
  42. /*******************************************************************************
  43. * Variables
  44. ******************************************************************************/
  45. /*! @brief Pointers to PIT bases for each instance. */
  46. static PIT_Type *const s_pitBases[] = PIT_BASE_PTRS;
  47. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  48. /*! @brief Pointers to PIT clocks for each instance. */
  49. static const clock_ip_name_t s_pitClocks[] = PIT_CLOCKS;
  50. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  51. /*******************************************************************************
  52. * Code
  53. ******************************************************************************/
  54. static uint32_t PIT_GetInstance(PIT_Type *base)
  55. {
  56. uint32_t instance;
  57. /* Find the instance index from base address mappings. */
  58. for (instance = 0; instance < ARRAY_SIZE(s_pitBases); instance++)
  59. {
  60. if (s_pitBases[instance] == base)
  61. {
  62. break;
  63. }
  64. }
  65. assert(instance < ARRAY_SIZE(s_pitBases));
  66. return instance;
  67. }
  68. void PIT_Init(PIT_Type *base, const pit_config_t *config)
  69. {
  70. assert(config);
  71. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  72. /* Ungate the PIT clock*/
  73. CLOCK_EnableClock(s_pitClocks[PIT_GetInstance(base)]);
  74. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  75. /* Enable PIT timers */
  76. base->MCR &= ~PIT_MCR_MDIS_MASK;
  77. /* Config timer operation when in debug mode */
  78. if (config->enableRunInDebug)
  79. {
  80. base->MCR &= ~PIT_MCR_FRZ_MASK;
  81. }
  82. else
  83. {
  84. base->MCR |= PIT_MCR_FRZ_MASK;
  85. }
  86. }
  87. void PIT_Deinit(PIT_Type *base)
  88. {
  89. /* Disable PIT timers */
  90. base->MCR |= PIT_MCR_MDIS_MASK;
  91. #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
  92. /* Gate the PIT clock*/
  93. CLOCK_DisableClock(s_pitClocks[PIT_GetInstance(base)]);
  94. #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
  95. }
  96. #if defined(FSL_FEATURE_PIT_HAS_LIFETIME_TIMER) && FSL_FEATURE_PIT_HAS_LIFETIME_TIMER
  97. uint64_t PIT_GetLifetimeTimerCount(PIT_Type *base)
  98. {
  99. uint32_t valueH = 0U;
  100. uint32_t valueL = 0U;
  101. /* LTMR64H should be read before LTMR64L */
  102. valueH = base->LTMR64H;
  103. valueL = base->LTMR64L;
  104. return (((uint64_t)valueH << 32U) + (uint64_t)(valueL));
  105. }
  106. #endif /* FSL_FEATURE_PIT_HAS_LIFETIME_TIMER */