board.h 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-03-02 FMD-AE first version
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <rtthread.h>
  13. #include <ft32f0xx.h>
  14. #include "drv_gpio.h"
  15. #include <rthw.h>
  16. #include <ft32f0xx_gpio.h>
  17. #include <ft32f0xx_exti.h>
  18. #include <ft32f0xx_usart.h>
  19. #include <ft32f0xx_dma.h>
  20. #include <ft32f0xx_rcc.h>
  21. #include <ft32f0xx_syscfg.h>
  22. #ifdef RT_USING_DEVICE
  23. #include <rtdevice.h>
  24. #endif
  25. #ifdef __cplusplus
  26. extern "C" {
  27. #endif
  28. #define FT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  29. #define FT32_FLASH_SIZE (128 * 1024)
  30. #define FT32_FLASH_END_ADDRESS ((uint32_t)(FT32_FLASH_START_ADRESS + FT32_FLASH_SIZE))
  31. /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
  32. #define FT32_SRAM_SIZE 24
  33. #define FT32_SRAM_END (0x20000000 + FT32_SRAM_SIZE * 1024)
  34. #if defined(__ARMCC_VERSION)
  35. extern int Image$$RW_IRAM1$$ZI$$Limit;
  36. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  37. #elif __ICCARM__
  38. #pragma section="CSTACK"
  39. #define HEAP_BEGIN (__segment_end("CSTACK"))
  40. #else
  41. extern int __bss_end;
  42. #define HEAP_BEGIN ((void *)&__bss_end)
  43. #endif
  44. #define HEAP_END FT32_SRAM_END
  45. #ifdef __cplusplus
  46. }
  47. #endif
  48. #endif /* __BOARD_H__ */