ft32f0xx_crs.h 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163
  1. /**
  2. ******************************************************************************
  3. * @file ft32f0xx_crs.h
  4. * @author FMD AE
  5. * @brief This file contains all the functions prototypes for the CRS firmware
  6. * library.
  7. * @version V1.0.0
  8. * @data 2021-07-01
  9. ******************************************************************************
  10. */
  11. /* Define to prevent recursive inclusion -------------------------------------*/
  12. #ifndef __FT32F0XX_CRS_H
  13. #define __FT32F0XX_CRS_H
  14. #ifdef __cplusplus
  15. extern "C" {
  16. #endif
  17. /*!< Includes ----------------------------------------------------------------*/
  18. #include "ft32f0xx.h"
  19. /** @addtogroup CRS
  20. * @{
  21. */
  22. /* Exported types ------------------------------------------------------------*/
  23. /* Exported constants --------------------------------------------------------*/
  24. /** @defgroup CRS_Interrupt_Sources
  25. * @{
  26. */
  27. #define CRS_IT_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
  28. #define CRS_IT_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
  29. #define CRS_IT_ERR CRS_ISR_ERRF /*!< error */
  30. #define CRS_IT_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
  31. #define CRS_IT_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
  32. #define CRS_IT_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
  33. #define CRS_IT_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
  34. #define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
  35. ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC))
  36. #define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
  37. ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \
  38. ((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \
  39. ((IT) == CRS_IT_SYNCMISS))
  40. #define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00)
  41. /**
  42. * @}
  43. */
  44. /** @defgroup CRS_Flags
  45. * @{
  46. */
  47. #define CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK */
  48. #define CRS_FLAG_SYNCWARN CRS_ISR_SYNCWARNF /*!< SYNC warning */
  49. #define CRS_FLAG_ERR CRS_ISR_ERRF /*!< error */
  50. #define CRS_FLAG_ESYNC CRS_ISR_ESYNCF /*!< Expected SYNC */
  51. #define CRS_FLAG_TRIMOVF CRS_ISR_TRIMOVF /*!< Trimming overflow or underflow */
  52. #define CRS_FLAG_SYNCERR CRS_ISR_SYNCERR /*!< SYNC error */
  53. #define CRS_FLAG_SYNCMISS CRS_ISR_SYNCMISS /*!< SYNC missed*/
  54. #define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \
  55. ((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \
  56. ((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \
  57. ((FLAG) == CRS_FLAG_SYNCMISS))
  58. /**
  59. * @}
  60. */
  61. /** @defgroup CRS_Synchro_Source
  62. * @{
  63. */
  64. #define CRS_SYNCSource_GPIO ((uint32_t)0x00) /*!< Synchro Signal soucre GPIO */
  65. #define CRS_SYNCSource_LSE CRS_CFGR_SYNCSRC_0 /*!< Synchro Signal source LSE */
  66. #define CRS_SYNCSource_USB CRS_CFGR_SYNCSRC_1 /*!< Synchro Signal source USB SOF */
  67. #define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \
  68. ((SOURCE) == CRS_SYNCSource_LSE) ||\
  69. ((SOURCE) == CRS_SYNCSource_USB))
  70. /**
  71. * @}
  72. */
  73. /** @defgroup CRS_SynchroDivider
  74. * @{
  75. */
  76. #define CRS_SYNC_Div1 ((uint32_t)0x00) /*!< Synchro Signal not divided */
  77. #define CRS_SYNC_Div2 CRS_CFGR_SYNCDIV_0 /*!< Synchro Signal divided by 2 */
  78. #define CRS_SYNC_Div4 CRS_CFGR_SYNCDIV_1 /*!< Synchro Signal divided by 4 */
  79. #define CRS_SYNC_Div8 (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
  80. #define CRS_SYNC_Div16 CRS_CFGR_SYNCDIV_2 /*!< Synchro Signal divided by 16 */
  81. #define CRS_SYNC_Div32 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
  82. #define CRS_SYNC_Div64 (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
  83. #define CRS_SYNC_Div128 CRS_CFGR_SYNCDIV /*!< Synchro Signal divided by 128 */
  84. #define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2) ||\
  85. ((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8) || \
  86. ((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \
  87. ((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128))
  88. /**
  89. * @}
  90. */
  91. /** @defgroup CRS_SynchroPolarity
  92. * @{
  93. */
  94. #define CRS_SYNCPolarity_Rising ((uint32_t)0x00) /*!< Synchro Active on rising edge */
  95. #define CRS_SYNCPolarity_Falling CRS_CFGR_SYNCPOL /*!< Synchro Active on falling edge */
  96. #define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \
  97. ((POLARITY) == CRS_SYNCPolarity_Falling))
  98. /**
  99. * @}
  100. */
  101. /* Exported macro ------------------------------------------------------------*/
  102. /* Exported functions ------------------------------------------------------- */
  103. /* Configuration of the CRS **********************************/
  104. void CRS_DeInit(void);
  105. void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue);
  106. void CRS_FrequencyErrorCounterCmd(FunctionalState NewState);
  107. void CRS_AutomaticCalibrationCmd(FunctionalState NewState);
  108. void CRS_SoftwareSynchronizationGenerate(void);
  109. void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue);
  110. void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue);
  111. void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler);
  112. void CRS_SynchronizationSourceConfig(uint32_t CRS_Source);
  113. void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity);
  114. uint32_t CRS_GetReloadValue(void);
  115. uint32_t CRS_GetHSI48CalibrationValue(void);
  116. uint32_t CRS_GetFrequencyErrorValue(void);
  117. uint32_t CRS_GetFrequencyErrorDirection(void);
  118. /* Interrupts and flags management functions **********************************/
  119. void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState);
  120. FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG);
  121. void CRS_ClearFlag(uint32_t CRS_FLAG);
  122. ITStatus CRS_GetITStatus(uint32_t CRS_IT);
  123. void CRS_ClearITPendingBit(uint32_t CRS_IT);
  124. #ifdef __cplusplus
  125. }
  126. #endif
  127. #endif /* __FT32F0XX_CRS_H */
  128. /**
  129. * @}
  130. */
  131. /**
  132. * @}
  133. */
  134. /************************ (C) COPYRIGHT FMD *****END OF FILE****/