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ft32f0xx_adc.c 39 KB

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  1. /**
  2. ******************************************************************************
  3. * @file ft32f0xx_adc.c
  4. * @author FMD AE
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Analog to Digital Convertor (ADC) peripheral:
  7. * + Initialization and Configuration
  8. * + Power saving
  9. * + Analog Watchdog configuration
  10. * + Temperature Sensor, Vrefint (Internal Reference Voltage) and
  11. * Vbat (Voltage battery) management
  12. * + ADC Channels Configuration
  13. * + ADC Channels DMA Configuration
  14. * + Interrupts and flags management.
  15. * @version V1.0.0
  16. * @data 2021-07-01
  17. ******************************************************************************
  18. */
  19. /* Includes ------------------------------------------------------------------*/
  20. #include "ft32f0xx_adc.h"
  21. #include "ft32f0xx_rcc.h"
  22. /* ADC CFGR mask */
  23. #define CFGR1_CLEAR_MASK ((uint32_t)0xFFFFD203)
  24. /* Calibration time out */
  25. #define CALIBRATION_TIMEOUT ((uint32_t)0x0000F000)
  26. /**
  27. * @brief Deinitializes ADC1 peripheral registers to their default reset values.
  28. * @param ADCx: where x can be 1 to select the ADC peripheral.
  29. * @retval None
  30. */
  31. void ADC_DeInit(ADC_TypeDef* ADCx)
  32. {
  33. /* Check the parameters */
  34. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  35. if(ADCx == ADC1)
  36. {
  37. /* Enable ADC1 reset state */
  38. RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
  39. /* Release ADC1 from reset state */
  40. RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
  41. }
  42. }
  43. /**
  44. * @brief Initializes the ADCx peripheral according to the specified parameters
  45. * in the ADC_InitStruct.
  46. * @note This function is used to configure the global features of the ADC (
  47. * Resolution, Data Alignment, continuous mode activation, External
  48. * trigger source and edge, Sequence Scan Direction).
  49. * @param ADCx: where x can be 1 to select the ADC peripheral.
  50. * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure that contains
  51. * the configuration information for the specified ADC peripheral.
  52. * @retval None
  53. */
  54. void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
  55. {
  56. uint32_t tmpreg = 0;
  57. /* Check the parameters */
  58. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  59. assert_param(IS_ADC_RESOLUTION(ADC_InitStruct->ADC_Resolution));
  60. assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
  61. assert_param(IS_ADC_EXT_TRIG_EDGE(ADC_InitStruct->ADC_ExternalTrigConvEdge));
  62. assert_param(IS_ADC_EXTERNAL_TRIG_CONV(ADC_InitStruct->ADC_ExternalTrigConv));
  63. assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
  64. assert_param(IS_ADC_SCAN_DIRECTION(ADC_InitStruct->ADC_ScanDirection));
  65. /* Get the ADCx CFGR value */
  66. tmpreg = ADCx->CFGR1;
  67. /* Clear SCANDIR, RES[1:0], ALIGN, EXTSEL[2:0], EXTEN[1:0] and CONT bits */
  68. tmpreg &= CFGR1_CLEAR_MASK;
  69. /*---------------------------- ADCx CFGR Configuration ---------------------*/
  70. /* Set RES[1:0] bits according to ADC_Resolution value */
  71. /* Set CONT bit according to ADC_ContinuousConvMode value */
  72. /* Set EXTEN[1:0] bits according to ADC_ExternalTrigConvEdge value */
  73. /* Set EXTSEL[2:0] bits according to ADC_ExternalTrigConv value */
  74. /* Set ALIGN bit according to ADC_DataAlign value */
  75. /* Set SCANDIR bit according to ADC_ScanDirection value */
  76. tmpreg |= (uint32_t)(ADC_InitStruct->ADC_Resolution | ((uint32_t)(ADC_InitStruct->ADC_ContinuousConvMode) << 13) |
  77. ADC_InitStruct->ADC_ExternalTrigConvEdge | ADC_InitStruct->ADC_ExternalTrigConv |
  78. ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ScanDirection);
  79. /* Write to ADCx CFGR */
  80. ADCx->CFGR1 = tmpreg;
  81. }
  82. /**
  83. * @brief Fills each ADC_InitStruct member with its default value.
  84. * @note This function is used to initialize the global features of the ADC (
  85. * Resolution, Data Alignment, continuous mode activation, External
  86. * trigger source and edge, Sequence Scan Direction).
  87. * @param ADC_InitStruct: pointer to an ADC_InitTypeDef structure which will
  88. * be initialized.
  89. * @retval None
  90. */
  91. void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
  92. {
  93. /* Reset ADC init structure parameters values */
  94. /* Initialize the ADC_Resolution member */
  95. ADC_InitStruct->ADC_Resolution = ADC_Resolution_12b;
  96. /* Initialize the ADC_ContinuousConvMode member */
  97. ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
  98. /* Initialize the ADC_ExternalTrigConvEdge member */
  99. ADC_InitStruct->ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None;
  100. /* Initialize the ADC_ExternalTrigConv member */
  101. ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_TRGO;
  102. /* Initialize the ADC_DataAlign member */
  103. ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
  104. /* Initialize the ADC_ScanDirection member */
  105. ADC_InitStruct->ADC_ScanDirection = ADC_ScanDirection_Upward;
  106. }
  107. /**
  108. * @brief Enables or disables the specified ADC peripheral.
  109. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  110. * @param NewState: new state of the ADCx peripheral.
  111. * This parameter can be: ENABLE or DISABLE.
  112. * @retval None
  113. */
  114. void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  115. {
  116. /* Check the parameters */
  117. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  118. assert_param(IS_FUNCTIONAL_STATE(NewState));
  119. if (NewState != DISABLE)
  120. {
  121. /* Set the ADEN bit to Enable the ADC peripheral */
  122. ADCx->CR |= (uint32_t)ADC_CR_ADEN;
  123. }
  124. else
  125. {
  126. /* Set the ADDIS to Disable the ADC peripheral */
  127. ADCx->CR |= (uint32_t)ADC_CR_ADDIS;
  128. }
  129. }
  130. /**
  131. * @brief Configure the ADC to either be clocked by the asynchronous clock(which is
  132. * independent, the dedicated 14MHz clock) or the synchronous clock derived from
  133. * the APB clock of the ADC bus interface divided by 2 or 4
  134. * @note This function can be called only when ADC is disabled.
  135. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  136. * @param ADC_ClockMode: This parameter can be :
  137. * @arg ADC_ClockMode_AsynClk: ADC clocked by the dedicated 14MHz clock
  138. * @arg ADC_ClockMode_SynClkDiv2: ADC clocked by PCLK/2
  139. * @arg ADC_ClockMode_SynClkDiv4: ADC clocked by PCLK/4
  140. * @retval None
  141. */
  142. void ADC_ClockModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_ClockMode)
  143. {
  144. /* Check the parameters */
  145. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  146. assert_param(IS_ADC_CLOCKMODE(ADC_ClockMode));
  147. /* Configure the ADC Clock mode according to ADC_ClockMode */
  148. ADCx->CFGR2 = (uint32_t)ADC_ClockMode;
  149. }
  150. /**
  151. * @brief Enables or disables the jitter when the ADC is clocked by PCLK div2
  152. * or div4
  153. * @note This function is obsolete and maintained for legacy purpose only. ADC_ClockModeConfig()
  154. * function should be used instead.
  155. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  156. * @param ADC_JitterOff: This parameter can be :
  157. * @arg ADC_JitterOff_PCLKDiv2: Remove jitter when ADC is clocked by PLCK divided by 2
  158. * @arg ADC_JitterOff_PCLKDiv4: Remove jitter when ADC is clocked by PLCK divided by 4
  159. * @param NewState: new state of the ADCx jitter.
  160. * This parameter can be: ENABLE or DISABLE.
  161. * @retval None
  162. */
  163. void ADC_JitterCmd(ADC_TypeDef* ADCx, uint32_t ADC_JitterOff, FunctionalState NewState)
  164. {
  165. /* Check the parameters */
  166. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  167. assert_param(IS_ADC_JITTEROFF(ADC_JitterOff));
  168. assert_param(IS_FUNCTIONAL_STATE(NewState));
  169. if (NewState != DISABLE)
  170. {
  171. /* Disable Jitter */
  172. ADCx->CFGR2 |= (uint32_t)ADC_JitterOff;
  173. }
  174. else
  175. {
  176. /* Enable Jitter */
  177. ADCx->CFGR2 &= (uint32_t)(~ADC_JitterOff);
  178. }
  179. }
  180. /**
  181. * @}
  182. */
  183. /**
  184. * @brief Enables or disables the ADC Power Off.
  185. * @note ADC power-on and power-off can be managed by hardware to cut the
  186. * consumption when the ADC is not converting.
  187. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  188. * @note The ADC can be powered down:
  189. * - During the Auto delay phase: The ADC is powered on again at the end
  190. * of the delay (until the previous data is read from the ADC data register).
  191. * - During the ADC is waiting for a trigger event: The ADC is powered up
  192. * at the next trigger event (when the conversion is started).
  193. * @param NewState: new state of the ADCx power Off.
  194. * This parameter can be: ENABLE or DISABLE.
  195. * @retval None
  196. */
  197. void ADC_AutoPowerOffCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  198. {
  199. /* Check the parameters */
  200. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  201. assert_param(IS_FUNCTIONAL_STATE(NewState));
  202. if (NewState != DISABLE)
  203. {
  204. /* Enable the ADC Automatic Power-Off */
  205. ADCx->CFGR1 |= ADC_CFGR1_AUTOFF;
  206. }
  207. else
  208. {
  209. /* Disable the ADC Automatic Power-Off */
  210. ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AUTOFF;
  211. }
  212. }
  213. /**
  214. * @brief Enables or disables the Wait conversion mode.
  215. * @note When the CPU clock is not fast enough to manage the data rate, a
  216. * Hardware delay can be introduced between ADC conversions to reduce
  217. * this data rate.
  218. * @note The Hardware delay is inserted after each conversions and until the
  219. * previous data is read from the ADC data register
  220. * @note This is a way to automatically adapt the speed of the ADC to the speed
  221. * of the system which will read the data.
  222. * @note Any hardware triggers wich occur while a conversion is on going or
  223. * while the automatic Delay is applied are ignored
  224. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  225. * @param NewState: new state of the ADCx Auto-Delay.
  226. * This parameter can be: ENABLE or DISABLE.
  227. * @retval None
  228. */
  229. void ADC_WaitModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  230. {
  231. /* Check the parameters */
  232. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  233. assert_param(IS_FUNCTIONAL_STATE(NewState));
  234. if (NewState != DISABLE)
  235. {
  236. /* Enable the ADC Automatic Delayed conversion */
  237. ADCx->CFGR1 |= ADC_CFGR1_WAIT;
  238. }
  239. else
  240. {
  241. /* Disable the ADC Automatic Delayed conversion */
  242. ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_WAIT;
  243. }
  244. }
  245. /**
  246. * @}
  247. */
  248. /**
  249. * @brief Enables or disables the analog watchdog
  250. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  251. * @param NewState: new state of the ADCx Analog Watchdog.
  252. * This parameter can be: ENABLE or DISABLE.
  253. * @retval None
  254. */
  255. void ADC_AnalogWatchdogCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  256. {
  257. /* Check the parameters */
  258. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  259. assert_param(IS_FUNCTIONAL_STATE(NewState));
  260. if (NewState != DISABLE)
  261. {
  262. /* Enable the ADC Analog Watchdog */
  263. ADCx->CFGR1 |= ADC_CFGR1_AWDEN;
  264. }
  265. else
  266. {
  267. /* Disable the ADC Analog Watchdog */
  268. ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AWDEN;
  269. }
  270. }
  271. /**
  272. * @brief Configures the high and low thresholds of the analog watchdog.
  273. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  274. * @param HighThreshold: the ADC analog watchdog High threshold value.
  275. * This parameter must be a 12bit value.
  276. * @param LowThreshold: the ADC analog watchdog Low threshold value.
  277. * This parameter must be a 12bit value.
  278. * @retval None
  279. */
  280. void ADC_AnalogWatchdogThresholdsConfig(ADC_TypeDef* ADCx, uint16_t HighThreshold,
  281. uint16_t LowThreshold)
  282. {
  283. /* Check the parameters */
  284. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  285. assert_param(IS_ADC_THRESHOLD(HighThreshold));
  286. assert_param(IS_ADC_THRESHOLD(LowThreshold));
  287. /* Set the ADCx high and low threshold */
  288. ADCx->TR = LowThreshold | ((uint32_t)HighThreshold << 16);
  289. }
  290. /**
  291. * @brief Configures the analog watchdog guarded single channel
  292. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  293. * @param ADC_AnalogWatchdog_Channel: the ADC channel to configure for the analog watchdog.
  294. * This parameter can be one of the following values:
  295. * @arg ADC_AnalogWatchdog_Channel_0: ADC Channel0 selected
  296. * @arg ADC_AnalogWatchdog_Channel_1: ADC Channel1 selected
  297. * @arg ADC_AnalogWatchdog_Channel_2: ADC Channel2 selected
  298. * @arg ADC_AnalogWatchdog_Channel_3: ADC Channel3 selected
  299. * @arg ADC_AnalogWatchdog_Channel_4: ADC Channel4 selected
  300. * @arg ADC_AnalogWatchdog_Channel_5: ADC Channel5 selected
  301. * @arg ADC_AnalogWatchdog_Channel_6: ADC Channel6 selected
  302. * @arg ADC_AnalogWatchdog_Channel_7: ADC Channel7 selected
  303. * @arg ADC_AnalogWatchdog_Channel_8: ADC Channel8 selected
  304. * @arg ADC_AnalogWatchdog_Channel_9: ADC Channel9 selected
  305. * @arg ADC_AnalogWatchdog_Channel_10: ADC Channel10 selected
  306. * @arg ADC_AnalogWatchdog_Channel_11: ADC Channel11 selected
  307. * @arg ADC_AnalogWatchdog_Channel_12: ADC Channel12 selected
  308. * @arg ADC_AnalogWatchdog_Channel_13: ADC Channel13 selected
  309. * @arg ADC_AnalogWatchdog_Channel_14: ADC Channel14 selected
  310. * @arg ADC_AnalogWatchdog_Channel_15: ADC Channel15 selected
  311. * @arg ADC_AnalogWatchdog_Channel_16: ADC Channel16 selected
  312. * @arg ADC_AnalogWatchdog_Channel_17: ADC Channel17 selected
  313. * @arg ADC_AnalogWatchdog_Channel_18: ADC Channel18 selected
  314. * @note The channel selected on the AWDCH must be also set into the CHSELR
  315. * register
  316. * @retval None
  317. */
  318. void ADC_AnalogWatchdogSingleChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_AnalogWatchdog_Channel)
  319. {
  320. uint32_t tmpreg = 0;
  321. /* Check the parameters */
  322. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  323. assert_param(IS_ADC_ANALOG_WATCHDOG_CHANNEL(ADC_AnalogWatchdog_Channel));
  324. /* Get the old register value */
  325. tmpreg = ADCx->CFGR1;
  326. /* Clear the Analog watchdog channel select bits */
  327. tmpreg &= ~ADC_CFGR1_AWDCH;
  328. /* Set the Analog watchdog channel */
  329. tmpreg |= ADC_AnalogWatchdog_Channel;
  330. /* Store the new register value */
  331. ADCx->CFGR1 = tmpreg;
  332. }
  333. /**
  334. * @brief Enables or disables the ADC Analog Watchdog Single Channel.
  335. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  336. * @param NewState: new state of the ADCx ADC Analog Watchdog Single Channel.
  337. * This parameter can be: ENABLE or DISABLE.
  338. * @retval None
  339. */
  340. void ADC_AnalogWatchdogSingleChannelCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  341. {
  342. /* Check the parameters */
  343. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  344. assert_param(IS_FUNCTIONAL_STATE(NewState));
  345. if (NewState != DISABLE)
  346. {
  347. /* Enable the ADC Analog Watchdog Single Channel */
  348. ADCx->CFGR1 |= ADC_CFGR1_AWDSGL;
  349. }
  350. else
  351. {
  352. /* Disable the ADC Analog Watchdog Single Channel */
  353. ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_AWDSGL;
  354. }
  355. }
  356. /**
  357. * @}
  358. */
  359. /**
  360. * @brief Enables or disables the temperature sensor channel.
  361. * @param NewState: new state of the temperature sensor input channel.
  362. * This parameter can be: ENABLE or DISABLE.
  363. * @retval None
  364. */
  365. void ADC_TempSensorCmd(FunctionalState NewState)
  366. {
  367. /* Check the parameters */
  368. assert_param(IS_FUNCTIONAL_STATE(NewState));
  369. if (NewState != DISABLE)
  370. {
  371. /* Enable the temperature sensor channel*/
  372. ADC->CCR |= (uint32_t)ADC_CCR_TSEN;
  373. }
  374. else
  375. {
  376. /* Disable the temperature sensor channel*/
  377. ADC->CCR &= (uint32_t)(~ADC_CCR_TSEN);
  378. }
  379. }
  380. /**
  381. * @brief Enables or disables the Vrefint channel.
  382. * @param NewState: new state of the Vref input channel.
  383. * This parameter can be: ENABLE or DISABLE.
  384. * @retval None
  385. */
  386. void ADC_VrefintCmd(FunctionalState NewState)
  387. {
  388. /* Check the parameters */
  389. assert_param(IS_FUNCTIONAL_STATE(NewState));
  390. if (NewState != DISABLE)
  391. {
  392. /* Enable the Vrefint channel*/
  393. ADC->CCR |= (uint32_t)ADC_CCR_VREFEN;
  394. }
  395. else
  396. {
  397. /* Disable the Vrefint channel*/
  398. ADC->CCR &= (uint32_t)(~ADC_CCR_VREFEN);
  399. }
  400. }
  401. /**
  402. * @brief Enables or disables the Vbat channel.
  403. * @note This feature is not applicable for FT32F030 devices.
  404. * @param NewState: new state of the Vbat input channel.
  405. * This parameter can be: ENABLE or DISABLE.
  406. * @retval None
  407. */
  408. void ADC_VbatCmd(FunctionalState NewState)
  409. {
  410. /* Check the parameters */
  411. assert_param(IS_FUNCTIONAL_STATE(NewState));
  412. if (NewState != DISABLE)
  413. {
  414. /* Enable the Vbat channel*/
  415. ADC->CCR |= (uint32_t)ADC_CCR_VBATEN;
  416. }
  417. else
  418. {
  419. /* Disable the Vbat channel*/
  420. ADC->CCR &= (uint32_t)(~ADC_CCR_VBATEN);
  421. }
  422. }
  423. /**
  424. * @}
  425. */
  426. /**
  427. * @brief Configures for the selected ADC and its sampling time.
  428. * @param ADCx: where x can be 1 to select the ADC peripheral.
  429. * @param ADC_Channel: the ADC channel to configure.
  430. * This parameter can be any combination of the following values:
  431. * @arg ADC_Channel_0: ADC Channel0 selected
  432. * @arg ADC_Channel_1: ADC Channel1 selected
  433. * @arg ADC_Channel_2: ADC Channel2 selected
  434. * @arg ADC_Channel_3: ADC Channel3 selected
  435. * @arg ADC_Channel_4: ADC Channel4 selected
  436. * @arg ADC_Channel_5: ADC Channel5 selected
  437. * @arg ADC_Channel_6: ADC Channel6 selected
  438. * @arg ADC_Channel_7: ADC Channel7 selected
  439. * @arg ADC_Channel_8: ADC Channel8 selected
  440. * @arg ADC_Channel_9: ADC Channel9 selected
  441. * @arg ADC_Channel_10: ADC Channel10 selected,
  442. * @arg ADC_Channel_11: ADC Channel11 selected,
  443. * @arg ADC_Channel_12: ADC Channel12 selected,
  444. * @arg ADC_Channel_13: ADC Channel13 selected,
  445. * @arg ADC_Channel_14: ADC Channel14 selected,
  446. * @arg ADC_Channel_15: ADC Channel15 selected,
  447. * @arg ADC_Channel_16: ADC Channel16 selected
  448. * @arg ADC_Channel_17: ADC Channel17 selected
  449. * @arg ADC_Channel_18: ADC Channel18 selected,
  450. * @arg ADC_Channel_19: ADC Channel19 selected,
  451. * @arg ADC_Channel_20: ADC Channel20 selected,
  452. * @arg ADC_Channel_21: ADC Channel21 selected,
  453. * @param ADC_SampleTime: The sample time value to be set for the selected channel.
  454. * This parameter can be one of the following values:
  455. * @arg ADC_SampleTime_1_5Cycles: Sample time equal to 1.5 cycles
  456. * @arg ADC_SampleTime_7_5Cycles: Sample time equal to 7.5 cycles
  457. * @arg ADC_SampleTime_13_5Cycles: Sample time equal to 13.5 cycles
  458. * @arg ADC_SampleTime_28_5Cycles: Sample time equal to 28.5 cycles
  459. * @arg ADC_SampleTime_41_5Cycles: Sample time equal to 41.5 cycles
  460. * @arg ADC_SampleTime_55_5Cycles: Sample time equal to 55.5 cycles
  461. * @arg ADC_SampleTime_71_5Cycles: Sample time equal to 71.5 cycles
  462. * @arg ADC_SampleTime_239_5Cycles: Sample time equal to 239.5 cycles
  463. * @retval None
  464. */
  465. void ADC_ChannelConfig(ADC_TypeDef* ADCx, uint32_t ADC_Channel, uint32_t ADC_SampleTime)
  466. {
  467. uint32_t tmpreg = 0;
  468. /* Check the parameters */
  469. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  470. assert_param(IS_ADC_CHANNEL(ADC_Channel));
  471. assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
  472. /* Configure the ADC Channel */
  473. ADCx->CHSELR |= (uint32_t)ADC_Channel;
  474. /* Clear the Sampling time Selection bits */
  475. tmpreg &= ~ADC_SMPR1_SMPR;
  476. /* Set the ADC Sampling Time register */
  477. tmpreg |= (uint32_t)ADC_SampleTime;
  478. /* Configure the ADC Sample time register */
  479. ADCx->SMPR = tmpreg ;
  480. }
  481. /**
  482. * @brief Enable the Continuous mode for the selected ADCx channels.
  483. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  484. * @param NewState: new state of the Continuous mode.
  485. * This parameter can be: ENABLE or DISABLE.
  486. * @note It is not possible to have both discontinuous mode and continuous mode
  487. * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
  488. * as if continuous mode was disabled
  489. * @retval None
  490. */
  491. void ADC_ContinuousModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  492. {
  493. /* Check the parameters */
  494. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  495. assert_param(IS_FUNCTIONAL_STATE(NewState));
  496. if (NewState != DISABLE)
  497. {
  498. /* Enable the Continuous mode*/
  499. ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_CONT;
  500. }
  501. else
  502. {
  503. /* Disable the Continuous mode */
  504. ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_CONT);
  505. }
  506. }
  507. /**
  508. * @brief Enable the discontinuous mode for the selected ADC channels.
  509. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  510. * @param NewState: new state of the discontinuous mode.
  511. * This parameter can be: ENABLE or DISABLE.
  512. * @note It is not possible to have both discontinuous mode and continuous mode
  513. * enabled. In this case (If DISCEN and CONT are Set), the ADC behaves
  514. * as if continuous mode was disabled
  515. * @retval None
  516. */
  517. void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  518. {
  519. /* Check the parameters */
  520. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  521. assert_param(IS_FUNCTIONAL_STATE(NewState));
  522. if (NewState != DISABLE)
  523. {
  524. /* Enable the Discontinuous mode */
  525. ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_DISCEN;
  526. }
  527. else
  528. {
  529. /* Disable the Discontinuous mode */
  530. ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_DISCEN);
  531. }
  532. }
  533. /**
  534. * @brief Enable the Overrun mode for the selected ADC channels.
  535. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  536. * @param NewState: new state of the Overrun mode.
  537. * This parameter can be: ENABLE or DISABLE.
  538. * @retval None
  539. */
  540. void ADC_OverrunModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  541. {
  542. /* Check the parameters */
  543. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  544. assert_param(IS_FUNCTIONAL_STATE(NewState));
  545. if (NewState != DISABLE)
  546. {
  547. /* Enable the Overrun mode */
  548. ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_OVRMOD;
  549. }
  550. else
  551. {
  552. /* Disable the Overrun mode */
  553. ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_OVRMOD);
  554. }
  555. }
  556. /**
  557. * @brief Active the Calibration operation for the selected ADC.
  558. * @note The Calibration can be initiated only when ADC is still in the
  559. * reset configuration (ADEN must be equal to 0).
  560. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  561. * @retval ADC Calibration factor
  562. */
  563. uint32_t ADC_GetCalibrationFactor(ADC_TypeDef* ADCx)
  564. {
  565. uint32_t tmpreg = 0, calibrationcounter = 0, calibrationstatus = 0;
  566. /* Check the parameters */
  567. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  568. /* Set the ADC calibartion */
  569. ADCx->CR |= (uint32_t)ADC_CR_ADCAL;
  570. /* Wait until no ADC calibration is completed */
  571. do
  572. {
  573. calibrationstatus = ADCx->CR & ADC_CR_ADCAL;
  574. calibrationcounter++;
  575. } while((calibrationcounter != CALIBRATION_TIMEOUT) && (calibrationstatus != 0x00));
  576. if((uint32_t)(ADCx->CR & ADC_CR_ADCAL) == RESET)
  577. {
  578. /*Get the calibration factor from the ADC data register */
  579. tmpreg = ADCx->DR;
  580. }
  581. else
  582. {
  583. /* Error factor */
  584. tmpreg = 0x00000000;
  585. }
  586. return tmpreg;
  587. }
  588. /**
  589. * @brief Stop the on going conversions for the selected ADC.
  590. * @note When ADSTP is set, any on going conversion is aborted, and the ADC
  591. * data register is not updated with current conversion.
  592. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  593. * @retval None
  594. */
  595. void ADC_StopOfConversion(ADC_TypeDef* ADCx)
  596. {
  597. /* Check the parameters */
  598. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  599. ADCx->CR |= (uint32_t)ADC_CR_ADSTP;
  600. }
  601. /**
  602. * @brief Start Conversion for the selected ADC channels.
  603. * @note In continuous mode, ADSTART is not cleared by hardware with the
  604. * assertion of EOSEQ because the sequence is automatic relaunched
  605. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  606. * @retval None
  607. */
  608. void ADC_StartOfConversion(ADC_TypeDef* ADCx)
  609. {
  610. /* Check the parameters */
  611. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  612. ADCx->CR |= (uint32_t)ADC_CR_ADSTART;
  613. }
  614. /**
  615. * @brief Returns the last ADCx conversion result data for ADC channel.
  616. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  617. * @retval The Data conversion value.
  618. */
  619. uint16_t ADC_GetConversionValue(ADC_TypeDef* ADCx)
  620. {
  621. /* Check the parameters */
  622. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  623. /* Return the selected ADC conversion value */
  624. return (uint16_t) ADCx->DR;
  625. }
  626. /**
  627. * @}
  628. */
  629. /**
  630. * @brief Enables or disables the specified ADC DMA request.
  631. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  632. * @param NewState: new state of the selected ADC DMA transfer.
  633. * This parameter can be: ENABLE or DISABLE.
  634. * @retval None
  635. */
  636. void ADC_DMACmd(ADC_TypeDef* ADCx, FunctionalState NewState)
  637. {
  638. /* Check the parameters */
  639. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  640. assert_param(IS_FUNCTIONAL_STATE(NewState));
  641. if (NewState != DISABLE)
  642. {
  643. /* Enable the selected ADC DMA request */
  644. ADCx->CFGR1 |= (uint32_t)ADC_CFGR1_DMAEN;
  645. }
  646. else
  647. {
  648. /* Disable the selected ADC DMA request */
  649. ADCx->CFGR1 &= (uint32_t)(~ADC_CFGR1_DMAEN);
  650. }
  651. }
  652. /**
  653. * @brief Enables or disables the ADC DMA request after last transfer (Single-ADC mode)
  654. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  655. * @param ADC_DMARequestMode: the ADC channel to configure.
  656. * This parameter can be one of the following values:
  657. * @arg ADC_DMAMode_OneShot: DMA One Shot Mode
  658. * @arg ADC_DMAMode_Circular: DMA Circular Mode
  659. * @retval None
  660. */
  661. void ADC_DMARequestModeConfig(ADC_TypeDef* ADCx, uint32_t ADC_DMARequestMode)
  662. {
  663. /* Check the parameters */
  664. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  665. ADCx->CFGR1 &= (uint32_t)~ADC_CFGR1_DMACFG;
  666. ADCx->CFGR1 |= (uint32_t)ADC_DMARequestMode;
  667. }
  668. /**
  669. * @}
  670. */
  671. /**
  672. * @brief Enables or disables the specified ADC interrupts.
  673. * @param ADCx: where x can be 1 to select the ADC peripheral.
  674. * @param ADC_IT: specifies the ADC interrupt sources to be enabled or disabled.
  675. * This parameter can be one of the following values:
  676. * @arg ADC_IT_ADRDY: ADC ready interrupt
  677. * @arg ADC_IT_EOSMP: End of sampling interrupt
  678. * @arg ADC_IT_EOC: End of conversion interrupt
  679. * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
  680. * @arg ADC_IT_OVR: overrun interrupt
  681. * @arg ADC_IT_AWD: Analog watchdog interrupt
  682. * @param NewState: new state of the specified ADC interrupts.
  683. * This parameter can be: ENABLE or DISABLE.
  684. * @retval None
  685. */
  686. void ADC_ITConfig(ADC_TypeDef* ADCx, uint32_t ADC_IT, FunctionalState NewState)
  687. {
  688. /* Check the parameters */
  689. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  690. assert_param(IS_FUNCTIONAL_STATE(NewState));
  691. assert_param(IS_ADC_CONFIG_IT(ADC_IT));
  692. if (NewState != DISABLE)
  693. {
  694. /* Enable the selected ADC interrupts */
  695. ADCx->IER |= ADC_IT;
  696. }
  697. else
  698. {
  699. /* Disable the selected ADC interrupts */
  700. ADCx->IER &= (~(uint32_t)ADC_IT);
  701. }
  702. }
  703. /**
  704. * @brief Checks whether the specified ADC flag is set or not.
  705. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  706. * @param ADC_FLAG: specifies the flag to check.
  707. * This parameter can be one of the following values:
  708. * @arg ADC_FLAG_AWD: Analog watchdog flag
  709. * @arg ADC_FLAG_OVR: Overrun flag
  710. * @arg ADC_FLAG_EOSEQ: End of Sequence flag
  711. * @arg ADC_FLAG_EOC: End of conversion flag
  712. * @arg ADC_FLAG_EOSMP: End of sampling flag
  713. * @arg ADC_FLAG_ADRDY: ADC Ready flag
  714. * @arg ADC_FLAG_ADEN: ADC enable flag
  715. * @arg ADC_FLAG_ADDIS: ADC disable flag
  716. * @arg ADC_FLAG_ADSTART: ADC start flag
  717. * @arg ADC_FLAG_ADSTP: ADC stop flag
  718. * @arg ADC_FLAG_ADCAL: ADC Calibration flag
  719. * @retval The new state of ADC_FLAG (SET or RESET).
  720. */
  721. FlagStatus ADC_GetFlagStatus(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
  722. {
  723. FlagStatus bitstatus = RESET;
  724. uint32_t tmpreg = 0;
  725. /* Check the parameters */
  726. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  727. assert_param(IS_ADC_GET_FLAG(ADC_FLAG));
  728. if((uint32_t)(ADC_FLAG & 0x01000000))
  729. {
  730. tmpreg = ADCx->CR & 0xFEFFFFFF;
  731. }
  732. else
  733. {
  734. tmpreg = ADCx->ISR;
  735. }
  736. /* Check the status of the specified ADC flag */
  737. if ((tmpreg & ADC_FLAG) != (uint32_t)RESET)
  738. {
  739. /* ADC_FLAG is set */
  740. bitstatus = SET;
  741. }
  742. else
  743. {
  744. /* ADC_FLAG is reset */
  745. bitstatus = RESET;
  746. }
  747. /* Return the ADC_FLAG status */
  748. return bitstatus;
  749. }
  750. /**
  751. * @brief Clears the ADCx's pending flags.
  752. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  753. * @param ADC_FLAG: specifies the flag to clear.
  754. * This parameter can be any combination of the following values:
  755. * @arg ADC_FLAG_AWD: Analog watchdog flag
  756. * @arg ADC_FLAG_EOC: End of conversion flag
  757. * @arg ADC_FLAG_ADRDY: ADC Ready flag
  758. * @arg ADC_FLAG_EOSMP: End of sampling flag
  759. * @arg ADC_FLAG_EOSEQ: End of Sequence flag
  760. * @arg ADC_FLAG_OVR: Overrun flag
  761. * @retval None
  762. */
  763. void ADC_ClearFlag(ADC_TypeDef* ADCx, uint32_t ADC_FLAG)
  764. {
  765. /* Check the parameters */
  766. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  767. assert_param(IS_ADC_CLEAR_FLAG(ADC_FLAG));
  768. /* Clear the selected ADC flags */
  769. ADCx->ISR = (uint32_t)ADC_FLAG;
  770. }
  771. /**
  772. * @brief Checks whether the specified ADC interrupt has occurred or not.
  773. * @param ADCx: where x can be 1 to select the ADC1 peripheral
  774. * @param ADC_IT: specifies the ADC interrupt source to check.
  775. * This parameter can be one of the following values:
  776. * @arg ADC_IT_ADRDY: ADC ready interrupt
  777. * @arg ADC_IT_EOSMP: End of sampling interrupt
  778. * @arg ADC_IT_EOC: End of conversion interrupt
  779. * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
  780. * @arg ADC_IT_OVR: overrun interrupt
  781. * @arg ADC_IT_AWD: Analog watchdog interrupt
  782. * @retval The new state of ADC_IT (SET or RESET).
  783. */
  784. ITStatus ADC_GetITStatus(ADC_TypeDef* ADCx, uint32_t ADC_IT)
  785. {
  786. ITStatus bitstatus = RESET;
  787. uint32_t enablestatus = 0;
  788. /* Check the parameters */
  789. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  790. assert_param(IS_ADC_GET_IT(ADC_IT));
  791. /* Get the ADC_IT enable bit status */
  792. enablestatus = (uint32_t)(ADCx->IER & ADC_IT);
  793. /* Check the status of the specified ADC interrupt */
  794. if (((uint32_t)(ADCx->ISR & ADC_IT) != (uint32_t)RESET) && (enablestatus != (uint32_t)RESET))
  795. {
  796. /* ADC_IT is set */
  797. bitstatus = SET;
  798. }
  799. else
  800. {
  801. /* ADC_IT is reset */
  802. bitstatus = RESET;
  803. }
  804. /* Return the ADC_IT status */
  805. return bitstatus;
  806. }
  807. /**
  808. * @brief Clears the ADCx's interrupt pending bits.
  809. * @param ADCx: where x can be 1 to select the ADC1 peripheral.
  810. * @param ADC_IT: specifies the ADC interrupt pending bit to clear.
  811. * This parameter can be one of the following values:
  812. * @arg ADC_IT_ADRDY: ADC ready interrupt
  813. * @arg ADC_IT_EOSMP: End of sampling interrupt
  814. * @arg ADC_IT_EOC: End of conversion interrupt
  815. * @arg ADC_IT_EOSEQ: End of sequence of conversion interrupt
  816. * @arg ADC_IT_OVR: overrun interrupt
  817. * @arg ADC_IT_AWD: Analog watchdog interrupt
  818. * @retval None
  819. */
  820. void ADC_ClearITPendingBit(ADC_TypeDef* ADCx, uint32_t ADC_IT)
  821. {
  822. /* Check the parameters */
  823. assert_param(IS_ADC_ALL_PERIPH(ADCx));
  824. assert_param(IS_ADC_CLEAR_IT(ADC_IT));
  825. /* Clear the selected ADC interrupt pending bits */
  826. ADCx->ISR = (uint32_t)ADC_IT;
  827. }
  828. /**
  829. * @brief select the ADC VREF.
  830. * @param ADC_Vrefsel: The sVREF value to be set for the ADC.
  831. This parameter can be one of the following values:
  832. * @arg ADC_Vrefsel_0_625V: VREF 0.625V selected
  833. * @arg ADC_Vrefsel_1_5V: VREF 1.5V selected
  834. * @arg ADC_Vrefsel_2_5V: VREF 2.5V selected
  835. * @arg ADC_Vrefsel_VDDA: VREF VDDA selected
  836. * @retval None
  837. */
  838. void ADC_VrefselConfig(uint32_t ADC_Vrefsel)
  839. {
  840. uint32_t tmpreg = 0;
  841. /* Check the parameters */
  842. assert_param(IS_ADC_Vrefsel(ADC_Vrefsel));
  843. /* Read CR2 register */
  844. tmpreg = ADC->CR2;
  845. /* Clear the Vref Selection bits */
  846. tmpreg &= ~((uint32_t)0x0000000E) ;
  847. /* Set the ADC Vref register */
  848. tmpreg |= (uint32_t)ADC_Vrefsel;
  849. /* Configure the ADC Vref register */
  850. ADC->CR2 = tmpreg;
  851. }
  852. /**
  853. * @brief Enable Reference voltage halved.
  854. * @param NewState: new state of the reference voltage halved.
  855. * This parameter can be: ENABLE or DISABLE.
  856. * @note None
  857. * @retval None
  858. */
  859. void ADC_VrefDecibCmd(FunctionalState NewState)
  860. {
  861. /* Check the parameters */
  862. assert_param(IS_FUNCTIONAL_STATE(NewState));
  863. if (NewState != DISABLE)
  864. {
  865. /* Enable the Discontinuous mode */
  866. ADC->CR2 |= (uint32_t)ADC_CR2_VREF_DECIB;
  867. }
  868. else
  869. {
  870. /* Disable the Discontinuous mode */
  871. ADC->CR2 &= (uint32_t)(~ADC_CR2_VREF_DECIB);
  872. }
  873. }
  874. /**
  875. * @brief Sampling hold circuit sampling enable or disable.
  876. * @param SmpEn:
  877. * @arg ADC_IOSH1_SMPEN
  878. * @arg ADC_IOSH2_SMPEN
  879. * @param NewState: new state of SMP.
  880. * This parameter can be: ENABLE or DISABLE.
  881. * @note None
  882. * @retval None
  883. */
  884. void ADC_IoshSmpCmd(uint32_t SmpEn, FunctionalState NewState)
  885. {
  886. /* Check the parameters */
  887. assert_param(IS_ADC_SMPEN(SmpEn));
  888. assert_param(IS_FUNCTIONAL_STATE(NewState));
  889. if (NewState != DISABLE)
  890. {
  891. ADC->CR2 |= SmpEn;
  892. }
  893. else
  894. {
  895. ADC->CR2 &= ~SmpEn;
  896. }
  897. }
  898. /**
  899. * @brief The hold enable bit of the sample-hold circuit.
  900. * @param SmpEn:
  901. * @arg ADC_IOSH1_AMPEN
  902. * @arg ADC_IOSH2_AMPEN
  903. * @param NewState: new state of AMP.
  904. * This parameter can be: ENABLE or DISABLE.
  905. * @note None
  906. * @retval None
  907. */
  908. void ADC_IoshAmpCmd(uint32_t AmpEn, FunctionalState NewState)
  909. {
  910. /* Check the parameters */
  911. assert_param(IS_ADC_AMPEN(AmpEn));
  912. assert_param(IS_FUNCTIONAL_STATE(NewState));
  913. if (NewState != DISABLE)
  914. {
  915. ADC->CR2 |= AmpEn;
  916. }
  917. else
  918. {
  919. ADC->CR2 &= ~AmpEn;
  920. }
  921. }
  922. /**
  923. * @brief Input source selection.
  924. * @param Ioshx:
  925. * @arg ADC_CR2_IOSH1_SEL
  926. * @arg ADC_CR2_IOSH2_SEL
  927. * @param SmpSel:
  928. * if Ioshx is ADC_CR2_IOSH1_SEL,the SmpSel can be
  929. * @arg ADC_IOSH1_SMPSEL_PB1
  930. * @arg ADC_IOSH1_SMPSEL_OP1OUT
  931. * if Ioshx is ADC_CR2_IOSH2_SEL,the SmpSel can be
  932. * @arg ADC_IOSH2_SMPSEL_PB0
  933. * @arg ADC_IOSH2_SMPSEL_OP2OUT
  934. * @note None
  935. * @retval None
  936. */
  937. #if defined (FT32F072xB)
  938. void ADC_IoshSmpSel(uint32_t Ioshx, uint32_t SmpSel)
  939. {
  940. uint32_t tmpreg = 0;
  941. /* Check the parameters */
  942. assert_param(IS_ADC_IOSH(Ioshx));
  943. assert_param(IS_ADC_SMPSEL(SmpSel));
  944. /* Read CR2 register */
  945. tmpreg = ADC->CR2;
  946. if (Ioshx != ADC_CR2_IOSH1_SEL)
  947. {
  948. /* IOSH2 */
  949. tmpreg &= ~ADC_CR2_IOSH2_SEL;
  950. }
  951. else
  952. {
  953. /* IOSH1 */
  954. tmpreg &= ~ADC_CR2_IOSH1_SEL;
  955. }
  956. tmpreg |= SmpSel;
  957. /* Config CR2 register */
  958. ADC->CR2 = tmpreg;
  959. }
  960. /**
  961. * @brief The hold enable bit of the sample-hold circuit.
  962. * @param SmpModBit:
  963. * @arg ADC_CR2_IOSH1_SMPMOD
  964. * @arg ADC_CR2_IOSH2_SMPMOD
  965. * @param Mode:
  966. * @arg ADC_SMP_SOFTWARE_MODE
  967. * @arg ADC_SMP_HARDWARE_MODE
  968. * @note None
  969. * @retval None
  970. */
  971. void ADC_IoshSmpMod(uint32_t SmpModBit, uint32_t Mode)
  972. {
  973. uint32_t tmpreg = 0;
  974. /* Check the parameters */
  975. assert_param(IS_ADC_SMPMOD(SmpModBit));
  976. assert_param(IS_ADC_MODE(Mode));
  977. /* Read CR2 register */
  978. tmpreg = ADC->CR2;
  979. if (Mode != ADC_SMP_SOFTWARE_MODE)
  980. {
  981. /* Hardware mode */
  982. if (SmpModBit != ADC_CR2_IOSH1_SMPMOD)
  983. {
  984. /* IOSH2 */
  985. tmpreg |= ADC_CR2_IOSH2_SMPMOD | ADC_CR2_IOSH2_AMPEN;
  986. }
  987. else
  988. {
  989. /* IOSH1 */
  990. tmpreg |= ADC_CR2_IOSH1_SMPMOD | ADC_CR2_IOSH1_AMPEN;
  991. }
  992. }
  993. else
  994. {
  995. /* Software mode */
  996. if (SmpModBit != ADC_CR2_IOSH1_SMPMOD)
  997. {
  998. /* IOSH2 */
  999. tmpreg &= ~ADC_CR2_IOSH2_AMPEN;
  1000. tmpreg |= ADC_CR2_IOSH2_SMPMOD | ADC_CR2_IOSH2_SMPEN;
  1001. }
  1002. else
  1003. {
  1004. /* IOSH1 */
  1005. tmpreg &= ~ADC_CR2_IOSH1_AMPEN;
  1006. tmpreg |= ADC_CR2_IOSH1_SMPMOD | ADC_CR2_IOSH1_SMPEN;
  1007. }
  1008. }
  1009. /* Config CR2 register */
  1010. ADC->CR2 = tmpreg;
  1011. }
  1012. /**
  1013. * @brief External hardware trigger mode config.
  1014. * @param NewState: new state of .
  1015. * This parameter can be: ENABLE or DISABLE.
  1016. * @note None
  1017. * @retval None
  1018. */
  1019. void ADC_ExtModeCmd(FunctionalState NewState)
  1020. {
  1021. /* Check the parameters */
  1022. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1023. if (NewState != DISABLE)
  1024. {
  1025. ADC1->ETCR |= ADC_ETCR_EXTMOD;
  1026. }
  1027. else
  1028. {
  1029. ADC1->ETCR &= ~ADC_ETCR_EXTMOD;
  1030. }
  1031. }
  1032. /**
  1033. * @brief Stop sampling configuration after triggering.
  1034. * @param NewState: new state of .
  1035. * This parameter can be: ENABLE or DISABLE.
  1036. * @note None
  1037. * @retval None
  1038. */
  1039. void ADC_TrgdDisSmpCmd(FunctionalState NewState)
  1040. {
  1041. /* Check the parameters */
  1042. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1043. if (NewState != DISABLE)
  1044. {
  1045. ADC1->ETCR |= ADC_ETCR_TRGDISSMP;
  1046. }
  1047. else
  1048. {
  1049. ADC1->ETCR &= ~ADC_ETCR_TRGDISSMP;
  1050. }
  1051. }
  1052. /**
  1053. * @brief The delay time of The external hardware triggers.
  1054. * @param ExtDly: 0~1023.
  1055. * @note None
  1056. * @retval None
  1057. */
  1058. void ADC_ExtDlyConfig(uint32_t ExtDly)
  1059. {
  1060. uint32_t tmpreg = 0;
  1061. /* Check the parameters */
  1062. assert_param(IS_ADC_EXTDLY(ExtDly));
  1063. /* Read ETCR register */
  1064. tmpreg = ADC1->ETCR;
  1065. /* Clear EXTDLY */
  1066. tmpreg &= ~ADC_ETCR_EXTDLY;
  1067. /* Config EXTDLY */
  1068. tmpreg |= ExtDly;
  1069. /* Config ETCR */
  1070. ADC1->ETCR = tmpreg;
  1071. }
  1072. /**
  1073. * @brief Rising edge triggering config.
  1074. * @param Rtenx:This parameter can be :
  1075. * ADC_RTENR_RTEN or ADC_RTENR_RTEN_0 ~ ADC_RTENR_RTEN_18
  1076. * @param NewState: new state of .
  1077. * This parameter can be: ENABLE or DISABLE.
  1078. * @note None
  1079. * @retval None
  1080. */
  1081. void ADC_RtenCmd(uint32_t Rtenx, FunctionalState NewState)
  1082. {
  1083. /* Check the parameters */
  1084. assert_param(IS_ADC_RTEN(Rtenx));
  1085. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1086. if (NewState != DISABLE)
  1087. {
  1088. ADC1->RTENR |= Rtenx;
  1089. }
  1090. else
  1091. {
  1092. ADC1->RTENR &= ~Rtenx;
  1093. }
  1094. }
  1095. /**
  1096. * @brief Falling edge triggering config.
  1097. * @param Ftenx:This parameter can be :
  1098. * ADC_FTENR_RTEN or ADC_FTENR_RTEN_0 ~ ADC_FTENR_RTEN_18
  1099. * @param NewState: new state of .
  1100. * This parameter can be: ENABLE or DISABLE.
  1101. * @note None
  1102. * @retval None
  1103. */
  1104. void ADC_FtenCmd(uint32_t Ftenx, FunctionalState NewState)
  1105. {
  1106. /* Check the parameters */
  1107. assert_param(IS_ADC_FTEN(Ftenx));
  1108. assert_param(IS_FUNCTIONAL_STATE(NewState));
  1109. if (NewState != DISABLE)
  1110. {
  1111. ADC1->FTENR |= Ftenx;
  1112. }
  1113. else
  1114. {
  1115. ADC1->FTENR &= ~Ftenx;
  1116. }
  1117. }
  1118. #endif
  1119. /**
  1120. * @}
  1121. */
  1122. /**
  1123. * @}
  1124. */
  1125. /**
  1126. * @}
  1127. */
  1128. /**
  1129. * @}
  1130. */
  1131. /************************ (C) COPYRIGHT FMD *****END OF FILE****/