ft32f0xx_spi.c 28 KB

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  1. /**
  2. ******************************************************************************
  3. * @file ft32f0xx_spi.c
  4. * @author FMD AE
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the Serial peripheral interface (SPI):
  7. * + Initialization and Configuration
  8. * + Data transfers functions
  9. * + Hardware CRC Calculation
  10. * + DMA transfers management
  11. * + Interrupts and flags management
  12. * @version V1.0.0
  13. * @data 2021-07-01
  14. ******************************************************************************
  15. */
  16. /* Includes ------------------------------------------------------------------*/
  17. #include "ft32f0xx_spi.h"
  18. #include "ft32f0xx_rcc.h"
  19. /* SPI registers Masks */
  20. #define CR1_CLEAR_MASK ((uint16_t)0x3040)
  21. #define CR1_CLEAR_MASK2 ((uint16_t)0xFFFB)
  22. #define CR2_LDMA_MASK ((uint16_t)0x9FFF)
  23. #define I2SCFGR_CLEAR_Mask ((uint16_t)0xF040)
  24. /**
  25. * @brief Deinitializes the SPIx peripheral registers to their default
  26. * reset values.
  27. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  28. * @retval None
  29. */
  30. void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
  31. {
  32. /* Check the parameters */
  33. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  34. if (SPIx == SPI1)
  35. {
  36. /* Enable SPI1 reset state */
  37. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
  38. /* Release SPI1 from reset state */
  39. RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
  40. }
  41. else
  42. {
  43. if (SPIx == SPI2)
  44. {
  45. /* Enable SPI2 reset state */
  46. RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
  47. /* Release SPI2 from reset state */
  48. RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
  49. }
  50. }
  51. }
  52. /**
  53. * @brief Fills each SPI_InitStruct member with its default value.
  54. * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized.
  55. * @retval None
  56. */
  57. void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
  58. {
  59. /*--------------- Reset SPI init structure parameters values -----------------*/
  60. /* Initialize the SPI_Direction member */
  61. SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  62. /* Initialize the SPI_Mode member */
  63. SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
  64. /* Initialize the SPI_DataSize member */
  65. SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
  66. /* Initialize the SPI_CPOL member */
  67. SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
  68. /* Initialize the SPI_CPHA member */
  69. SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
  70. /* Initialize the SPI_NSS member */
  71. SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
  72. /* Initialize the SPI_BaudRatePrescaler member */
  73. SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
  74. /* Initialize the SPI_FirstBit member */
  75. SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
  76. /* Initialize the SPI_CRCPolynomial member */
  77. SPI_InitStruct->SPI_CRCPolynomial = 7;
  78. }
  79. /**
  80. * @brief Initializes the SPIx peripheral according to the specified
  81. * parameters in the SPI_InitStruct.
  82. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  83. * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
  84. * contains the configuration information for the specified SPI peripheral.
  85. * @retval None
  86. */
  87. void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
  88. {
  89. uint16_t tmpreg = 0;
  90. /* check the parameters */
  91. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  92. /* Check the SPI parameters */
  93. assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
  94. assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
  95. assert_param(IS_SPI_DATA_SIZE(SPI_InitStruct->SPI_DataSize));
  96. assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
  97. assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
  98. assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
  99. assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
  100. assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
  101. assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
  102. /*---------------------------- SPIx CR1 Configuration ------------------------*/
  103. /* Get the SPIx CR1 value */
  104. tmpreg = SPIx->CR1;
  105. /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, CPOL and CPHA bits */
  106. tmpreg &= CR1_CLEAR_MASK;
  107. /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
  108. master/slave mode, CPOL and CPHA */
  109. /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
  110. /* Set SSM, SSI bit according to SPI_NSS values */
  111. /* Set LSBFirst bit according to SPI_FirstBit value */
  112. /* Set BR bits according to SPI_BaudRatePrescaler value */
  113. /* Set CPOL bit according to SPI_CPOL value */
  114. /* Set CPHA bit according to SPI_CPHA value */
  115. tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_FirstBit |
  116. SPI_InitStruct->SPI_CPOL | SPI_InitStruct->SPI_CPHA |
  117. SPI_InitStruct->SPI_NSS | SPI_InitStruct->SPI_BaudRatePrescaler);
  118. /* Write to SPIx CR1 */
  119. SPIx->CR1 = tmpreg;
  120. /*-------------------------Data Size Configuration -----------------------*/
  121. /* Get the SPIx CR2 value */
  122. tmpreg = SPIx->CR2;
  123. /* Clear DS[3:0] bits */
  124. tmpreg &=(uint16_t)~SPI_CR2_DS;
  125. /* Configure SPIx: Data Size */
  126. tmpreg |= (uint16_t)(SPI_InitStruct->SPI_DataSize);
  127. /* Write to SPIx CR2 */
  128. SPIx->CR2 = tmpreg;
  129. /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
  130. /* Write to SPIx CRCPOLY */
  131. SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
  132. /*---------------------------- SPIx CR1 Configuration ------------------------*/
  133. /* Get the SPIx CR1 value */
  134. tmpreg = SPIx->CR1;
  135. /* Clear MSTR bit */
  136. tmpreg &= CR1_CLEAR_MASK2;
  137. /* Configure SPIx: master/slave mode */
  138. /* Set MSTR bit according to SPI_Mode */
  139. tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Mode);
  140. /* Write to SPIx CR1 */
  141. SPIx->CR1 = tmpreg;
  142. // /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
  143. // SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
  144. }
  145. /**
  146. * @brief Enables or disables the specified SPI peripheral.
  147. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  148. * @param NewState: new state of the SPIx peripheral.
  149. * This parameter can be: ENABLE or DISABLE.
  150. * @retval None
  151. */
  152. void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  153. {
  154. /* Check the parameters */
  155. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  156. assert_param(IS_FUNCTIONAL_STATE(NewState));
  157. if (NewState != DISABLE)
  158. {
  159. /* Enable the selected SPI peripheral */
  160. SPIx->CR1 |= SPI_CR1_SPE;
  161. }
  162. else
  163. {
  164. /* Disable the selected SPI peripheral */
  165. SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
  166. }
  167. }
  168. /**
  169. * @brief Enables or disables the TI Mode.
  170. *
  171. * @note This function can be called only after the SPI_Init() function has
  172. * been called.
  173. * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
  174. * are not taken into consideration and are configured by hardware
  175. * respectively to the TI mode requirements.
  176. *
  177. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  178. * @param NewState: new state of the selected SPI TI communication mode.
  179. * This parameter can be: ENABLE or DISABLE.
  180. * @retval None
  181. */
  182. void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  183. {
  184. /* Check the parameters */
  185. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  186. assert_param(IS_FUNCTIONAL_STATE(NewState));
  187. if (NewState != DISABLE)
  188. {
  189. /* Enable the TI mode for the selected SPI peripheral */
  190. SPIx->CR2 |= SPI_CR2_FRF;
  191. }
  192. else
  193. {
  194. /* Disable the TI mode for the selected SPI peripheral */
  195. SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRF);
  196. }
  197. }
  198. /**
  199. * @brief Configures the data size for the selected SPI.
  200. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  201. * @param SPI_DataSize: specifies the SPI data size.
  202. * For the SPIx peripheral this parameter can be one of the following values:
  203. * @arg SPI_DataSize_4b: Set data size to 4 bits
  204. * @arg SPI_DataSize_5b: Set data size to 5 bits
  205. * @arg SPI_DataSize_6b: Set data size to 6 bits
  206. * @arg SPI_DataSize_7b: Set data size to 7 bits
  207. * @arg SPI_DataSize_8b: Set data size to 8 bits
  208. * @arg SPI_DataSize_9b: Set data size to 9 bits
  209. * @arg SPI_DataSize_10b: Set data size to 10 bits
  210. * @arg SPI_DataSize_11b: Set data size to 11 bits
  211. * @arg SPI_DataSize_12b: Set data size to 12 bits
  212. * @arg SPI_DataSize_13b: Set data size to 13 bits
  213. * @arg SPI_DataSize_14b: Set data size to 14 bits
  214. * @arg SPI_DataSize_15b: Set data size to 15 bits
  215. * @arg SPI_DataSize_16b: Set data size to 16 bits
  216. * @retval None
  217. */
  218. void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
  219. {
  220. uint16_t tmpreg = 0;
  221. /* Check the parameters */
  222. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  223. assert_param(IS_SPI_DATA_SIZE(SPI_DataSize));
  224. /* Read the CR2 register */
  225. tmpreg = SPIx->CR2;
  226. /* Clear DS[3:0] bits */
  227. tmpreg &= (uint16_t)~SPI_CR2_DS;
  228. /* Set new DS[3:0] bits value */
  229. tmpreg |= SPI_DataSize;
  230. SPIx->CR2 = tmpreg;
  231. }
  232. /**
  233. * @brief Configures the FIFO reception threshold for the selected SPI.
  234. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  235. * @param SPI_RxFIFOThreshold: specifies the FIFO reception threshold.
  236. * This parameter can be one of the following values:
  237. * @arg SPI_RxFIFOThreshold_HF: RXNE event is generated if the FIFO
  238. * level is greater or equal to 1/2.
  239. * @arg SPI_RxFIFOThreshold_QF: RXNE event is generated if the FIFO
  240. * level is greater or equal to 1/4.
  241. * @retval None
  242. */
  243. void SPI_RxFIFOThresholdConfig(SPI_TypeDef* SPIx, uint16_t SPI_RxFIFOThreshold)
  244. {
  245. /* Check the parameters */
  246. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  247. assert_param(IS_SPI_RX_FIFO_THRESHOLD(SPI_RxFIFOThreshold));
  248. /* Clear FRXTH bit */
  249. SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_FRXTH);
  250. /* Set new FRXTH bit value */
  251. SPIx->CR2 |= SPI_RxFIFOThreshold;
  252. }
  253. /**
  254. * @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
  255. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  256. * @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
  257. * This parameter can be one of the following values:
  258. * @arg SPI_Direction_Tx: Selects Tx transmission direction
  259. * @arg SPI_Direction_Rx: Selects Rx receive direction
  260. * @retval None
  261. */
  262. void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
  263. {
  264. /* Check the parameters */
  265. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  266. assert_param(IS_SPI_DIRECTION(SPI_Direction));
  267. if (SPI_Direction == SPI_Direction_Tx)
  268. {
  269. /* Set the Tx only mode */
  270. SPIx->CR1 |= SPI_Direction_Tx;
  271. }
  272. else
  273. {
  274. /* Set the Rx only mode */
  275. SPIx->CR1 &= SPI_Direction_Rx;
  276. }
  277. }
  278. /**
  279. * @brief Configures internally by software the NSS pin for the selected SPI.
  280. * @note This function can be called only after the SPI_Init() function has
  281. * been called.
  282. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  283. * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
  284. * This parameter can be one of the following values:
  285. * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
  286. * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
  287. * @retval None
  288. */
  289. void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
  290. {
  291. /* Check the parameters */
  292. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  293. assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
  294. if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
  295. {
  296. /* Set NSS pin internally by software */
  297. SPIx->CR1 |= SPI_NSSInternalSoft_Set;
  298. }
  299. else
  300. {
  301. /* Reset NSS pin internally by software */
  302. SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
  303. }
  304. }
  305. /**
  306. * @brief Enables or disables the SS output for the selected SPI.
  307. * @note This function can be called only after the SPI_Init() function has
  308. * been called and the NSS hardware management mode is selected.
  309. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  310. * @param NewState: new state of the SPIx SS output.
  311. * This parameter can be: ENABLE or DISABLE.
  312. * @retval None
  313. */
  314. void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  315. {
  316. /* Check the parameters */
  317. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  318. assert_param(IS_FUNCTIONAL_STATE(NewState));
  319. if (NewState != DISABLE)
  320. {
  321. /* Enable the selected SPI SS output */
  322. SPIx->CR2 |= SPI_CR2_SSOE;
  323. }
  324. else
  325. {
  326. /* Disable the selected SPI SS output */
  327. SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
  328. }
  329. }
  330. /**
  331. * @brief Enables or disables the NSS pulse management mode.
  332. * @note This function can be called only after the SPI_Init() function has
  333. * been called.
  334. * @note When TI mode is selected, the control bits NSSP is not taken into
  335. * consideration and are configured by hardware respectively to the
  336. * TI mode requirements.
  337. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  338. * @param NewState: new state of the NSS pulse management mode.
  339. * This parameter can be: ENABLE or DISABLE.
  340. * @retval None
  341. */
  342. void SPI_NSSPulseModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
  343. {
  344. /* Check the parameters */
  345. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  346. assert_param(IS_FUNCTIONAL_STATE(NewState));
  347. if (NewState != DISABLE)
  348. {
  349. /* Enable the NSS pulse management mode */
  350. SPIx->CR2 |= SPI_CR2_NSSP;
  351. }
  352. else
  353. {
  354. /* Disable the NSS pulse management mode */
  355. SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_NSSP);
  356. }
  357. }
  358. /**
  359. * @}
  360. */
  361. /**
  362. * @brief Transmits a Data through the SPIx/I2Sx peripheral.
  363. * @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
  364. * @param Data: Data to be transmitted.
  365. * @retval None
  366. */
  367. void SPI_SendData8(SPI_TypeDef* SPIx, uint8_t Data)
  368. {
  369. uint32_t spixbase = 0x00;
  370. /* Check the parameters */
  371. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  372. spixbase = (uint32_t)SPIx;
  373. spixbase += 0x0C;
  374. *(__IO uint8_t *) spixbase = Data;
  375. }
  376. /**
  377. * @brief Transmits a Data through the SPIx/I2Sx peripheral.
  378. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  379. * the SPI peripheral.
  380. * @param Data: Data to be transmitted.
  381. * @retval None
  382. */
  383. void SPI_I2S_SendData16(SPI_TypeDef* SPIx, uint16_t Data)
  384. {
  385. /* Check the parameters */
  386. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  387. SPIx->DR = (uint16_t)Data;
  388. }
  389. /**
  390. * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
  391. * @param SPIx: where x can be 1 or 2 in SPI mode to select the SPI peripheral.
  392. * @retval The value of the received data.
  393. */
  394. uint8_t SPI_ReceiveData8(SPI_TypeDef* SPIx)
  395. {
  396. uint32_t spixbase = 0x00;
  397. spixbase = (uint32_t)SPIx;
  398. spixbase += 0x0C;
  399. return *(__IO uint8_t *) spixbase;
  400. }
  401. /**
  402. * @brief Returns the most recent received data by the SPIx peripheral.
  403. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  404. * the SPI peripheral.
  405. * @retval The value of the received data.
  406. */
  407. uint16_t SPI_I2S_ReceiveData16(SPI_TypeDef* SPIx)
  408. {
  409. return SPIx->DR;
  410. }
  411. /**
  412. * @}
  413. */
  414. /**
  415. * @brief Configures the CRC calculation length for the selected SPI.
  416. * @note This function can be called only after the SPI_Init() function has
  417. * been called.
  418. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  419. * @param SPI_CRCLength: specifies the SPI CRC calculation length.
  420. * This parameter can be one of the following values:
  421. * @arg SPI_CRCLength_8b: Set CRC Calculation to 8 bits
  422. * @arg SPI_CRCLength_16b: Set CRC Calculation to 16 bits
  423. * @retval None
  424. */
  425. void SPI_CRCLengthConfig(SPI_TypeDef* SPIx, uint16_t SPI_CRCLength)
  426. {
  427. /* Check the parameters */
  428. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  429. assert_param(IS_SPI_CRC_LENGTH(SPI_CRCLength));
  430. /* Clear CRCL bit */
  431. SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCL);
  432. /* Set new CRCL bit value */
  433. SPIx->CR1 |= SPI_CRCLength;
  434. }
  435. /**
  436. * @brief Enables or disables the CRC value calculation of the transferred bytes.
  437. * @note This function can be called only after the SPI_Init() function has
  438. * been called.
  439. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  440. * @param NewState: new state of the SPIx CRC value calculation.
  441. * This parameter can be: ENABLE or DISABLE.
  442. * @retval None
  443. */
  444. void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
  445. {
  446. /* Check the parameters */
  447. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  448. assert_param(IS_FUNCTIONAL_STATE(NewState));
  449. if (NewState != DISABLE)
  450. {
  451. /* Enable the selected SPI CRC calculation */
  452. SPIx->CR1 |= SPI_CR1_CRCEN;
  453. }
  454. else
  455. {
  456. /* Disable the selected SPI CRC calculation */
  457. SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
  458. }
  459. }
  460. /**
  461. * @brief Transmit the SPIx CRC value.
  462. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  463. * @retval None
  464. */
  465. void SPI_TransmitCRC(SPI_TypeDef* SPIx)
  466. {
  467. /* Check the parameters */
  468. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  469. /* Enable the selected SPI CRC transmission */
  470. SPIx->CR1 |= SPI_CR1_CRCNEXT;
  471. }
  472. /**
  473. * @brief Returns the transmit or the receive CRC register value for the specified SPI.
  474. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  475. * @param SPI_CRC: specifies the CRC register to be read.
  476. * This parameter can be one of the following values:
  477. * @arg SPI_CRC_Tx: Selects Tx CRC register
  478. * @arg SPI_CRC_Rx: Selects Rx CRC register
  479. * @retval The selected CRC register value..
  480. */
  481. uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
  482. {
  483. uint16_t crcreg = 0;
  484. /* Check the parameters */
  485. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  486. assert_param(IS_SPI_CRC(SPI_CRC));
  487. if (SPI_CRC != SPI_CRC_Rx)
  488. {
  489. /* Get the Tx CRC register */
  490. crcreg = SPIx->TXCRCR;
  491. }
  492. else
  493. {
  494. /* Get the Rx CRC register */
  495. crcreg = SPIx->RXCRCR;
  496. }
  497. /* Return the selected CRC register */
  498. return crcreg;
  499. }
  500. /**
  501. * @brief Returns the CRC Polynomial register value for the specified SPI.
  502. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  503. * @retval The CRC Polynomial register value.
  504. */
  505. uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
  506. {
  507. /* Check the parameters */
  508. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  509. /* Return the CRC polynomial register */
  510. return SPIx->CRCPR;
  511. }
  512. /**
  513. * @}
  514. */
  515. /**
  516. * @brief Enables or disables the SPIx/I2Sx DMA interface.
  517. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  518. * the SPI peripheral.
  519. * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
  520. * This parameter can be any combination of the following values:
  521. * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
  522. * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
  523. * @param NewState: new state of the selected SPI DMA transfer request.
  524. * This parameter can be: ENABLE or DISABLE.
  525. * @retval None
  526. */
  527. void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
  528. {
  529. /* Check the parameters */
  530. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  531. assert_param(IS_FUNCTIONAL_STATE(NewState));
  532. assert_param(IS_SPI_I2S_DMA_REQ(SPI_I2S_DMAReq));
  533. if (NewState != DISABLE)
  534. {
  535. /* Enable the selected SPI DMA requests */
  536. SPIx->CR2 |= SPI_I2S_DMAReq;
  537. }
  538. else
  539. {
  540. /* Disable the selected SPI DMA requests */
  541. SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
  542. }
  543. }
  544. /**
  545. * @brief Configures the number of data to transfer type(Even/Odd) for the DMA
  546. * last transfers and for the selected SPI.
  547. * @note This function have a meaning only if DMA mode is selected and if
  548. * the packing mode is used (data length <= 8 and DMA transfer size halfword)
  549. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  550. * @param SPI_LastDMATransfer: specifies the SPI last DMA transfers state.
  551. * This parameter can be one of the following values:
  552. * @arg SPI_LastDMATransfer_TxEvenRxEven: Number of data for transmission Even
  553. * and number of data for reception Even.
  554. * @arg SPI_LastDMATransfer_TxOddRxEven: Number of data for transmission Odd
  555. * and number of data for reception Even.
  556. * @arg SPI_LastDMATransfer_TxEvenRxOdd: Number of data for transmission Even
  557. * and number of data for reception Odd.
  558. * @arg SPI_LastDMATransfer_TxOddRxOdd: Number of data for transmission Odd
  559. * and number of data for reception Odd.
  560. * @retval None
  561. */
  562. void SPI_LastDMATransferCmd(SPI_TypeDef* SPIx, uint16_t SPI_LastDMATransfer)
  563. {
  564. /* Check the parameters */
  565. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  566. assert_param(IS_SPI_LAST_DMA_TRANSFER(SPI_LastDMATransfer));
  567. /* Clear LDMA_TX and LDMA_RX bits */
  568. SPIx->CR2 &= CR2_LDMA_MASK;
  569. /* Set new LDMA_TX and LDMA_RX bits value */
  570. SPIx->CR2 |= SPI_LastDMATransfer;
  571. }
  572. /**
  573. * @}
  574. */
  575. /**
  576. * @brief Enables or disables the specified SPI/I2S interrupts.
  577. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  578. * the SPI peripheral.
  579. * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
  580. * This parameter can be one of the following values:
  581. * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
  582. * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
  583. * @arg SPI_I2S_IT_ERR: Error interrupt mask
  584. * @param NewState: new state of the specified SPI interrupt.
  585. * This parameter can be: ENABLE or DISABLE.
  586. * @retval None
  587. */
  588. void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
  589. {
  590. uint16_t itpos = 0, itmask = 0 ;
  591. /* Check the parameters */
  592. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  593. assert_param(IS_FUNCTIONAL_STATE(NewState));
  594. assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
  595. /* Get the SPI IT index */
  596. itpos = SPI_I2S_IT >> 4;
  597. /* Set the IT mask */
  598. itmask = (uint16_t)1 << (uint16_t)itpos;
  599. if (NewState != DISABLE)
  600. {
  601. /* Enable the selected SPI interrupt */
  602. SPIx->CR2 |= itmask;
  603. }
  604. else
  605. {
  606. /* Disable the selected SPI interrupt */
  607. SPIx->CR2 &= (uint16_t)~itmask;
  608. }
  609. }
  610. /**
  611. * @brief Returns the current SPIx Transmission FIFO filled level.
  612. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  613. * @retval The Transmission FIFO filling state.
  614. * - SPI_TransmissionFIFOStatus_Empty: when FIFO is empty
  615. * - SPI_TransmissionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
  616. * - SPI_TransmissionFIFOStatus_HalfFull: if more than 1 half-full.
  617. * - SPI_TransmissionFIFOStatus_Full: when FIFO is full.
  618. */
  619. uint16_t SPI_GetTransmissionFIFOStatus(SPI_TypeDef* SPIx)
  620. {
  621. /* Get the SPIx Transmission FIFO level bits */
  622. return (uint16_t)((SPIx->SR & SPI_SR_FTLVL));
  623. }
  624. /**
  625. * @brief Returns the current SPIx Reception FIFO filled level.
  626. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  627. * @retval The Reception FIFO filling state.
  628. * - SPI_ReceptionFIFOStatus_Empty: when FIFO is empty
  629. * - SPI_ReceptionFIFOStatus_1QuarterFull: if more than 1 quarter-full.
  630. * - SPI_ReceptionFIFOStatus_HalfFull: if more than 1 half-full.
  631. * - SPI_ReceptionFIFOStatus_Full: when FIFO is full.
  632. */
  633. uint16_t SPI_GetReceptionFIFOStatus(SPI_TypeDef* SPIx)
  634. {
  635. /* Get the SPIx Reception FIFO level bits */
  636. return (uint16_t)((SPIx->SR & SPI_SR_FRLVL));
  637. }
  638. /**
  639. * @brief Checks whether the specified SPI flag is set or not.
  640. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  641. * the SPI peripheral.
  642. * @param SPI_I2S_FLAG: specifies the SPI flag to check.
  643. * This parameter can be one of the following values:
  644. * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
  645. * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
  646. * @arg SPI_I2S_FLAG_BSY: Busy flag.
  647. * @arg SPI_I2S_FLAG_OVR: Overrun flag.
  648. * @arg SPI_FLAG_MODF: Mode Fault flag.
  649. * @arg SPI_FLAG_CRCERR: CRC Error flag.
  650. * @arg SPI_I2S_FLAG_FRE: TI frame format error flag.
  651. * @arg I2S_FLAG_UDR: Underrun Error flag.
  652. * @arg I2S_FLAG_CHSIDE: Channel Side flag.
  653. * @retval The new state of SPI_I2S_FLAG (SET or RESET).
  654. */
  655. FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
  656. {
  657. FlagStatus bitstatus = RESET;
  658. /* Check the parameters */
  659. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  660. assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
  661. /* Check the status of the specified SPI flag */
  662. if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
  663. {
  664. /* SPI_I2S_FLAG is set */
  665. bitstatus = SET;
  666. }
  667. else
  668. {
  669. /* SPI_I2S_FLAG is reset */
  670. bitstatus = RESET;
  671. }
  672. /* Return the SPI_I2S_FLAG status */
  673. return bitstatus;
  674. }
  675. /**
  676. * @brief Clears the SPIx CRC Error (CRCERR) flag.
  677. * @param SPIx: where x can be 1 or 2 to select the SPI peripheral.
  678. * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
  679. * This function clears only CRCERR flag.
  680. * @note OVR (OverRun error) flag is cleared by software sequence: a read
  681. * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by
  682. * a read operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
  683. * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
  684. * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by
  685. * a write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
  686. * @retval None
  687. */
  688. void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
  689. {
  690. /* Check the parameters */
  691. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  692. assert_param(IS_SPI_CLEAR_FLAG(SPI_I2S_FLAG));
  693. /* Clear the selected SPI CRC Error (CRCERR) flag */
  694. SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
  695. }
  696. /**
  697. * @brief Checks whether the specified SPI/I2S interrupt has occurred or not.
  698. * @param SPIx: where x can be 1 or 2 in SPI mode or 1 in I2S mode to select
  699. * the SPI peripheral.
  700. * @param SPI_I2S_IT: specifies the SPI interrupt source to check.
  701. * This parameter can be one of the following values:
  702. * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
  703. * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
  704. * @arg SPI_IT_MODF: Mode Fault interrupt.
  705. * @arg SPI_I2S_IT_OVR: Overrun interrupt.
  706. * @arg I2S_IT_UDR: Underrun interrupt.
  707. * @arg SPI_I2S_IT_FRE: Format Error interrupt.
  708. * @retval The new state of SPI_I2S_IT (SET or RESET).
  709. */
  710. ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
  711. {
  712. ITStatus bitstatus = RESET;
  713. uint16_t itpos = 0, itmask = 0, enablestatus = 0;
  714. /* Check the parameters */
  715. assert_param(IS_SPI_ALL_PERIPH(SPIx));
  716. assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
  717. /* Get the SPI_I2S_IT index */
  718. itpos = 0x01 << (SPI_I2S_IT & 0x0F);
  719. /* Get the SPI_I2S_IT IT mask */
  720. itmask = SPI_I2S_IT >> 4;
  721. /* Set the IT mask */
  722. itmask = 0x01 << itmask;
  723. /* Get the SPI_I2S_IT enable bit status */
  724. enablestatus = (SPIx->CR2 & itmask) ;
  725. /* Check the status of the specified SPI interrupt */
  726. if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
  727. {
  728. /* SPI_I2S_IT is set */
  729. bitstatus = SET;
  730. }
  731. else
  732. {
  733. /* SPI_I2S_IT is reset */
  734. bitstatus = RESET;
  735. }
  736. /* Return the SPI_I2S_IT status */
  737. return bitstatus;
  738. }
  739. /**
  740. * @}
  741. */
  742. /**
  743. * @}
  744. */
  745. /**
  746. * @}
  747. */
  748. /**
  749. * @}
  750. */
  751. /************************ (C) COPYRIGHT FMD *****END OF FILE****/