lcd.h 7.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2008-03-29 Yi.Qiu
  9. * 2011-06-13 lgnq modified for FM3 easy kit
  10. */
  11. #ifndef __LCD_H__
  12. #define __LCD_H__
  13. #include <rtthread.h>
  14. #include "mb9bf506r.h"
  15. /********* LCD Hardward Interface *************
  16. LCD_CS PORT1.7
  17. LCD_CD PORT1.6
  18. LCD_WR PORT1.5
  19. LCD_RD PORT1.4
  20. LCD_SCK PORT1.3
  21. LCD_MOSI PORT1.2
  22. LCD_C86 PORT1.1
  23. LCD_PS PORT1.0
  24. LCD_DATA[0..7] PORT5.[0..7]
  25. ***********************************************/
  26. #define LCD_CS (1UL << 7)
  27. #define LCD_CS_DDR (FM3_GPIO->DDR1)
  28. #define LCD_CS_PFR (FM3_GPIO->PFR1)
  29. #define LCD_CS_PDOR (FM3_GPIO->PDOR1)
  30. #define LCD_CD (1UL << 6)
  31. #define LCD_CD_DDR (FM3_GPIO->DDR1)
  32. #define LCD_CD_PFR (FM3_GPIO->PFR1)
  33. #define LCD_CD_PDOR (FM3_GPIO->PDOR1)
  34. #define LCD_PS (1UL << 0)
  35. #define LCD_PS_DDR (FM3_GPIO->DDR1)
  36. #define LCD_PS_PFR (FM3_GPIO->PFR1)
  37. #define LCD_PS_PDOR (FM3_GPIO->PDOR1)
  38. #define LCD_CLK (1UL << 6)
  39. #define LCD_CLK_DDR (FM3_GPIO->DDR5)
  40. #define LCD_CLK_PFR (FM3_GPIO->PFR5)
  41. #define LCD_CLK_PDOR (FM3_GPIO->PDOR5)
  42. #define LCD_DATA (1UL << 7)
  43. #define LCD_DATA_DDR (FM3_GPIO->DDR5)
  44. #define LCD_DATA_PFR (FM3_GPIO->PFR5)
  45. #define LCD_DATA_PDOR (FM3_GPIO->PDOR5)
  46. /* LCD driver for ZYMG12864C3 */
  47. #define LCD_WIDTH 128
  48. #define LCD_HEIGHT 64
  49. // Driver the LCD with Parallel or serial interface and the command/data control pin is gpio
  50. #define LCD_CS_HIGH() LCD_CS_PDOR |= LCD_CS
  51. #define LCD_CS_LOW() LCD_CS_PDOR &= ~LCD_CS
  52. #define LCD_CD_HIGH() LCD_CD_PDOR |= LCD_CD
  53. #define LCD_CD_LOW() LCD_CD_PDOR &= ~LCD_CD
  54. #define LCD_PS_HIGH() LCD_PS_PDOR |= LCD_PS
  55. #define LCD_PS_LOW() LCD_PS_PDOR &= ~LCD_PS
  56. #define LCD_CLK_HIGH() LCD_CLK_PDOR |= LCD_CLK
  57. #define LCD_CLK_LOW() LCD_CLK_PDOR &= ~LCD_CLK
  58. #define LCD_DATA_HIGH() LCD_DATA_PDOR |= LCD_DATA
  59. #define LCD_DATA_LOW() LCD_DATA_PDOR &= ~LCD_DATA
  60. // define the arrtibute of ZYMG12864(LCM)
  61. #define GUI_LCM_XMAX 128 // defined the lcd's line-number is 128
  62. #define GUI_LCM_YMAX 64 // defined the lcd's column-number is 64
  63. #define GUI_LCM_PAGE 8 // defined the lcd's page-number is 8(GUI_LCM_YMAX/8)
  64. /* set LCD command */
  65. #define DISPLAY_ON 0xAF // A0,RD,WR:010
  66. #define DISPLAY_OFF 0xAE // A0,RD,WR:010
  67. #define SET_START_LINE_0 0x40 // A0,RD,WR:010; line0~line63
  68. #define SET_PAGE_ADDR_0 0xB0 // A0,RD,WR:010; addr0~addr8
  69. #define SET_COLH_ADDR_0 0x10 // A0,RD,WR:010;
  70. #define SET_COLL_ADDR_0 0x00 // A0,RD,WR:010; addr0~addr131
  71. #define READ_STATUS 0x-0 // A0,RD,WR:001; BUSY | ADC | ON/OFF | RESET | 0 0 0 0
  72. #define STATUS_BUSY 0x80
  73. #define STATUS_ADC_REVERSE 0x40 // column address 131-n : SEG n, else column address n : SEG n
  74. #define STATUS_DISPLAY_OFF 0x20
  75. #define STATUS_RESET 0x80
  76. #define WRITE_DATA 0x-- // A0,RD,WR:110
  77. #define READ_DATE 0x-- // A0,RD,WR:101; spi mode is unavailable
  78. #define SET_ADC_NORMAL 0xA0 // A0,RD,WR:010
  79. #define SET_ADC_REVERSE 0xA1 // A0,RD,WR:010
  80. #define DISPLAY_NORMAL 0xA6 // A0,RD,WR:010
  81. #define DISPLAY_REVERSE 0xA7 // A0,RD,WR:010; reverse color
  82. #define DISPLAY_ALL_ON 0xA5 // A0,RD,WR:010
  83. #define DISPLAY_ALL_NORMAL 0xA4 // A0,RD,WR:010
  84. /*************************************************************
  85. * bias: 1/65duty | 1/49duty | 1/33duty | 1/55duty | 1/53duty *
  86. * ---------------|----------|----------|----------|--------- *
  87. * A2: 1/9 bias | 1/8 bias | 1/6 bias | 1/8 bias | 1/8 bias *
  88. * A3: 1/7 bias | 1/6 bias | 1/5 bias | 1/6 bias | 1/6 bias *
  89. **************************************************************/
  90. #define SET_LCD_BIAS_7 0xA3 // A0,RD,WR:010
  91. #define SET_LCD_BIAS_9 0xA2 // A0,RD,WR:010
  92. #define RMW_MODE_ENABLE 0xE0 // A0,RD,WR:010; the column address locked when read command operating
  93. #define RMW_MODE_END 0xEE // A0,RD,WR:010; returns to the column address when RMW was entered.
  94. #define RESET_LCD 0xE2 // A0,RD,WR:010
  95. /**************************************************************************************
  96. * Com Scan Dir: | 1/65duty | 1/49duty | 1/33duty | 1/55duty | 1/53duty *
  97. * --------------|-------------|-------------|-------------|------------------------ *
  98. * C0: Normal | COM0:COM63 | COM0:COM47 | COM0:COM31 | COM0:COM53 | COM0:COM51 *
  99. * C8: Reverse | COM63:COM0 | COM47:COM0 | COM31:COM0 | COM53:COM0 | COM51:COM0 *
  100. ***************************************************************************************/
  101. #define COM_SCAN_DIR_NORMAL 0xC0 // A0,RD,WR:010
  102. #define COM_SCAN_DIR_REVERSE 0xC8 // A0,RD,WR:010
  103. // 0 0 1 0 1 | Booster On | Regulator On | Follower On
  104. #define POWER_BOOSTER_ON 0x2C // A0,RD,WR:010
  105. #define POWER_REGULATOR_ON 0x2E // A0,RD,WR:010
  106. #define POWER_FOLLOWER_ON 0x2F // A0,RD,WR:010
  107. #define SET_RESISTOR_RATIO 0x20 // A0,RD,WR:010; 20~27:small~large
  108. #define SET_ELECVOL_MODE 0x81 // A0,RD,WR:010; double byte command
  109. #define SET_ELECVOL_REG 0x20 // A0,RD,WR:010; the electronic volume(64 voltage levels:00~3F) function is not used.
  110. #define SLEEP_MODE_ENABLE 0xAC // A0,RD,WR:010; double byte command, preceding command
  111. #define SLEEP_MODE_DISABLE 0xAD // A0,RD,WR:010; preceding command
  112. #define SLEEP_MODE_DELIVER 0x00 // A0,RD,WR:010; following command
  113. #define BOOST_RATIO_SET 0xF8 // A0,RD,WR:010; double byte command, preceding command
  114. #define BOOST_RATIO_234 0x00 // A0,RD,WR:010; following command
  115. #define BOOST_RATIO_5 0x01 // A0,RD,WR:010; following command
  116. #define BOOST_RATIO_6 0x03 // A0,RD,WR:010; following command
  117. #define COMMAND_NOP 0xE3 // A0,RD,WR:010
  118. #define COMMAND_IC_TEST 0xFC // A0,RD,WR:010; don't use
  119. #define RT_DEVICE_CTRL_LCD_GET_WIDTH 0
  120. #define RT_DEVICE_CTRL_LCD_GET_HEIGHT 1
  121. #define RT_DEVICE_CTRL_LCD_GET_BPP 2
  122. #define RT_DEVICE_CTRL_LCD_GET_FRAMEBUFFER 3
  123. #define RT_DEVICE_CTRL_LCD_POWER_ON 4
  124. #define RT_DEVICE_CTRL_LCD_POWER_OFF 5
  125. #define RT_DEVICE_CTRL_LCD_CLEAR_SCR 6
  126. #define RT_DEVICE_CTRL_LCD_FILL_ALL 7
  127. #define RT_DEVICE_CTRL_LCD_UPDATE_POINT 8
  128. #define RT_DEVICE_CTRL_LCD_DISPLAY_ON 9
  129. #define RT_DEVICE_CTRL_LCD_DISPLAY_OFF 10
  130. #define RT_DEVICE_CTRL_LCD_PUT_STRING 11
  131. enum
  132. {
  133. ADC_MSG,
  134. KEY_MSG,
  135. CPU_MSG,
  136. MAX_MSG,
  137. };
  138. struct lcd_msg
  139. {
  140. rt_uint8_t type;
  141. rt_uint16_t adc_value;
  142. rt_uint8_t key;
  143. rt_uint16_t major;
  144. rt_uint16_t minor;
  145. };
  146. extern rt_uint32_t x;
  147. extern rt_uint32_t y;
  148. void rt_hw_lcd_init(void);
  149. #endif