gd32f3x0_fmc.c 25 KB

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  1. /*!
  2. \file gd32f3x0_fmc.c
  3. \brief FMC driver
  4. \version 2017-06-06, V1.0.0, firmware for GD32F3x0
  5. \version 2019-06-01, V2.0.0, firmware for GD32F3x0
  6. */
  7. /*
  8. Copyright (c) 2019, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "gd32f3x0_fmc.h"
  31. /* FMC main memory programming functions */
  32. /*!
  33. \brief unlock the main FMC operation
  34. it is better to used in pairs with fmc_lock
  35. \param[in] none
  36. \param[out] none
  37. \retval none
  38. */
  39. void fmc_unlock(void)
  40. {
  41. if((RESET != (FMC_CTL & FMC_CTL_LK))){
  42. /* write the FMC key */
  43. FMC_KEY = UNLOCK_KEY0;
  44. FMC_KEY = UNLOCK_KEY1;
  45. }
  46. }
  47. /*!
  48. \brief lock the main FMC operation
  49. it is better to used in pairs with fmc_unlock after an operation
  50. \param[in] none
  51. \param[out] none
  52. \retval none
  53. */
  54. void fmc_lock(void)
  55. {
  56. /* set the LK bit*/
  57. FMC_CTL |= FMC_CTL_LK;
  58. }
  59. /*!
  60. \brief set the wait state counter value
  61. \param[in] wscnt: wait state counter value
  62. only one parameter can be selected which is shown as below:
  63. \arg WS_WSCNT_0: 0 wait state added
  64. \arg WS_WSCNT_1: 1 wait state added
  65. \arg WS_WSCNT_2: 2 wait state added
  66. \param[out] none
  67. \retval none
  68. */
  69. void fmc_wscnt_set(uint8_t wscnt)
  70. {
  71. uint32_t reg;
  72. reg = FMC_WS;
  73. /* set the wait state counter value */
  74. reg &= ~FMC_WS_WSCNT;
  75. FMC_WS = (reg | wscnt);
  76. }
  77. /*!
  78. \brief fmc wait state enable
  79. \param[in] none
  80. \param[out] none
  81. \retval none
  82. */
  83. void fmc_wait_state_enable(void)
  84. {
  85. /* unlock the main flash */
  86. fmc_unlock();
  87. /* set the WSEN bit in register FMC_WSEN */
  88. FMC_WSEN |= FMC_WSEN_WSEN;
  89. /* lock the main flash after operation */
  90. fmc_lock();
  91. }
  92. /*!
  93. \brief fmc wait state disable
  94. \param[in] none
  95. \param[out] none
  96. \retval none
  97. */
  98. void fmc_wait_state_disable(void)
  99. {
  100. /* unlock the main flash */
  101. fmc_unlock();
  102. /* reset the WSEN bit in register FMC_WSEN */
  103. FMC_WSEN &= ~FMC_WSEN_WSEN;
  104. /* lock the main flash after operation */
  105. fmc_lock();
  106. }
  107. /*!
  108. \brief erase page
  109. \param[in] page_address: target page start address
  110. \param[out] none
  111. \retval fmc_state
  112. */
  113. fmc_state_enum fmc_page_erase(uint32_t page_address)
  114. {
  115. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  116. if(FMC_READY == fmc_state){
  117. /* start page erase */
  118. FMC_CTL |= FMC_CTL_PER;
  119. FMC_ADDR = page_address;
  120. FMC_CTL |= FMC_CTL_START;
  121. /* wait for the FMC ready */
  122. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  123. /* reset the PER bit */
  124. FMC_CTL &= ~FMC_CTL_PER;
  125. }
  126. /* return the FMC state */
  127. return fmc_state;
  128. }
  129. /*!
  130. \brief erase whole chip
  131. \param[in] none
  132. \param[out] none
  133. \retval fmc_state
  134. */
  135. fmc_state_enum fmc_mass_erase(void)
  136. {
  137. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  138. if(FMC_READY == fmc_state){
  139. /* start chip erase */
  140. FMC_CTL |= FMC_CTL_MER;
  141. FMC_CTL |= FMC_CTL_START;
  142. /* wait for the FMC ready */
  143. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  144. /* reset the MER bit */
  145. FMC_CTL &= ~FMC_CTL_MER;
  146. }
  147. /* return the fmc state */
  148. return fmc_state;
  149. }
  150. /*!
  151. \brief program a word at the corresponding address
  152. \param[in] address: address to program
  153. \param[in] data: word to program
  154. \param[out] none
  155. \retval fmc_state
  156. */
  157. fmc_state_enum fmc_word_program(uint32_t address, uint32_t data)
  158. {
  159. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  160. if(FMC_READY == fmc_state){
  161. /* set the PG bit to start program */
  162. FMC_CTL |= FMC_CTL_PG;
  163. REG32(address) = data;
  164. /* wait for the FMC ready */
  165. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  166. /* reset the PG bit */
  167. FMC_CTL &= ~FMC_CTL_PG;
  168. }
  169. /* return the FMC state */
  170. return fmc_state;
  171. }
  172. /*!
  173. \brief program a half word at the corresponding address
  174. \param[in] address: address to program
  175. \param[in] data: word to program
  176. \param[out] none
  177. \retval fmc_state
  178. */
  179. fmc_state_enum fmc_halfword_program(uint32_t address, uint16_t data)
  180. {
  181. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  182. if(FMC_READY == fmc_state){
  183. /* set the PG bit to start program */
  184. FMC_CTL |= FMC_CTL_PG;
  185. REG16(address) = data;
  186. /* wait for the FMC ready */
  187. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  188. /* reset the PG bit */
  189. FMC_CTL &= ~FMC_CTL_PG;
  190. }
  191. /* return the FMC state */
  192. return fmc_state;
  193. }
  194. /*!
  195. \brief program a word at the corresponding address without erasing
  196. \param[in] address: address to program
  197. \param[in] data: word to program
  198. \param[out] none
  199. \retval fmc_state
  200. */
  201. fmc_state_enum fmc_word_reprogram(uint32_t address, uint32_t data)
  202. {
  203. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  204. FMC_WSEN |= FMC_WSEN_BPEN;
  205. if(FMC_READY == fmc_state){
  206. /* set the PG bit to start program */
  207. FMC_CTL |= FMC_CTL_PG;
  208. REG32(address) = data;
  209. /* wait for the FMC ready */
  210. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  211. /* reset the PG bit */
  212. FMC_CTL &= ~FMC_CTL_PG;
  213. }
  214. /* return the FMC state */
  215. return fmc_state;
  216. }
  217. /* FMC option bytes programming functions */
  218. /*!
  219. \brief unlock the option byte operation
  220. it is better to used in pairs with ob_lock
  221. \param[in] none
  222. \param[out] none
  223. \retval none
  224. */
  225. void ob_unlock(void)
  226. {
  227. if(RESET == (FMC_CTL & FMC_CTL_OBWEN)){
  228. /* write the FMC key */
  229. FMC_OBKEY = UNLOCK_KEY0;
  230. FMC_OBKEY = UNLOCK_KEY1;
  231. }
  232. }
  233. /*!
  234. \brief lock the option byte operation
  235. it is better to used in pairs with ob_unlock after an operation
  236. \param[in] none
  237. \param[out] none
  238. \retval none
  239. */
  240. void ob_lock(void)
  241. {
  242. /* reset the OBWE bit */
  243. FMC_CTL &= ~FMC_CTL_OBWEN;
  244. }
  245. /*!
  246. \brief reload the option byte and generate a system reset
  247. \param[in] none
  248. \param[out] none
  249. \retval none
  250. */
  251. void ob_reset(void)
  252. {
  253. /* set the OBRLD bit */
  254. FMC_CTL |= FMC_CTL_OBRLD;
  255. }
  256. /*!
  257. \brief erase the option byte
  258. programmer must ensure FMC & option byte are both unlocked before calling this function
  259. \param[in] none
  260. \param[out] none
  261. \retval fmc_state
  262. */
  263. fmc_state_enum ob_erase(void)
  264. {
  265. uint16_t fmc_spc;
  266. uint32_t fmc_plevel = ob_obstat_plevel_get();
  267. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  268. /* get the original option byte security protection code */
  269. if(OB_OBSTAT_PLEVEL_NO == fmc_plevel){
  270. fmc_spc = FMC_NSPC;
  271. }else if(OB_OBSTAT_PLEVEL_LOW == fmc_plevel){
  272. fmc_spc = FMC_LSPC;
  273. }else{
  274. fmc_spc = FMC_HSPC;
  275. fmc_state = FMC_OB_HSPC;
  276. }
  277. if(FMC_READY == fmc_state){
  278. /* start erase the option byte */
  279. FMC_CTL |= FMC_CTL_OBER;
  280. FMC_CTL |= FMC_CTL_START;
  281. /* wait for the FMC ready */
  282. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  283. if(FMC_READY == fmc_state){
  284. /* reset the OBER bit */
  285. FMC_CTL &= ~FMC_CTL_OBER;
  286. /* set the OBPG bit */
  287. FMC_CTL |= FMC_CTL_OBPG;
  288. /* restore the last get option byte security protection code */
  289. OB_SPC = fmc_spc;
  290. OB_USER = OB_USER_DEFAULT;
  291. /* wait for the FMC ready */
  292. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  293. if(FMC_TOERR != fmc_state){
  294. /* reset the OBPG bit */
  295. FMC_CTL &= ~FMC_CTL_OBPG;
  296. }
  297. }else{
  298. if(FMC_TOERR != fmc_state){
  299. /* reset the OBPG bit */
  300. FMC_CTL &= ~FMC_CTL_OBPG;
  301. }
  302. }
  303. }
  304. /* return the FMC state */
  305. return fmc_state;
  306. }
  307. /*!
  308. \brief enable option byte write protection(OB_WP) depending on current option byte
  309. \param[in] ob_wp: write protection configuration data
  310. setting the bit of ob_wp means enabling the corresponding sector write protection
  311. \param[out] none
  312. \retval fmc_state
  313. */
  314. fmc_state_enum ob_write_protection_enable(uint16_t ob_wp)
  315. {
  316. uint8_t ob_wrp0, ob_wrp1;
  317. ob_parm_struct ob_parm;
  318. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  319. ob_parm_get(&ob_parm);
  320. ob_wp = (uint16_t)(~ob_wp);
  321. ob_wrp0 = (uint8_t)(ob_wp & OB_LWP);
  322. ob_wrp1 = (uint8_t)((ob_wp & OB_HWP) >> 8U);
  323. if(0xFFU == (uint8_t)OB_WP0){
  324. if (0xFFU == (uint8_t)OB_WP1){
  325. if(FMC_READY == fmc_state){
  326. /* set the OBPG bit*/
  327. FMC_CTL |= FMC_CTL_OBPG;
  328. if(0xFFU != ob_wrp0){
  329. OB_WP0 = ob_wrp0 ;
  330. /* wait for the FMC ready */
  331. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  332. }
  333. if((FMC_READY == fmc_state) && (0xFFU != ob_wrp1)){
  334. OB_WP1 = ob_wrp1 ;
  335. /* wait for the FMC ready */
  336. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  337. }
  338. if(FMC_TOERR != fmc_state){
  339. /* reset the OBPG bit */
  340. FMC_CTL &= ~FMC_CTL_OBPG;
  341. }
  342. }
  343. }
  344. }else{
  345. if(FMC_READY == fmc_state){
  346. /* start erase the option byte */
  347. FMC_CTL |= FMC_CTL_OBER;
  348. FMC_CTL |= FMC_CTL_START;
  349. /* wait for the FMC ready */
  350. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  351. if(FMC_READY == fmc_state){
  352. /* reset the OBER bit */
  353. FMC_CTL &= ~FMC_CTL_OBER;
  354. /* enable the option bytes programming */
  355. FMC_CTL |= FMC_CTL_OBPG;
  356. ob_value_modify(OB_WP_ADDR0, ob_wp ,&ob_parm);
  357. /* wait for the FMC ready */
  358. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  359. if(FMC_TOERR != fmc_state){
  360. /* reset the OBPG bit */
  361. FMC_CTL &= ~FMC_CTL_OBPG;
  362. }
  363. }else{
  364. if(FMC_TOERR != fmc_state){
  365. /* reset the OBER bit */
  366. FMC_CTL &= ~FMC_CTL_OBER;
  367. }
  368. }
  369. }
  370. }
  371. /* return the FMC state */
  372. return fmc_state;
  373. }
  374. /*!
  375. \brief configure security protection
  376. \param[in] ob_spc: specify security protection code
  377. only one parameter can be selected which is shown as below:
  378. \arg FMC_NSPC: no security protection
  379. \arg FMC_LSPC: low security protection
  380. \arg FMC_HSPC: high security protection
  381. \param[out] none
  382. \retval fmc_state
  383. */
  384. fmc_state_enum ob_security_protection_config(uint8_t ob_spc)
  385. {
  386. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  387. ob_parm_struct ob_parm;
  388. ob_parm_get(&ob_parm);
  389. /* the OB_SPC byte cannot be reprogrammed if protection level is high */
  390. if(OB_OBSTAT_PLEVEL_HIGH == ob_obstat_plevel_get()){
  391. fmc_state = FMC_OB_HSPC;
  392. }
  393. if(FMC_READY == fmc_state){
  394. /* start erase the option byte */
  395. FMC_CTL |= FMC_CTL_OBER;
  396. FMC_CTL |= FMC_CTL_START;
  397. /* wait for the FMC ready */
  398. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  399. if(FMC_READY == fmc_state){
  400. /* reset the OBER bit */
  401. FMC_CTL &= ~FMC_CTL_OBER;
  402. /* enable the option bytes programming */
  403. FMC_CTL |= FMC_CTL_OBPG;
  404. ob_value_modify(OB_SPC_ADDR, (uint16_t)ob_spc ,&ob_parm);
  405. /* wait for the FMC ready */
  406. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  407. if(FMC_TOERR != fmc_state){
  408. /* reset the OBPG bit */
  409. FMC_CTL &= ~FMC_CTL_OBPG;
  410. }
  411. }else{
  412. if(FMC_TOERR != fmc_state){
  413. /* reset the OBER bit */
  414. FMC_CTL &= ~FMC_CTL_OBER;
  415. }
  416. }
  417. }
  418. /* return the FMC state */
  419. return fmc_state;
  420. }
  421. /*!
  422. \brief program the FMC user option byte depending on current option byte
  423. \param[in] ob_user: user option byte
  424. one or more parameters (bitwise AND) can be selected which are shown as below:
  425. \arg OB_FWDGT_HW: hardware free watchdog timer
  426. \arg OB_DEEPSLEEP_RST: generate a reset instead of entering deepsleep mode
  427. \arg OB_STDBY_RST: generate a reset instead of entering standby mode
  428. \arg OB_BOOT1_SET_1: BOOT1 bit is 1
  429. \arg OB_VDDA_DISABLE: disable VDDA monitor
  430. \arg OB_SRAM_PARITY_ENABLE: enable sram parity check
  431. \param[out] none
  432. \retval fmc_state
  433. */
  434. fmc_state_enum ob_user_write(uint8_t ob_user)
  435. {
  436. /* check whether FMC is ready or not */
  437. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  438. ob_parm_struct ob_parm;
  439. ob_parm_get(&ob_parm);
  440. if(FMC_READY == fmc_state){
  441. /* start erase the option byte */
  442. FMC_CTL |= FMC_CTL_OBER;
  443. FMC_CTL |= FMC_CTL_START;
  444. /* wait for the FMC ready */
  445. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  446. if(FMC_READY == fmc_state){
  447. /* reset the OBER bit */
  448. FMC_CTL &= ~FMC_CTL_OBER;
  449. /* set the OBPG bit */
  450. FMC_CTL |= FMC_CTL_OBPG;
  451. /* restore the last get option byte security protection code */
  452. ob_value_modify(OB_USER_ADDR, (uint16_t)ob_user, &ob_parm);
  453. /* wait for the FMC ready */
  454. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  455. if(FMC_TOERR != fmc_state){
  456. /* reset the OBPG bit */
  457. FMC_CTL &= ~FMC_CTL_OBPG;
  458. }
  459. }else{
  460. if(FMC_TOERR != fmc_state){
  461. /* reset the OBPG bit */
  462. FMC_CTL &= ~FMC_CTL_OBPG;
  463. }
  464. }
  465. }
  466. /* return the FMC state */
  467. return fmc_state;
  468. }
  469. /*!
  470. \brief program the FMC data option byte
  471. \param[in] address: OB_DATA_ADDR0 or OB_DATA_ADDR1
  472. only one parameter can be selected which is shown as below:
  473. \arg OB_DATA_ADDR0: option byte data address 0
  474. \arg OB_DATA_ADDR1: option byte data address 1
  475. \param[in] data: the byte to be programmed
  476. \param[out] none
  477. \retval fmc_state
  478. */
  479. fmc_state_enum ob_data_program(uint32_t address, uint8_t data)
  480. {
  481. fmc_state_enum fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  482. ob_parm_struct ob_parm;
  483. ob_parm_get(&ob_parm);
  484. if(0xFFU == REG8(address))
  485. {
  486. if(FMC_READY == fmc_state){
  487. /* set the OBPG bit */
  488. FMC_CTL |= FMC_CTL_OBPG;
  489. REG16(address) = data ;
  490. /* wait for the FMC ready */
  491. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  492. if(FMC_TOERR != fmc_state){
  493. /* reset the OBPG bit */
  494. FMC_CTL &= ~FMC_CTL_OBPG;
  495. }
  496. }
  497. }else{
  498. if(FMC_READY == fmc_state){
  499. /* start erase the option byte */
  500. FMC_CTL |= FMC_CTL_OBER;
  501. FMC_CTL |= FMC_CTL_START;
  502. /* wait for the FMC ready */
  503. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  504. if(FMC_READY == fmc_state){
  505. /* reset the OBER bit */
  506. FMC_CTL &= ~FMC_CTL_OBER;
  507. /* enable the option bytes programming */
  508. FMC_CTL |= FMC_CTL_OBPG;
  509. ob_value_modify(address, (uint16_t)data ,&ob_parm);
  510. /* wait for the FMC ready */
  511. fmc_state = fmc_ready_wait(FMC_TIMEOUT_COUNT);
  512. if(FMC_TOERR != fmc_state){
  513. /* reset the OBPG bit */
  514. FMC_CTL &= ~FMC_CTL_OBPG;
  515. }
  516. }else{
  517. if(FMC_TOERR != fmc_state){
  518. /* reset the OBER bit */
  519. FMC_CTL &= ~FMC_CTL_OBER;
  520. }
  521. }
  522. }
  523. }
  524. /* return the FMC state */
  525. return fmc_state;
  526. }
  527. /*!
  528. \brief get OB_USER in register FMC_OBSTAT
  529. \param[in] none
  530. \param[out] none
  531. \retval ob_user
  532. */
  533. uint8_t ob_user_get(void)
  534. {
  535. return (uint8_t)(FMC_OBSTAT >> 8U);
  536. }
  537. /*!
  538. \brief get OB_DATA in register FMC_OBSTAT
  539. \param[in] none
  540. \param[out] none
  541. \retval ob_data
  542. */
  543. uint16_t ob_data_get(void)
  544. {
  545. return (uint16_t)(FMC_OBSTAT >> 16U);
  546. }
  547. /*!
  548. \brief get the FMC option byte write protection (OB_WP) in register FMC_WP
  549. \param[in] none
  550. \param[out] none
  551. \retval OB_WP
  552. */
  553. uint16_t ob_write_protection_get(void)
  554. {
  555. return (uint16_t)(FMC_WP);
  556. }
  557. /*!
  558. \brief get the value of FMC option byte security protection level (PLEVEL) in FMC_OBSTAT register
  559. \param[in] none
  560. \param[out] none
  561. \retval the value of PLEVEL
  562. */
  563. uint32_t ob_obstat_plevel_get(void)
  564. {
  565. return (FMC_OBSTAT & (FMC_OBSTAT_PLEVEL_BIT0 | FMC_OBSTAT_PLEVEL_BIT1));
  566. }
  567. /* FMC interrupts and flags management functions */
  568. /*!
  569. \brief enable FMC interrupt
  570. \param[in] interrupt: the FMC interrupt source
  571. one or more parameters can be selected which are shown as below:
  572. \arg FMC_INTEN_END: FMC end of operation interrupt
  573. \arg FMC_INTEN_ERR: FMC error interrupt
  574. \param[out] none
  575. \retval none
  576. */
  577. void fmc_interrupt_enable(uint32_t interrupt)
  578. {
  579. FMC_CTL |= interrupt;
  580. }
  581. /*!
  582. \brief disable FMC interrupt
  583. \param[in] interrupt: the FMC interrupt source
  584. one or more parameters can be selected which are shown as below:
  585. \arg FMC_INTEN_END: FMC end of operation interrupt
  586. \arg FMC_INTEN_ERR: FMC error interrupt
  587. \param[out] none
  588. \retval none
  589. */
  590. void fmc_interrupt_disable(uint32_t interrupt)
  591. {
  592. FMC_CTL &= ~(uint32_t)interrupt;
  593. }
  594. /*!
  595. \brief get flag set or reset
  596. \param[in] flag: check FMC flag
  597. only one parameter can be selected which is shown as below:
  598. \arg FMC_FLAG_BUSY: FMC busy flag
  599. \arg FMC_FLAG_PGERR: FMC programming error flag
  600. \arg FMC_FLAG_WPERR: FMC write protection error flag
  601. \arg FMC_FLAG_END: FMC end of programming flag
  602. \param[out] none
  603. \retval FlagStatus: SET or RESET
  604. */
  605. FlagStatus fmc_flag_get(uint32_t flag)
  606. {
  607. FlagStatus status = RESET;
  608. if(FMC_STAT & flag){
  609. status = SET;
  610. }
  611. /* return the state of corresponding FMC flag */
  612. return status;
  613. }
  614. /*!
  615. \brief clear the FMC pending flag by writing 1
  616. \param[in] flag: clear FMC flag
  617. only one parameter can be selected which is shown as below:
  618. \arg FMC_FLAG_PGERR: FMC programming error flag
  619. \arg FMC_FLAG_WPERR: FMC write protection error flag
  620. \arg FMC_FLAG_END: fmc end of programming flag
  621. \param[out] none
  622. \retval none
  623. */
  624. void fmc_flag_clear(uint32_t flag)
  625. {
  626. /* clear the flags */
  627. FMC_STAT = flag;
  628. }
  629. /*!
  630. \brief get flag set or reset
  631. \param[in] flag: check FMC flag
  632. only one parameter can be selected which is shown as below:
  633. \arg FMC_FLAG_PGERR: FMC programming error flag
  634. \arg FMC_FLAG_WPERR: FMC write protection error flag
  635. \arg FMC_FLAG_END: FMC end of programming flag
  636. \param[out] none
  637. \retval FlagStatus: SET or RESET
  638. */
  639. FlagStatus fmc_interrupt_flag_get(uint32_t flag)
  640. {
  641. FlagStatus status = RESET;
  642. if(FMC_STAT & flag){
  643. status = SET;
  644. }
  645. /* return the state of corresponding FMC flag */
  646. return status;
  647. }
  648. /*!
  649. \brief clear the FMC pending flag by writing 1
  650. \param[in] flag: clear FMC flag
  651. only one parameter can be selected which is shown as below:
  652. \arg FMC_FLAG_PGERR: FMC programming error flag
  653. \arg FMC_FLAG_WPERR: FMC write protection error flag
  654. \arg FMC_FLAG_END: fmc end of programming flag
  655. \param[out] none
  656. \retval none
  657. */
  658. void fmc_interrupt_flag_clear(uint32_t flag)
  659. {
  660. /* clear the flags */
  661. FMC_STAT = flag;
  662. }
  663. /*!
  664. \brief get the FMC state
  665. \param[in] none
  666. \param[out] none
  667. \retval fmc_state
  668. */
  669. fmc_state_enum fmc_state_get(void)
  670. {
  671. fmc_state_enum fmc_state = FMC_READY;
  672. if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_BUSY)){
  673. fmc_state = FMC_BUSY;
  674. }else{
  675. if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_WPERR)){
  676. fmc_state = FMC_WPERR;
  677. }else{
  678. if((uint32_t)0x00U != (FMC_STAT & FMC_STAT_PGERR)){
  679. fmc_state = FMC_PGERR;
  680. }
  681. }
  682. }
  683. /* return the FMC state */
  684. return fmc_state;
  685. }
  686. /*!
  687. \brief check whether FMC is ready or not
  688. \param[in] timeout: timeout count
  689. \param[out] none
  690. \retval fmc_state
  691. */
  692. fmc_state_enum fmc_ready_wait(uint32_t timeout)
  693. {
  694. fmc_state_enum fmc_state = FMC_BUSY;
  695. /* wait for FMC ready */
  696. do{
  697. /* get FMC state */
  698. fmc_state = fmc_state_get();
  699. timeout--;
  700. }while((FMC_BUSY == fmc_state) && (0U != timeout));
  701. if(FMC_BUSY == fmc_state){
  702. fmc_state = FMC_TOERR;
  703. }
  704. /* return the FMC state */
  705. return fmc_state;
  706. }
  707. /*!
  708. \brief get current option byte value
  709. \param[in] ob_parm: pointer to option byte parameter struct
  710. \param[out] ob_parm: pointer to option byte parameter struct
  711. \retval none
  712. */
  713. void ob_parm_get(ob_parm_struct *ob_parm)
  714. {
  715. /* get current option byte value */
  716. ob_parm->spc = (uint8_t)OB_SPC;
  717. ob_parm->user = (uint8_t)OB_USER;
  718. ob_parm->data0 = (uint8_t)OB_DATA0;
  719. ob_parm->data1 = (uint8_t)OB_DATA1;
  720. ob_parm->wp0 = (uint8_t)OB_WP0;
  721. ob_parm->wp1 = (uint8_t)OB_WP1;
  722. }
  723. /*!
  724. \brief modify the target option byte depending on the original value
  725. \param[in] address: target option byte address
  726. \param[in] value: target option byte value
  727. \param[in] ob_parm: pointer to option byte parameter struct
  728. \param[out] none
  729. \retval none
  730. */
  731. void ob_value_modify(uint32_t address, uint16_t value,ob_parm_struct *ob_parm)
  732. {
  733. uint8_t spc, user, data0, data1, wp0, wp1;
  734. /* store the original option bytes */
  735. spc = ob_parm->spc;
  736. user = ob_parm->user;
  737. data0 = ob_parm->data0;
  738. data1 = ob_parm->data1;
  739. wp0 = ob_parm->wp0;
  740. wp1 = ob_parm->wp1;
  741. /* bring in the target option byte */
  742. if(OB_SPC_ADDR == address){
  743. spc = (uint8_t)value;
  744. }else if(OB_DATA_ADDR0 == address){
  745. data0 = (uint8_t)value;
  746. }else if(OB_DATA_ADDR1 == address){
  747. data1 = (uint8_t)value;
  748. }else if(OB_USER_ADDR == address){
  749. user = user & (uint8_t)value;
  750. }else{
  751. wp0 = wp0 & ((uint8_t) (value));
  752. wp1 = wp1 & ((uint8_t) (value >> 8U));
  753. }
  754. /* basing on original value, modify the target option byte */
  755. OB_SPC = spc;
  756. OB_USER = user;
  757. if(0xFFU != data0){
  758. OB_DATA0 = data0;
  759. }
  760. if(0xFFU != data1){
  761. OB_DATA1 = data1;
  762. }
  763. if(0xFFU != wp0){
  764. OB_WP0 = wp0;
  765. }
  766. if(0xFFU != wp1){
  767. OB_WP1 = wp1;
  768. }
  769. }