usbh_int.c 20 KB

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  1. /*!
  2. \file usbh_int.c
  3. \brief USB host mode interrupt handler file
  4. \version 2017-06-06, V1.0.0, firmware for GD32F3x0
  5. \version 2019-06-01, V2.0.0, firmware for GD32F3x0
  6. */
  7. /*
  8. Copyright (c) 2019, GigaDevice Semiconductor Inc.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "usb_core.h"
  31. #include "usb_defines.h"
  32. #include "usbh_int.h"
  33. static uint32_t usbh_intf_sof (usb_core_handle_struct *pudev);
  34. static uint32_t usbh_intf_port (usb_core_handle_struct *pudev);
  35. static uint32_t usbh_intf_hc (usb_core_handle_struct *pudev);
  36. static uint32_t usbh_intf_hc_in (usb_core_handle_struct *pudev, uint8_t channel_num);
  37. static uint32_t usbh_intf_hc_out (usb_core_handle_struct *pudev, uint8_t channel_num);
  38. static uint32_t usbh_intf_rxfifo_noempty (usb_core_handle_struct *pudev);
  39. static uint32_t usbh_intf_nptxfifo_empty (usb_core_handle_struct *pudev);
  40. static uint32_t usbh_intf_ptxfifo_empty (usb_core_handle_struct *pudev);
  41. static uint32_t usbh_intf_disconnect (usb_core_handle_struct *pudev);
  42. static uint32_t usbh_intf_iso_incomplete_xfer (usb_core_handle_struct *pudev);
  43. /*!
  44. \brief handle global host interrupt
  45. \param[in] pudev: pointer to usb device instance
  46. \param[out] none
  47. \retval operation status
  48. */
  49. uint32_t usbh_isr (usb_core_handle_struct *pudev)
  50. {
  51. uint32_t retval = 0U;
  52. uint32_t int_flag = 0U;
  53. /* check if host mode */
  54. if (USB_CURRENT_MODE_GET() == HOST_MODE) {
  55. USB_CORE_INTR_READ(int_flag);
  56. if (!int_flag) {
  57. return 0U;
  58. }
  59. /* start of frame interrupt handle */
  60. if (int_flag & GINTF_SOF) {
  61. retval |= usbh_intf_sof (pudev);
  62. }
  63. /* Rx FIFO non-empty interrupt handle */
  64. if (int_flag & GINTF_RXFNEIF) {
  65. retval |= usbh_intf_rxfifo_noempty (pudev);
  66. }
  67. /* Non-Periodic Tx FIFO empty interrupt hanlde */
  68. if (int_flag & GINTF_NPTXFEIF) {
  69. retval |= usbh_intf_nptxfifo_empty (pudev);
  70. }
  71. /* periodic Tx FIFO empty interrupt handle */
  72. if (int_flag & GINTF_PTXFEIF) {
  73. retval |= usbh_intf_ptxfifo_empty (pudev);
  74. }
  75. /* host channels interrupt handle */
  76. if (int_flag & GINTF_HCIF) {
  77. retval |= usbh_intf_hc (pudev);
  78. }
  79. /* host port interrupt handle */
  80. if (int_flag & GINTF_HPIF) {
  81. retval |= usbh_intf_port (pudev);
  82. }
  83. /* disconnect interrupt handle */
  84. if (int_flag & GINTF_DISCIF) {
  85. retval |= usbh_intf_disconnect (pudev);
  86. }
  87. /* isochronous IN transfer not complete interrupt handle */
  88. if (int_flag & GINTF_ISOONCIF) {
  89. retval |= usbh_intf_iso_incomplete_xfer (pudev);
  90. }
  91. }
  92. return retval;
  93. }
  94. /*!
  95. \brief handle the start-of-frame interrupt in host mode
  96. \param[in] pudev: pointer to usb device instance
  97. \param[out] none
  98. \retval operation status
  99. */
  100. static uint32_t usbh_intf_sof (usb_core_handle_struct *pudev)
  101. {
  102. usbh_hcd_int_fops->sof(pudev);
  103. /* clear interrupt */
  104. USB_GINTF = GINTF_SOF;
  105. return 1U;
  106. }
  107. /*!
  108. \brief handle all host channels interrupt in host mode
  109. \param[in] pudev: pointer to usb device instance
  110. \param[out] none
  111. \retval operation status
  112. */
  113. static uint32_t usbh_intf_hc (usb_core_handle_struct *pudev)
  114. {
  115. uint8_t i = 0U;
  116. uint32_t retval = 0U;
  117. for (i = 0U; i < pudev->cfg.host_channel_num; i++) {
  118. if ((USB_HACHINT & HACHINT_HACHINT) & ((uint32_t)1U << i)) {
  119. if ((USB_HCHxCTL((uint16_t)i) & HCHCTL_EPDIR) >> 15U) {
  120. retval |= usbh_intf_hc_in (pudev, i);
  121. } else {
  122. retval |= usbh_intf_hc_out (pudev, i);
  123. }
  124. }
  125. }
  126. return retval;
  127. }
  128. /*!
  129. \brief handle the disconnect interrupt
  130. \param[in] pudev: pointer to usb device instance
  131. \param[out] none
  132. \retval operation status
  133. */
  134. static uint32_t usbh_intf_disconnect (usb_core_handle_struct *pudev)
  135. {
  136. usbh_hcd_int_fops->device_disconnected(pudev);
  137. /* clear interrupt */
  138. USB_GINTF = GINTF_DISCIF;
  139. return 1U;
  140. }
  141. /*!
  142. \brief handle the non-periodic tx fifo empty interrupt
  143. \param[in] pudev: pointer to usb device instance
  144. \param[out] none
  145. \retval operation status
  146. */
  147. static uint32_t usbh_intf_nptxfifo_empty (usb_core_handle_struct *pudev)
  148. {
  149. uint8_t channel_num = 0U;
  150. uint32_t dword_len = 0U, len = 0U;
  151. usb_hostchannel_struct *puhc;
  152. channel_num = (uint8_t)((USB_HNPTFQSTAT & HNPTFQSTAT_CNUM) >> 27U);
  153. puhc = &pudev->host.host_channel[channel_num];
  154. dword_len = (puhc->xfer_len + 3U) / 4U;
  155. while (((USB_HNPTFQSTAT & HNPTFQSTAT_NPTXFS) > dword_len) && (0U != puhc->xfer_len)) {
  156. len = (USB_HNPTFQSTAT & HNPTFQSTAT_NPTXFS) * 4U;
  157. if (len > puhc->xfer_len) {
  158. /* last packet */
  159. len = (uint16_t)puhc->xfer_len;
  160. USB_GINTEN &= ~GINTF_NPTXFEIF;
  161. }
  162. dword_len = (puhc->xfer_len + 3U) / 4U;
  163. usb_fifo_write (puhc->xfer_buff, channel_num, (uint16_t)len);
  164. puhc->xfer_buff += len;
  165. puhc->xfer_len -= len;
  166. puhc->xfer_count += len;
  167. }
  168. return 1U;
  169. }
  170. /*!
  171. \brief handle the periodic tx fifo empty interrupt
  172. \param[in] pudev: pointer to usb device instance
  173. \param[out] none
  174. \retval operation status
  175. */
  176. static uint32_t usbh_intf_ptxfifo_empty (usb_core_handle_struct *pudev)
  177. {
  178. uint8_t channel_num = 0U;
  179. uint32_t dword_len = 0U, len = 0U;
  180. usb_hostchannel_struct *puhc;
  181. channel_num = (uint8_t)((USB_HPTFQSTAT & HPTFQSTAT_CNUM) >> 27U);
  182. puhc = &pudev->host.host_channel[channel_num];
  183. dword_len = (puhc->xfer_len + 3U) / 4U;
  184. while (((USB_HPTFQSTAT & HPTFQSTAT_PTXFS) > dword_len) && (0U != puhc->xfer_len)) {
  185. len = (USB_HPTFQSTAT & HPTFQSTAT_PTXFS) * 4U;
  186. if (len > puhc->xfer_len) {
  187. len = puhc->xfer_len;
  188. /* last packet */
  189. USB_GINTEN &= ~GINTF_PTXFEIF;
  190. }
  191. dword_len = (puhc->xfer_len + 3U) / 4U;
  192. usb_fifo_write (puhc->xfer_buff, channel_num, (uint16_t)len);
  193. puhc->xfer_buff += len;
  194. puhc->xfer_len -= len;
  195. puhc->xfer_count += len;
  196. }
  197. return 1U;
  198. }
  199. /*!
  200. \brief handle the host port interrupt
  201. \param[in] pudev: pointer to usb device instance
  202. \param[out] none
  203. \retval operation status
  204. */
  205. static uint32_t usbh_intf_port (usb_core_handle_struct *pudev)
  206. {
  207. uint8_t port_speed = 0U;
  208. uint8_t port_reset = 0U;
  209. uint32_t retval = 0U;
  210. __IO uint32_t hostportdup = USB_HPCS;
  211. /* clear the interrupt bits in gintsts */
  212. hostportdup &= ~HPCS_PE;
  213. hostportdup &= ~HPCS_PCD;
  214. hostportdup &= ~HPCS_PEDC;
  215. /* port connect detected */
  216. if (USB_HPCS & HPCS_PCD) {
  217. hostportdup |= HPCS_PCD;
  218. usbh_hcd_int_fops->device_connected(pudev);
  219. retval |= 1U;
  220. }
  221. /* port enable changed */
  222. if (USB_HPCS & HPCS_PEDC) {
  223. hostportdup |= HPCS_PEDC;
  224. if (USB_HPCS & HPCS_PE) {
  225. port_speed = (uint8_t)((USB_HPCS & HPCS_PS) >> 17U);
  226. if (HPRT_PRTSPD_LOW_SPEED == port_speed) {
  227. USB_HFT = 6000U;
  228. if (HCTLR_6_MHZ != (USB_HCTL & HCTL_CLKSEL)) {
  229. if (USB_CORE_EMBEDDED_PHY == pudev->cfg.phy_interface) {
  230. USB_FSLSCLOCK_INIT(HCTLR_6_MHZ);
  231. }
  232. port_reset = 1U;
  233. }
  234. } else if(HPRT_PRTSPD_FULL_SPEED == port_speed) {
  235. USB_HFT = 48000U;
  236. if (HCTLR_48_MHZ != (USB_HCTL & HCTL_CLKSEL)) {
  237. if (USB_CORE_EMBEDDED_PHY == pudev->cfg.phy_interface) {
  238. USB_FSLSCLOCK_INIT(HCTLR_48_MHZ);
  239. }
  240. port_reset = 1U;
  241. }
  242. } else {
  243. /* for high speed device and others */
  244. port_reset = 1U;
  245. }
  246. }
  247. }
  248. if (port_reset) {
  249. usb_port_reset(pudev);
  250. }
  251. /* clear port interrupts */
  252. USB_HPCS = hostportdup;
  253. return retval;
  254. }
  255. /*!
  256. \brief handle the OUT channel interrupt
  257. \param[in] pudev: pointer to usb device instance
  258. \param[in] channel_num: host channel number which is in (0..7)
  259. \param[out] none
  260. \retval operation status
  261. */
  262. static uint32_t usbh_intf_hc_out (usb_core_handle_struct *pudev, uint8_t channel_num)
  263. {
  264. uint32_t channel_intr = USB_HCHxINTF((uint16_t)channel_num);
  265. usb_hostchannel_struct *puhc = &pudev->host.host_channel[channel_num];
  266. channel_intr &= USB_HCHxINTEN((uint16_t)channel_num);
  267. if (channel_intr & HCHINTF_ACK) {
  268. if (URB_PING == puhc->urb_state) {
  269. puhc->err_count = 0U;
  270. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  271. usb_hostchannel_halt(pudev, channel_num);
  272. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_TF;
  273. puhc->status = HC_XF;
  274. }
  275. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_ACK;
  276. } else if (channel_intr & HCHINTF_REQOVR) {
  277. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  278. usb_hostchannel_halt(pudev, channel_num);
  279. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_REQOVR;
  280. } else if (channel_intr & HCHINTF_TF) {
  281. puhc->err_count = 0U;
  282. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  283. usb_hostchannel_halt(pudev, channel_num);
  284. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_TF;
  285. puhc->status = HC_XF;
  286. } else if (channel_intr & HCHINTF_STALL) {
  287. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  288. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_STALL;
  289. usb_hostchannel_halt(pudev, channel_num);
  290. puhc->status = HC_STALL;
  291. } else if (channel_intr & HCHINTF_NAK) {
  292. puhc->err_count = 0U;
  293. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  294. usb_hostchannel_halt(pudev, channel_num);
  295. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NAK;
  296. puhc->status = HC_NAK;
  297. } else if (channel_intr & HCHINTF_USBER) {
  298. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  299. usb_hostchannel_halt(pudev, channel_num);
  300. puhc->err_count ++;
  301. puhc->status = HC_TRACERR;
  302. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_USBER;
  303. } else if (channel_intr & HCHINTF_NYET) {
  304. puhc->err_count = 0U;
  305. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  306. puhc->status = HC_NYET;
  307. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NYET;
  308. } else if (channel_intr & HCHINTF_DTER) {
  309. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  310. usb_hostchannel_halt(pudev, channel_num);
  311. puhc->status= HC_DTGERR;
  312. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_DTER;
  313. } else if (channel_intr & HCHINTF_CH) {
  314. USB_HCHxINTEN((uint16_t)channel_num) &= ~HCHINTEN_CHIE;
  315. switch (puhc->status) {
  316. case HC_XF:
  317. puhc->urb_state = URB_DONE;
  318. if (USB_EPTYPE_BULK == ((USB_HCHxCTL((uint16_t)channel_num) & HCHCTL_EPTYPE) >> 18)) {
  319. puhc->data_tg_out ^= 1U;
  320. }
  321. break;
  322. case HC_NAK:
  323. puhc->urb_state = URB_NOTREADY;
  324. break;
  325. case HC_NYET:
  326. break;
  327. case HC_STALL:
  328. puhc->urb_state = URB_STALL;
  329. break;
  330. case HC_TRACERR:
  331. if (3U == puhc->err_count) {
  332. puhc->urb_state = URB_ERROR;
  333. puhc->err_count = 0U;
  334. }
  335. break;
  336. default:
  337. break;
  338. }
  339. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_CH;
  340. } else {
  341. /* no operation */
  342. }
  343. return 1U;
  344. }
  345. /*!
  346. \brief handle the IN channel interrupt
  347. \param[in] pudev: pointer to usb device instance
  348. \param[in] channel_num: host channel number which is in (0..7)
  349. \param[out] none
  350. \retval operation status
  351. */
  352. static uint32_t usbh_intf_hc_in (usb_core_handle_struct *pudev, uint8_t channel_num)
  353. {
  354. uint8_t endp_type = 0U;
  355. usb_hostchannel_struct *puhc = &pudev->host.host_channel[channel_num];
  356. uint32_t channle_intf = USB_HCHxINTF((uint16_t)channel_num);
  357. __IO uint32_t channel_ctrl = USB_HCHxCTL((uint16_t)channel_num);
  358. channle_intf &= USB_HCHxINTEN((uint16_t)channel_num);
  359. endp_type = (uint8_t)((channel_ctrl & HCHCTL_EPTYPE) >> 18U);
  360. if (channle_intf & HCHINTF_ACK) {
  361. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_ACK;
  362. } else if (channle_intf & HCHINTF_STALL) {
  363. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  364. puhc->status = HC_STALL;
  365. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NAK;
  366. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_STALL;
  367. /* NOTE: When there is a 'stall', reset also nak,
  368. else, the pudev->host.status = HC_STALL
  369. will be overwritten by 'nak' in code below */
  370. channle_intf &= ~HCHINTF_NAK;
  371. usb_hostchannel_halt(pudev, channel_num);
  372. } else if (channle_intf & HCHINTF_DTER) {
  373. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  374. usb_hostchannel_halt(pudev, channel_num);
  375. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NAK;
  376. puhc->status = HC_DTGERR;
  377. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_DTER;
  378. } else {
  379. /* no operation */
  380. }
  381. if (channle_intf & HCHINTF_REQOVR) {
  382. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  383. usb_hostchannel_halt(pudev, channel_num);
  384. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_REQOVR;
  385. } else if (channle_intf & HCHINTF_TF) {
  386. puhc->status = HC_XF;
  387. puhc->err_count = 0U;
  388. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_TF;
  389. if ((USB_EPTYPE_CTRL == endp_type) || (USB_EPTYPE_BULK == endp_type)) {
  390. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  391. usb_hostchannel_halt(pudev, channel_num);
  392. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NAK;
  393. puhc->data_tg_in ^= 1U;
  394. } else if (USB_EPTYPE_INTR == endp_type) {
  395. channel_ctrl |= HCHCTL_ODDFRM;
  396. USB_HCHxCTL((uint16_t)channel_num) = channel_ctrl;
  397. puhc->urb_state = URB_DONE;
  398. } else {
  399. /* no operation */
  400. }
  401. } else if (channle_intf & HCHINTF_CH) {
  402. USB_HCHxINTEN((uint16_t)channel_num) &= ~HCHINTEN_CHIE;
  403. switch (puhc->status) {
  404. case HC_XF:
  405. puhc->urb_state = URB_DONE;
  406. break;
  407. case HC_TRACERR:
  408. case HC_DTGERR:
  409. puhc->err_count = 0U;
  410. puhc->urb_state = URB_ERROR;
  411. break;
  412. case HC_STALL:
  413. puhc->urb_state = URB_STALL;
  414. break;
  415. default:
  416. if (USB_EPTYPE_INTR == endp_type) {
  417. puhc->data_tg_in ^= 1U;
  418. }
  419. break;
  420. }
  421. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_CH;
  422. } else if (channle_intf & HCHINTF_USBER) {
  423. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  424. (puhc->err_count)++;
  425. puhc->status = HC_TRACERR;
  426. usb_hostchannel_halt(pudev, channel_num);
  427. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_USBER;
  428. } else if (channle_intf & HCHINTF_NAK) {
  429. if (USB_EPTYPE_INTR == endp_type) {
  430. USB_HCHxINTEN((uint16_t)channel_num) |= HCHINTEN_CHIE;
  431. usb_hostchannel_halt(pudev, channel_num);
  432. } else if ((USB_EPTYPE_CTRL == endp_type) || (USB_EPTYPE_BULK == endp_type)) {
  433. /* re-activate the channel */
  434. channel_ctrl |= HCHCTL_CEN;
  435. channel_ctrl &= ~HCHCTL_CDIS;
  436. USB_HCHxCTL((uint16_t)channel_num) = channel_ctrl;
  437. } else {
  438. /* no operation */
  439. }
  440. puhc->status = HC_NAK;
  441. USB_HCHxINTF((uint16_t)channel_num) = HCHINTF_NAK;
  442. } else {
  443. /* no operation */
  444. }
  445. return 1U;
  446. }
  447. /*!
  448. \brief handle the rx fifo non-empty interrupt
  449. \param[in] pudev: pointer to usb device instance
  450. \param[out] none
  451. \retval operation status
  452. */
  453. static uint32_t usbh_intf_rxfifo_noempty (usb_core_handle_struct *pudev)
  454. {
  455. uint32_t count = 0U;
  456. __IO uint8_t channel_num = 0U;
  457. __IO uint32_t rx_status = 0U;
  458. uint32_t usbh_ch_ctl_reg = 0U;
  459. usb_hostchannel_struct *puhc;
  460. /* disable the Rx status queue level interrupt */
  461. USB_GINTEN &= ~GINTF_RXFNEIF;
  462. rx_status = USB_GRSTATP;
  463. channel_num = (uint8_t)(rx_status & GRSTATRP_CNUM);
  464. puhc = &pudev->host.host_channel[channel_num];
  465. switch ((rx_status & GRSTATRP_RPCKST) >> 17) {
  466. case GRSTATR_RPCKST_IN:
  467. count = (rx_status & GRSTATRP_BCOUNT) >> 4;
  468. /* read the data into the host buffer. */
  469. if ((count > 0U) && (puhc->xfer_buff != (void *)0)) {
  470. usb_fifo_read(puhc->xfer_buff, (uint16_t)count);
  471. /* manage multiple Xfer */
  472. puhc->xfer_buff += count;
  473. puhc->xfer_count += count;
  474. if (USB_HCHxLEN((uint16_t)channel_num) & HCHLEN_PCNT) {
  475. /* re-activate the channel when more packets are expected */
  476. usbh_ch_ctl_reg = USB_HCHxCTL((uint16_t)channel_num);
  477. usbh_ch_ctl_reg |= HCHCTL_CEN;
  478. usbh_ch_ctl_reg &= ~HCHCTL_CDIS;
  479. USB_HCHxCTL((uint16_t)channel_num) = usbh_ch_ctl_reg;
  480. }
  481. }
  482. break;
  483. case GRSTATR_RPCKST_IN_XFER_COMP:
  484. break;
  485. case GRSTATR_RPCKST_DATA_TOGGLE_ERR:
  486. count = (rx_status & GRSTATRP_BCOUNT) >> 4;
  487. while (count > 0) {
  488. rx_status = USB_GRSTATP;
  489. count--;
  490. }
  491. break;
  492. case GRSTATR_RPCKST_CH_HALTED:
  493. break;
  494. default:
  495. break;
  496. }
  497. /* enable the Rx status queue level interrupt */
  498. USB_GINTEN |= GINTF_RXFNEIF;
  499. return 1U;
  500. }
  501. /*!
  502. \brief handle the incomplete periodic transfer interrupt
  503. \param[in] pudev: pointer to usb device instance
  504. \param[out] none
  505. \retval operation status
  506. */
  507. static uint32_t usbh_intf_iso_incomplete_xfer (usb_core_handle_struct *pudev)
  508. {
  509. __IO uint32_t gint_flag = 0U;
  510. gint_flag = USB_HCHxCTL(0U);
  511. USB_HCHxCTL(0U) = 0U;
  512. gint_flag = 0U;
  513. /* clear interrupt */
  514. gint_flag |= GINTF_ISOONCIF;
  515. USB_GINTF = gint_flag;
  516. return 1U;
  517. }