gd32e230_pmu.c 8.8 KB

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  1. /*!
  2. \file gd32e230_pmu.c
  3. \brief PMU driver
  4. \version 2018-06-19, V1.0.0, firmware for GD32E230
  5. */
  6. /*
  7. Copyright (c) 2018, GigaDevice Semiconductor Inc.
  8. All rights reserved.
  9. Redistribution and use in source and binary forms, with or without modification,
  10. are permitted provided that the following conditions are met:
  11. 1. Redistributions of source code must retain the above copyright notice, this
  12. list of conditions and the following disclaimer.
  13. 2. Redistributions in binary form must reproduce the above copyright notice,
  14. this list of conditions and the following disclaimer in the documentation
  15. and/or other materials provided with the distribution.
  16. 3. Neither the name of the copyright holder nor the names of its contributors
  17. may be used to endorse or promote products derived from this software without
  18. specific prior written permission.
  19. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20. AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  22. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
  23. INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  24. NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  25. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  26. WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  27. ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
  28. OF SUCH DAMAGE.
  29. */
  30. #include "gd32e230_pmu.h"
  31. /*!
  32. \brief reset PMU register
  33. \param[in] none
  34. \param[out] none
  35. \retval none
  36. */
  37. void pmu_deinit(void)
  38. {
  39. /* reset PMU */
  40. rcu_periph_reset_enable(RCU_PMURST);
  41. rcu_periph_reset_disable(RCU_PMURST);
  42. }
  43. /*!
  44. \brief select low voltage detector threshold
  45. \param[in] lvdt_n:
  46. only one parameter can be selected which is shown as below:
  47. \arg PMU_LVDT_0: voltage threshold is 2.1V
  48. \arg PMU_LVDT_1: voltage threshold is 2.3V
  49. \arg PMU_LVDT_2: voltage threshold is 2.4V
  50. \arg PMU_LVDT_3: voltage threshold is 2.6V
  51. \arg PMU_LVDT_4: voltage threshold is 2.7V
  52. \arg PMU_LVDT_5: voltage threshold is 2.9V
  53. \arg PMU_LVDT_6: voltage threshold is 3.0V
  54. \arg PMU_LVDT_7: voltage threshold is 3.1V
  55. \param[out] none
  56. \retval none
  57. */
  58. void pmu_lvd_select(uint32_t lvdt_n)
  59. {
  60. /* disable LVD */
  61. PMU_CTL &= ~PMU_CTL_LVDEN;
  62. /* clear LVDT bits */
  63. PMU_CTL &= ~PMU_CTL_LVDT;
  64. /* set LVDT bits according to lvdt_n */
  65. PMU_CTL |= lvdt_n;
  66. /* enable LVD */
  67. PMU_CTL |= PMU_CTL_LVDEN;
  68. }
  69. /*!
  70. \brief select LDO output voltage
  71. these bits set by software when the main PLL closed
  72. \param[in] ldo_output:
  73. only one parameter can be selected which is shown as below:
  74. \arg PMU_LDOVS_LOW: LDO output voltage low mode
  75. \arg PMU_LDOVS_HIGH: LDO output voltage high mode
  76. \param[out] none
  77. \retval none
  78. */
  79. void pmu_ldo_output_select(uint32_t ldo_output)
  80. {
  81. PMU_CTL &= ~PMU_CTL_LDOVS;
  82. PMU_CTL |= ldo_output;
  83. }
  84. /*!
  85. \brief disable PMU lvd
  86. \param[in] none
  87. \param[out] none
  88. \retval none
  89. */
  90. void pmu_lvd_disable(void)
  91. {
  92. /* disable LVD */
  93. PMU_CTL &= ~PMU_CTL_LVDEN;
  94. }
  95. /*!
  96. \brief PMU work at sleep mode
  97. \param[in] sleepmodecmd:
  98. only one parameter can be selected which is shown as below:
  99. \arg WFI_CMD: use WFI command
  100. \arg WFE_CMD: use WFE command
  101. \param[out] none
  102. \retval none
  103. */
  104. void pmu_to_sleepmode(uint8_t sleepmodecmd)
  105. {
  106. /* clear sleepdeep bit of Cortex-M23 system control register */
  107. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  108. /* select WFI or WFE command to enter sleep mode */
  109. if(WFI_CMD == sleepmodecmd){
  110. __WFI();
  111. }else{
  112. __WFE();
  113. }
  114. }
  115. /*!
  116. \brief PMU work at deepsleep mode
  117. \param[in] ldo:
  118. only one parameter can be selected which is shown as below:
  119. \arg PMU_LDO_NORMAL: LDO operates normally when pmu enter deepsleep mode
  120. \arg PMU_LDO_LOWPOWER: LDO work at low power mode when pmu enter deepsleep mode
  121. \param[in] deepsleepmodecmd:
  122. only one parameter can be selected which is shown as below:
  123. \arg WFI_CMD: use WFI command
  124. \arg WFE_CMD: use WFE command
  125. \param[out] none
  126. \retval none
  127. */
  128. void pmu_to_deepsleepmode(uint32_t ldo,uint8_t deepsleepmodecmd)
  129. {
  130. static uint32_t reg_snap[ 3 ];
  131. /* clear stbmod and ldolp bits */
  132. PMU_CTL &= ~((uint32_t)(PMU_CTL_STBMOD | PMU_CTL_LDOLP));
  133. /* set ldolp bit according to pmu_ldo */
  134. PMU_CTL |= ldo;
  135. /* set sleepdeep bit of Cortex-M23 system control register */
  136. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  137. reg_snap[ 0 ] = REG32( 0xE000E010U );
  138. reg_snap[ 1 ] = REG32( 0xE000E100U );
  139. reg_snap[ 2 ] = REG32( 0xE000E104U );
  140. REG32( 0xE000E010U ) &= 0x00010004U;
  141. REG32( 0xE000E180U ) = 0XF7FFEF19U;
  142. REG32( 0xE000E184U ) = 0XFFFFFFFFU;
  143. /* select WFI or WFE command to enter deepsleep mode */
  144. if(WFI_CMD == deepsleepmodecmd){
  145. __WFI();
  146. }else{
  147. __SEV();
  148. __WFE();
  149. __WFE();
  150. }
  151. REG32( 0xE000E010U ) = reg_snap[ 0 ] ;
  152. REG32( 0xE000E100U ) = reg_snap[ 1 ] ;
  153. REG32( 0xE000E104U ) = reg_snap[ 2 ] ;
  154. /* reset sleepdeep bit of Cortex-M23 system control register */
  155. SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
  156. }
  157. /*!
  158. \brief pmu work at standby mode
  159. \param[in] standbymodecmd:
  160. only one parameter can be selected which is shown as below:
  161. \arg WFI_CMD: use WFI command
  162. \arg WFE_CMD: use WFE command
  163. \param[out] none
  164. \retval none
  165. */
  166. void pmu_to_standbymode(uint8_t standbymodecmd)
  167. {
  168. /* set sleepdeep bit of Cortex-M23 system control register */
  169. SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
  170. /* set stbmod bit */
  171. PMU_CTL |= PMU_CTL_STBMOD;
  172. /* reset wakeup flag */
  173. PMU_CTL |= PMU_CTL_WURST;
  174. /* select WFI or WFE command to enter standby mode */
  175. if(WFI_CMD == standbymodecmd){
  176. __WFI();
  177. }else{
  178. __WFE();
  179. }
  180. }
  181. /*!
  182. \brief enable wakeup pin
  183. \param[in] wakeup_pin:
  184. one or more parameters can be selected which are shown as below:
  185. \arg PMU_WAKEUP_PIN0: WKUP Pin 0 (PA0)
  186. \arg PMU_WAKEUP_PIN1: WKUP Pin 1 (PC13)
  187. \arg PMU_WAKEUP_PIN5: WKUP Pin 5 (PB5)
  188. \arg PMU_WAKEUP_PIN6: WKUP Pin 6 (PB15)
  189. \param[out] none
  190. \retval none
  191. */
  192. void pmu_wakeup_pin_enable(uint32_t wakeup_pin)
  193. {
  194. PMU_CS |= wakeup_pin;
  195. }
  196. /*!
  197. \brief disable wakeup pin
  198. \param[in] wakeup_pin:
  199. one or more parameters can be selected which are shown as below:
  200. \arg PMU_WAKEUP_PIN0: WKUP Pin 0 (PA0)
  201. \arg PMU_WAKEUP_PIN1: WKUP Pin 1 (PC13)
  202. \arg PMU_WAKEUP_PIN5: WKUP Pin 5 (PB5)
  203. \arg PMU_WAKEUP_PIN6: WKUP Pin 6 (PB15)
  204. \param[out] none
  205. \retval none
  206. */
  207. void pmu_wakeup_pin_disable(uint32_t wakeup_pin)
  208. {
  209. PMU_CS &= ~(wakeup_pin);
  210. }
  211. /*!
  212. \brief enable backup domain write
  213. \param[in] none
  214. \param[out] none
  215. \retval none
  216. */
  217. void pmu_backup_write_enable(void)
  218. {
  219. PMU_CTL |= PMU_CTL_BKPWEN;
  220. }
  221. /*!
  222. \brief disable backup domain write
  223. \param[in] none
  224. \param[out] none
  225. \retval none
  226. */
  227. void pmu_backup_write_disable(void)
  228. {
  229. PMU_CTL &= ~PMU_CTL_BKPWEN;
  230. }
  231. /*!
  232. \brief clear flag bit
  233. \param[in] flag_clear:
  234. one or more parameters can be selected which are shown as below:
  235. \arg PMU_FLAG_RESET_WAKEUP: reset wakeup flag
  236. \arg PMU_FLAG_RESET_STANDBY: reset standby flag
  237. \param[out] none
  238. \retval none
  239. */
  240. void pmu_flag_clear(uint32_t flag_clear)
  241. {
  242. if(RESET != (flag_clear & PMU_FLAG_RESET_WAKEUP)){
  243. /* reset wakeup flag */
  244. PMU_CTL |= PMU_CTL_WURST;
  245. }
  246. if(RESET != (flag_clear & PMU_FLAG_RESET_STANDBY)){
  247. /* reset standby flag */
  248. PMU_CTL |= PMU_CTL_STBRST;
  249. }
  250. }
  251. /*!
  252. \brief get flag state
  253. \param[in] flag:
  254. only one parameter can be selected which is shown as below:
  255. \arg PMU_FLAG_WAKEUP: wakeup flag
  256. \arg PMU_FLAG_STANDBY: standby flag
  257. \arg PMU_FLAG_LVD: lvd flag
  258. \param[out] none
  259. \retval FlagStatus SET or RESET
  260. */
  261. FlagStatus pmu_flag_get(uint32_t flag)
  262. {
  263. FlagStatus ret_status = RESET;
  264. if(PMU_CS & flag){
  265. ret_status = SET;
  266. }
  267. return ret_status;
  268. }