evkmimxrt1170_flexspi_nor_config.c 2.0 KB

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  1. /*
  2. * Copyright 2018-2020 NXP
  3. * All rights reserved.
  4. *
  5. * SPDX-License-Identifier: BSD-3-Clause
  6. */
  7. #include "evkmimxrt1170_flexspi_nor_config.h"
  8. /* Component ID definition, used by tools. */
  9. #ifndef FSL_COMPONENT_ID
  10. #define FSL_COMPONENT_ID "platform.drivers.xip_board"
  11. #endif
  12. /*******************************************************************************
  13. * Code
  14. ******************************************************************************/
  15. #if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
  16. #if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
  17. __attribute__((section(".boot_hdr.conf"), used))
  18. #elif defined(__ICCARM__)
  19. #pragma location = ".boot_hdr.conf"
  20. #endif
  21. const flexspi_nor_config_t qspiflash_config = {
  22. .memConfig =
  23. {
  24. .tag = FLEXSPI_CFG_BLK_TAG,
  25. .version = FLEXSPI_CFG_BLK_VERSION,
  26. .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
  27. .csHoldTime = 3u,
  28. .csSetupTime = 3u,
  29. // Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
  30. .controllerMiscOption = 0x10,
  31. .deviceType = kFlexSpiDeviceType_SerialNOR,
  32. .sflashPadType = kSerialFlash_4Pads,
  33. .serialClkFreq = kFlexSpiSerialClk_133MHz,
  34. .sflashA1Size = 16u * 1024u * 1024u,
  35. .lookupTable =
  36. {
  37. // Read LUTs
  38. FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 0x18),
  39. FLEXSPI_LUT_SEQ(MODE8_SDR, FLEXSPI_4PAD, 0x00, DUMMY_SDR, FLEXSPI_4PAD, 0x04),
  40. FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_4PAD, 0x04, 0, 0, 0),
  41. },
  42. },
  43. .pageSize = 256u,
  44. .sectorSize = 4u * 1024u,
  45. .ipcmdSerialClkFreq = 0x1,
  46. .blockSize = 256u * 1024u,
  47. .isUniformBlockSize = false,
  48. };
  49. #endif /* XIP_BOOT_HEADER_ENABLE */