fsl_lpi2c_cmsis.c 75 KB

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  1. /*
  2. * Copyright (c) 2013-2016 ARM Limited. All rights reserved.
  3. * Copyright (c) 2016, Freescale Semiconductor, Inc. Not a Contribution.
  4. * Copyright 2016-2017,2020 NXP. Not a Contribution.
  5. *
  6. * SPDX-License-Identifier: Apache-2.0
  7. *
  8. * Licensed under the Apache License, Version 2.0 (the License); you may
  9. * not use this file except in compliance with the License.
  10. * You may obtain a copy of the License at
  11. *
  12. * http://www.apache.org/licenses/LICENSE-2.0
  13. *
  14. * Unless required by applicable law or agreed to in writing, software
  15. * distributed under the License is distributed on an AS IS BASIS, WITHOUT
  16. * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  17. * See the License for the specific language governing permissions and
  18. * limitations under the License.
  19. */
  20. #include "fsl_lpi2c_cmsis.h"
  21. #if ((defined(RTE_I2C0) && RTE_I2C0 && defined(LPI2C0)) || (defined(RTE_I2C1) && RTE_I2C1 && defined(LPI2C1)) || \
  22. (defined(RTE_I2C2) && RTE_I2C2 && defined(LPI2C2)) || (defined(RTE_I2C3) && RTE_I2C3 && defined(LPI2C3)) || \
  23. (defined(RTE_I2C4) && RTE_I2C4 && defined(LPI2C4)) || (defined(RTE_I2C5) && RTE_I2C5 && defined(LPI2C5)) || \
  24. (defined(RTE_I2C6) && RTE_I2C6 && defined(LPI2C6)))
  25. #define ARM_LPI2C_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR((2), (1))
  26. /*
  27. * ARMCC does not support split the data section automatically, so the driver
  28. * needs to split the data to separate sections explicitly, to reduce codesize.
  29. */
  30. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  31. #define ARMCC_SECTION(section_name) __attribute__((section(section_name)))
  32. #endif
  33. /*******************************************************************************
  34. * Definitions
  35. ******************************************************************************/
  36. /* Component ID definition, used by tools. */
  37. #ifndef FSL_COMPONENT_ID
  38. #define FSL_COMPONENT_ID "platform.drivers.lpi2c_cmsis"
  39. #endif
  40. typedef const struct _cmsis_lpi2c_resource
  41. {
  42. LPI2C_Type *base; /*!< LPI2C peripheral base address. */
  43. uint32_t (*GetFreq)(void); /*!< Function to get the clock frequency. */
  44. } cmsis_lpi2c_resource_t;
  45. typedef union _cmsis_i2c_handle
  46. {
  47. lpi2c_master_handle_t master_handle;
  48. lpi2c_slave_handle_t slave_handle;
  49. } cmsis_i2c_handle_t;
  50. typedef struct _cmsis_lpi2c_interrupt_driver_state
  51. {
  52. cmsis_lpi2c_resource_t *resource; /*!< Basic LPI2C resource. */
  53. cmsis_i2c_handle_t *handle;
  54. uint8_t *slave_data; /*!< slave Transfer buffer */
  55. size_t slave_dataSize; /*!< slave Transfer size */
  56. ARM_I2C_SignalEvent_t cb_event; /*!< call back function */
  57. uint8_t flags; /*!< Control and state flags. */
  58. } cmsis_lpi2c_interrupt_driver_state_t;
  59. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  60. typedef const struct _cmsis_lpi2c_edma_resource
  61. {
  62. DMA_Type *txEdmaBase; /*!< EDMA peripheral base address for Tx. */
  63. uint32_t txEdmaChannel; /*!< EDMA channel for Tx */
  64. uint16_t txDmaRequest; /*!< Tx EDMA request source. */
  65. DMA_Type *rxEdmaBase; /*!< EDMA peripheral base address for Rx. */
  66. uint32_t rxEdmaChannel; /*!< EDMA channel for Rx */
  67. uint16_t rxDmaRequest; /*!< Rx EDMA request source. */
  68. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  69. DMAMUX_Type *txDmamuxBase; /*!< DMAMUX peripheral base address for Tx */
  70. DMAMUX_Type *rxDmamuxBase; /*!< DMAMUX peripheral base address for Rx */
  71. #endif
  72. } cmsis_lpi2c_edma_resource_t;
  73. typedef struct _cmsis_lpi2c_edma_driver_state
  74. {
  75. cmsis_lpi2c_resource_t *resource; /*!< lpi2c basic resource. */
  76. cmsis_lpi2c_edma_resource_t *edmaResource; /*!< lpi2c EDMA resource. */
  77. lpi2c_master_edma_handle_t *master_edma_handle; /*!< lpi2c EDMA transfer handle. */
  78. edma_handle_t *edmaTxHandle; /*!< EDMA lpi2c Tx handle. */
  79. edma_handle_t *edmaRxHandle; /*!< EDMA lpi2c Rx handle. */
  80. uint8_t flags; /*!< Control and state flags. */
  81. } cmsis_lpi2c_edma_driver_state_t;
  82. #endif /* FSL_FEATURE_SOC_EDMA_COUNT */
  83. /*******************************************************************************
  84. * Prototypes
  85. ******************************************************************************/
  86. static const ARM_DRIVER_VERSION s_lpi2cDriverVersion = {ARM_I2C_API_VERSION, ARM_LPI2C_DRV_VERSION};
  87. static const ARM_I2C_CAPABILITIES s_lpi2cDriverCapabilities = {
  88. 0, /* Do not support 10-bit addressing.*/
  89. };
  90. /*******************************************************************************
  91. * Code
  92. ******************************************************************************/
  93. /* Returns version information */
  94. static ARM_DRIVER_VERSION LPI2Cx_GetVersion(void)
  95. {
  96. return s_lpi2cDriverVersion;
  97. }
  98. /* Returns information about capabilities of this driver implementation */
  99. static ARM_I2C_CAPABILITIES LPI2Cx_GetCapabilities(void)
  100. {
  101. return s_lpi2cDriverCapabilities;
  102. }
  103. #endif
  104. #if ((defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN) || (defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN) || \
  105. (defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN) || (defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN) || \
  106. (defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN) || (defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN) || \
  107. (defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN))
  108. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  109. static void KSDK_LPI2C_MASTER_EdmaCallback(LPI2C_Type *base,
  110. lpi2c_master_edma_handle_t *handle,
  111. status_t status,
  112. void *userData)
  113. {
  114. uint32_t event = 0;
  115. /* Signal transfer success when received success status. */
  116. if (status == kStatus_Success)
  117. {
  118. event = ARM_I2C_EVENT_TRANSFER_DONE;
  119. }
  120. if (userData != NULL)
  121. {
  122. ((ARM_I2C_SignalEvent_t)userData)(event);
  123. }
  124. }
  125. static int32_t LPI2C_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  126. {
  127. if (0U == (lpi2c->flags & (uint8_t)I2C_FLAG_INIT))
  128. {
  129. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  130. /* TxDMAMUX init */
  131. DMAMUX_SetSource(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel,
  132. (uint8_t)lpi2c->edmaResource->txDmaRequest);
  133. DMAMUX_EnableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
  134. /* RxDMAMUX init */
  135. DMAMUX_SetSource(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel,
  136. (uint8_t)lpi2c->edmaResource->rxDmaRequest);
  137. DMAMUX_EnableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
  138. #endif
  139. /* Create edmaTxHandle */
  140. EDMA_CreateHandle(lpi2c->edmaTxHandle, lpi2c->edmaResource->txEdmaBase, lpi2c->edmaResource->txEdmaChannel);
  141. /* Create edmaRxHandle */
  142. EDMA_CreateHandle(lpi2c->edmaRxHandle, lpi2c->edmaResource->rxEdmaBase, lpi2c->edmaResource->rxEdmaChannel);
  143. /* Create master_edma_handle */
  144. LPI2C_MasterCreateEDMAHandle(lpi2c->resource->base, lpi2c->master_edma_handle, lpi2c->edmaRxHandle,
  145. lpi2c->edmaTxHandle, KSDK_LPI2C_MASTER_EdmaCallback, (void *)cb_event);
  146. lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
  147. }
  148. return ARM_DRIVER_OK;
  149. }
  150. static int32_t LPI2C_Master_EdmaUninitialize(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  151. {
  152. lpi2c->flags = (uint8_t)I2C_FLAG_UNINIT;
  153. return ARM_DRIVER_OK;
  154. }
  155. static int32_t LPI2C_Master_EdmaTransmit(
  156. uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  157. {
  158. int32_t status;
  159. int32_t ret;
  160. lpi2c_master_transfer_t masterXfer;
  161. /* Setup the master transfer */
  162. masterXfer.slaveAddress = (uint16_t)addr;
  163. masterXfer.direction = kLPI2C_Write;
  164. masterXfer.subaddress = 0U;
  165. masterXfer.subaddressSize = 0U;
  166. masterXfer.data = (uint8_t *)data;
  167. masterXfer.dataSize = num;
  168. masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
  169. if (xfer_pending)
  170. {
  171. /* Do not transfer stop */
  172. masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
  173. }
  174. /* Send master non-blocking data to slave */
  175. status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
  176. switch (status)
  177. {
  178. case kStatus_Success:
  179. ret = ARM_DRIVER_OK;
  180. break;
  181. case kStatus_LPI2C_Busy:
  182. ret = ARM_DRIVER_ERROR_BUSY;
  183. break;
  184. default:
  185. ret = ARM_DRIVER_ERROR;
  186. break;
  187. }
  188. return ret;
  189. }
  190. static int32_t LPI2C_Master_EdmaReceive(
  191. uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  192. {
  193. int32_t status;
  194. int32_t ret;
  195. lpi2c_master_transfer_t masterXfer;
  196. /* Setup the master transfer */
  197. masterXfer.slaveAddress = (uint16_t)addr;
  198. masterXfer.direction = kLPI2C_Read;
  199. masterXfer.subaddress = 0U;
  200. masterXfer.subaddressSize = 0U;
  201. masterXfer.data = data;
  202. masterXfer.dataSize = num;
  203. masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
  204. if (xfer_pending)
  205. {
  206. masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
  207. }
  208. /* Receive non-blocking data from slave */
  209. status = LPI2C_MasterTransferEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &masterXfer);
  210. switch (status)
  211. {
  212. case kStatus_Success:
  213. ret = ARM_DRIVER_OK;
  214. break;
  215. case kStatus_LPI2C_Busy:
  216. ret = ARM_DRIVER_ERROR_BUSY;
  217. break;
  218. default:
  219. ret = ARM_DRIVER_ERROR;
  220. break;
  221. }
  222. return ret;
  223. }
  224. static int32_t LPI2C_Master_EdmaGetDataCount(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  225. {
  226. size_t cnt;
  227. (void)LPI2C_MasterTransferGetCountEDMA(lpi2c->resource->base, lpi2c->master_edma_handle, &cnt);
  228. return (int32_t)cnt;
  229. }
  230. static int32_t LPI2C_Master_EdmaControl(uint32_t control, uint32_t arg, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  231. {
  232. uint32_t baudRate_Bps;
  233. int32_t result = ARM_DRIVER_OK;
  234. switch (control)
  235. {
  236. /* Set Own Slave Address */
  237. case ARM_I2C_OWN_ADDRESS:
  238. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  239. break;
  240. /* Set Bus Speed; arg = bus speed */
  241. case ARM_I2C_BUS_SPEED:
  242. switch (arg)
  243. {
  244. case ARM_I2C_BUS_SPEED_STANDARD:
  245. baudRate_Bps = 100000;
  246. break;
  247. case ARM_I2C_BUS_SPEED_FAST:
  248. baudRate_Bps = 400000;
  249. break;
  250. case ARM_I2C_BUS_SPEED_FAST_PLUS:
  251. baudRate_Bps = 1000000;
  252. break;
  253. default:
  254. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  255. break;
  256. }
  257. if (result != ARM_DRIVER_ERROR_UNSUPPORTED)
  258. {
  259. LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
  260. result = ARM_DRIVER_OK;
  261. }
  262. break;
  263. /* Not supported. */
  264. case ARM_I2C_BUS_CLEAR:
  265. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  266. break;
  267. /* Only support aborting data transfer when master transmit in master mode */
  268. case ARM_I2C_ABORT_TRANSFER:
  269. if ((lpi2c->resource->base->MDER & 0x3UL) == 0x3UL)
  270. {
  271. if (lpi2c->master_edma_handle->transfer.direction == kLPI2C_Write)
  272. {
  273. (void)LPI2C_MasterTransferAbortEDMA(lpi2c->resource->base, lpi2c->master_edma_handle);
  274. lpi2c->master_edma_handle->transfer.data = NULL;
  275. lpi2c->master_edma_handle->transfer.dataSize = 0;
  276. }
  277. }
  278. result = ARM_DRIVER_OK;
  279. break;
  280. default:
  281. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  282. break;
  283. }
  284. return result;
  285. }
  286. static int32_t LPI2C_Master_EdmaPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_edma_driver_state_t *lpi2c)
  287. {
  288. lpi2c_master_config_t masterConfig;
  289. int32_t result = ARM_DRIVER_OK;
  290. switch (state)
  291. {
  292. case ARM_POWER_OFF:
  293. if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
  294. {
  295. /* Terminates any pending data transfers */
  296. (void)LPI2C_Master_EdmaControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
  297. /* Disables peripheral */
  298. LPI2C_MasterDeinit(lpi2c->resource->base);
  299. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  300. /* Disable DMAMUX channel */
  301. DMAMUX_DisableChannel(lpi2c->edmaResource->txDmamuxBase, lpi2c->edmaResource->txEdmaChannel);
  302. DMAMUX_DisableChannel(lpi2c->edmaResource->rxDmamuxBase, lpi2c->edmaResource->rxEdmaChannel);
  303. #endif
  304. lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
  305. }
  306. result = ARM_DRIVER_OK;
  307. break;
  308. case ARM_POWER_LOW:
  309. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  310. break;
  311. case ARM_POWER_FULL:
  312. if (lpi2c->flags == (uint8_t)I2C_FLAG_UNINIT)
  313. {
  314. result = ARM_DRIVER_ERROR;
  315. break;
  316. }
  317. if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
  318. {
  319. /* Driver already powered */
  320. break;
  321. }
  322. /*
  323. * masterConfig.debugEnable = false;
  324. * masterConfig.ignoreAck = false;
  325. * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
  326. * masterConfig.baudRate_Hz = 100000U;
  327. * masterConfig.busIdleTimeout_ns = 0;
  328. * masterConfig.pinLowTimeout_ns = 0;
  329. * masterConfig.sdaGlitchFilterWidth_ns = 0;
  330. * masterConfig.sclGlitchFilterWidth_ns = 0;
  331. */
  332. LPI2C_MasterGetDefaultConfig(&masterConfig);
  333. /* Initialize the LPI2C master peripheral */
  334. LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
  335. lpi2c->flags |= (uint8_t)I2C_FLAG_POWER;
  336. result = ARM_DRIVER_OK;
  337. break;
  338. default:
  339. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  340. break;
  341. }
  342. return result;
  343. }
  344. static ARM_I2C_STATUS LPI2C_Master_EdmaGetStatus(cmsis_lpi2c_edma_driver_state_t *lpi2c)
  345. {
  346. ARM_I2C_STATUS stat = {0};
  347. uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
  348. stat.busy = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterBusyFlag) != 0U); /* Busy flag */
  349. stat.mode = 1; /* Mode: 0=Slave, 1=Master */
  350. stat.direction = (uint32_t)lpi2c->master_edma_handle->transfer.direction; /* Direction: 0=Transmitter, 1=Receiver */
  351. stat.arbitration_lost = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterArbitrationLostFlag) !=
  352. 0U); /* Master lost arbitration */
  353. return stat;
  354. }
  355. #endif
  356. #endif
  357. #if ((defined(RTE_I2C0) && RTE_I2C0 && !RTE_I2C0_DMA_EN) || (defined(RTE_I2C1) && RTE_I2C1 && !RTE_I2C1_DMA_EN) || \
  358. (defined(RTE_I2C2) && RTE_I2C2 && !RTE_I2C2_DMA_EN) || (defined(RTE_I2C3) && RTE_I2C3 && !RTE_I2C3_DMA_EN) || \
  359. (defined(RTE_I2C4) && RTE_I2C4 && !RTE_I2C4_DMA_EN) || (defined(RTE_I2C5) && RTE_I2C5 && !RTE_I2C5_DMA_EN) || \
  360. (defined(RTE_I2C6) && RTE_I2C6 && !RTE_I2C6_DMA_EN))
  361. static void KSDK_LPI2C_SLAVE_InterruptCallback(LPI2C_Type *base,
  362. lpi2c_slave_transfer_t *xfer,
  363. void *userData,
  364. cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  365. {
  366. uint32_t event = 0;
  367. switch (xfer->event)
  368. {
  369. /* Transfer done */
  370. case kLPI2C_SlaveCompletionEvent:
  371. event = ARM_I2C_EVENT_TRANSFER_DONE;
  372. break;
  373. /* Setup the slave receive buffer */
  374. case kLPI2C_SlaveReceiveEvent:
  375. xfer->data = lpi2c->slave_data;
  376. xfer->dataSize = lpi2c->slave_dataSize;
  377. break;
  378. /* Setup the slave transmit buffer */
  379. case kLPI2C_SlaveTransmitEvent:
  380. xfer->data = lpi2c->slave_data;
  381. xfer->dataSize = lpi2c->slave_dataSize;
  382. break;
  383. default:
  384. event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
  385. break;
  386. }
  387. if (userData != NULL)
  388. {
  389. ((ARM_I2C_SignalEvent_t)userData)(event);
  390. }
  391. }
  392. static void KSDK_LPI2C_MASTER_InterruptCallback(LPI2C_Type *base,
  393. lpi2c_master_handle_t *handle,
  394. status_t status,
  395. void *userData)
  396. {
  397. uint32_t event = 0;
  398. /* Signal transfer success when received success status. */
  399. switch (status)
  400. {
  401. /* Transfer done */
  402. case kStatus_Success:
  403. event = ARM_I2C_EVENT_TRANSFER_DONE;
  404. break;
  405. /* Occurs in master mode when arbitration is lost */
  406. case kStatus_LPI2C_ArbitrationLost:
  407. event = ARM_I2C_EVENT_ARBITRATION_LOST;
  408. break;
  409. default:
  410. event = ARM_I2C_EVENT_TRANSFER_INCOMPLETE;
  411. break;
  412. }
  413. if (userData != NULL)
  414. {
  415. ((ARM_I2C_SignalEvent_t)userData)(event);
  416. }
  417. }
  418. static int32_t LPI2C_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  419. {
  420. if (0U == (lpi2c->flags & (uint8_t)I2C_FLAG_INIT))
  421. {
  422. lpi2c->cb_event = cb_event; /* Call back function */
  423. lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
  424. }
  425. return ARM_DRIVER_OK;
  426. }
  427. static int32_t LPI2C_InterruptUninitialize(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  428. {
  429. lpi2c->flags = (uint8_t)I2C_FLAG_UNINIT;
  430. return ARM_DRIVER_OK;
  431. }
  432. static int32_t LPI2C_Master_InterruptTransmit(
  433. uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  434. {
  435. int32_t status;
  436. int32_t ret;
  437. lpi2c_master_transfer_t masterXfer;
  438. if (lpi2c->handle->master_handle.state != 0U)
  439. {
  440. return ARM_DRIVER_ERROR_BUSY; /* Master is busy */
  441. }
  442. /* Create master_handle */
  443. LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
  444. KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
  445. /* Setup the master transfer */
  446. masterXfer.slaveAddress = (uint16_t)addr;
  447. masterXfer.direction = kLPI2C_Write;
  448. masterXfer.subaddress = 0U;
  449. masterXfer.subaddressSize = 0U;
  450. masterXfer.data = (uint8_t *)data;
  451. masterXfer.dataSize = num;
  452. masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
  453. if (xfer_pending)
  454. {
  455. /* Stop condition will not be generated */
  456. masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
  457. }
  458. /* Send master non-blocking data to slave */
  459. status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
  460. switch (status)
  461. {
  462. case kStatus_Success:
  463. ret = ARM_DRIVER_OK;
  464. break;
  465. case kStatus_LPI2C_Busy:
  466. ret = ARM_DRIVER_ERROR_BUSY;
  467. break;
  468. default:
  469. ret = ARM_DRIVER_ERROR;
  470. break;
  471. }
  472. return ret;
  473. }
  474. static int32_t LPI2C_Master_InterruptReceive(
  475. uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  476. {
  477. int32_t status;
  478. int32_t ret;
  479. lpi2c_master_transfer_t masterXfer;
  480. if (lpi2c->handle->master_handle.state != 0U)
  481. {
  482. /* Master is busy */
  483. return ARM_DRIVER_ERROR_BUSY;
  484. }
  485. /* Create master_handle */
  486. LPI2C_MasterTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->master_handle),
  487. KSDK_LPI2C_MASTER_InterruptCallback, (void *)lpi2c->cb_event);
  488. /* Setup the master transfer */
  489. masterXfer.slaveAddress = (uint16_t)addr;
  490. masterXfer.direction = kLPI2C_Read;
  491. masterXfer.subaddress = 0U;
  492. masterXfer.subaddressSize = 0U;
  493. masterXfer.data = data;
  494. masterXfer.dataSize = num;
  495. masterXfer.flags = (uint32_t)kLPI2C_TransferDefaultFlag;
  496. if (xfer_pending)
  497. {
  498. /* Stop condition will not be generated */
  499. masterXfer.flags |= (uint32_t)kLPI2C_TransferNoStopFlag;
  500. }
  501. /* Receive non-blocking data from slave */
  502. status = LPI2C_MasterTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->master_handle), &masterXfer);
  503. switch (status)
  504. {
  505. case kStatus_Success:
  506. ret = ARM_DRIVER_OK;
  507. break;
  508. case kStatus_LPI2C_Busy:
  509. ret = ARM_DRIVER_ERROR_BUSY;
  510. break;
  511. default:
  512. ret = ARM_DRIVER_ERROR;
  513. break;
  514. }
  515. return ret;
  516. }
  517. static int32_t LPI2C_Slave_InterruptTransmit(const uint8_t *data,
  518. uint32_t num,
  519. cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  520. {
  521. int32_t status;
  522. int32_t ret;
  523. /* Create slave_handle */
  524. LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  525. lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
  526. /* Slave send Nonblocking data to master */
  527. status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  528. (uint32_t)kLPI2C_SlaveCompletionEvent);
  529. lpi2c->slave_data = (uint8_t *)data; /*!< slave Transfer buffer */
  530. lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
  531. lpi2c->handle->slave_handle.transferredCount = 0U; /*!< slave Transfered data count */
  532. switch (status)
  533. {
  534. case kStatus_Success:
  535. ret = ARM_DRIVER_OK;
  536. break;
  537. case kStatus_LPI2C_Busy:
  538. ret = ARM_DRIVER_ERROR_BUSY;
  539. break;
  540. default:
  541. ret = ARM_DRIVER_ERROR;
  542. break;
  543. }
  544. return ret;
  545. }
  546. static int32_t LPI2C_Slave_InterruptReceive(uint8_t *data, uint32_t num, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  547. {
  548. int32_t status;
  549. int32_t ret;
  550. /* Create slave_handle */
  551. LPI2C_SlaveTransferCreateHandle(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  552. lpi2c->handle->slave_handle.callback, (void *)lpi2c->cb_event);
  553. /* Slave receive Nonblocking data from master */
  554. status = LPI2C_SlaveTransferNonBlocking(lpi2c->resource->base, &(lpi2c->handle->slave_handle),
  555. (uint32_t)kLPI2C_SlaveCompletionEvent);
  556. lpi2c->slave_data = data; /*!< slave Transfer buffer */
  557. lpi2c->slave_dataSize = num; /*!< slave Transfer data size */
  558. lpi2c->handle->slave_handle.transferredCount = 0U; /*!< slave Transfered data count */
  559. switch (status)
  560. {
  561. case kStatus_Success:
  562. ret = ARM_DRIVER_OK;
  563. break;
  564. case kStatus_LPI2C_Busy:
  565. ret = ARM_DRIVER_ERROR_BUSY;
  566. break;
  567. default:
  568. ret = ARM_DRIVER_ERROR;
  569. break;
  570. }
  571. return ret;
  572. }
  573. static int32_t LPI2C_InterruptGetDataCount(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  574. {
  575. size_t cnt;
  576. if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
  577. {
  578. /* In slave mode */
  579. (void)LPI2C_SlaveTransferGetCount(lpi2c->resource->base, &lpi2c->handle->slave_handle, &cnt);
  580. }
  581. else
  582. {
  583. /* In master mode */
  584. (void)LPI2C_MasterTransferGetCount(lpi2c->resource->base, &lpi2c->handle->master_handle, &cnt);
  585. }
  586. return (int32_t)cnt;
  587. }
  588. static int32_t LPI2C_InterruptControl(uint32_t control, uint32_t arg, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  589. {
  590. uint32_t baudRate_Bps;
  591. int32_t result = ARM_DRIVER_OK;
  592. switch (control)
  593. {
  594. case ARM_I2C_OWN_ADDRESS:
  595. /* Set Own Slave Address */
  596. lpi2c->resource->base->SAMR = (arg << 1U);
  597. break;
  598. case ARM_I2C_BUS_SPEED:
  599. /* Set Bus Speed */
  600. switch (arg)
  601. {
  602. case ARM_I2C_BUS_SPEED_STANDARD:
  603. baudRate_Bps = 100000;
  604. break;
  605. case ARM_I2C_BUS_SPEED_FAST:
  606. baudRate_Bps = 400000;
  607. break;
  608. case ARM_I2C_BUS_SPEED_FAST_PLUS:
  609. baudRate_Bps = 1000000;
  610. break;
  611. default:
  612. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  613. break;
  614. }
  615. if (result == ARM_DRIVER_OK)
  616. {
  617. LPI2C_MasterSetBaudRate(lpi2c->resource->base, lpi2c->resource->GetFreq(), baudRate_Bps);
  618. }
  619. break;
  620. /* Not supported. */
  621. case ARM_I2C_BUS_CLEAR:
  622. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  623. break;
  624. /* Only support aborting data transfer when master transmit(in master mode) or slave receive(in slave mode) */
  625. case ARM_I2C_ABORT_TRANSFER:
  626. /* Abort data transfer when slave receive(in slave mode) */
  627. if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
  628. {
  629. /* Disable slave mode */
  630. lpi2c->resource->base->SCR = 0U;
  631. /* Diable slave interrupt */
  632. LPI2C_SlaveTransferAbort(lpi2c->resource->base, &(lpi2c->handle->slave_handle));
  633. /* Enable slave mode */
  634. lpi2c->resource->base->SCR = 0x31U;
  635. }
  636. /* Bort data transfer when master transmit abort(in master mode) */
  637. if ((lpi2c->resource->base->MIER & (uint32_t)kLPI2C_MasterIrqFlags) == (uint32_t)kLPI2C_MasterIrqFlags)
  638. {
  639. /* Disable master interrupt and send stop */
  640. LPI2C_MasterTransferAbort(lpi2c->resource->base, &(lpi2c->handle->master_handle));
  641. lpi2c->handle->master_handle.remainingBytes = 0;
  642. lpi2c->handle->master_handle.transfer.data = NULL;
  643. lpi2c->handle->master_handle.transfer.dataSize = 0;
  644. }
  645. result = ARM_DRIVER_OK;
  646. break;
  647. default:
  648. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  649. break;
  650. }
  651. return result;
  652. }
  653. static int32_t LPI2C_InterruptPowerControl(ARM_POWER_STATE state, cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  654. {
  655. int32_t result = ARM_DRIVER_OK;
  656. lpi2c_slave_config_t slaveConfig;
  657. lpi2c_master_config_t masterConfig;
  658. switch (state)
  659. {
  660. case ARM_POWER_OFF:
  661. if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
  662. {
  663. /* Terminates any pending data transfers */
  664. (void)LPI2C_InterruptControl(ARM_I2C_ABORT_TRANSFER, 0, lpi2c);
  665. /* Disables peripheral */
  666. LPI2C_MasterDeinit(lpi2c->resource->base);
  667. lpi2c->flags = (uint8_t)I2C_FLAG_INIT;
  668. }
  669. break;
  670. case ARM_POWER_LOW:
  671. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  672. break;
  673. case ARM_POWER_FULL:
  674. if (lpi2c->flags == (uint8_t)I2C_FLAG_UNINIT)
  675. {
  676. result = ARM_DRIVER_ERROR;
  677. break;
  678. }
  679. if ((lpi2c->flags & (uint8_t)I2C_FLAG_POWER) != 0U)
  680. {
  681. /* Driver already powered */
  682. break;
  683. }
  684. /*
  685. * slaveConfig.address0 = 0U;
  686. * slaveConfig.address1 = 0U;
  687. * slaveConfig.addressMatchMode = kLPI2C_MatchAddress0;
  688. * slaveConfig.filterDozeEnable = true;
  689. * slaveConfig.filterEnable = true;
  690. * slaveConfig.enableGeneralCall = false;
  691. * slaveConfig.ignoreAck = false;
  692. * slaveConfig.enableReceivedAddressRead = false;
  693. * slaveConfig.sdaGlitchFilterWidth_ns = 0;
  694. * slaveConfig.sclGlitchFilterWidth_ns = 0;
  695. * slaveConfig.dataValidDelay_ns = 0;
  696. * slaveConfig.clockHoldTime_ns = 0;
  697. */
  698. LPI2C_SlaveGetDefaultConfig(&slaveConfig);
  699. /* Initialize the LPI2C slave peripheral */
  700. LPI2C_SlaveInit(lpi2c->resource->base, &slaveConfig, lpi2c->resource->GetFreq());
  701. /*
  702. * masterConfig.debugEnable = false;
  703. * masterConfig.ignoreAck = false;
  704. * masterConfig.pinConfig = kLPI2C_2PinOpenDrain;
  705. * masterConfig.baudRate_Hz = 100000U;
  706. * masterConfig.busIdleTimeout_ns = 0;
  707. * masterConfig.pinLowTimeout_ns = 0;
  708. * masterConfig.sdaGlitchFilterWidth_ns = 0;
  709. * masterConfig.sclGlitchFilterWidth_ns = 0;
  710. */
  711. LPI2C_MasterGetDefaultConfig(&masterConfig);
  712. /* Initialize the LPI2C master peripheral */
  713. LPI2C_MasterInit(lpi2c->resource->base, &masterConfig, lpi2c->resource->GetFreq());
  714. lpi2c->flags |= (uint8_t)I2C_FLAG_POWER;
  715. break;
  716. default:
  717. result = ARM_DRIVER_ERROR_UNSUPPORTED;
  718. break;
  719. }
  720. return result;
  721. }
  722. static ARM_I2C_STATUS LPI2C_InterruptGetStatus(cmsis_lpi2c_interrupt_driver_state_t *lpi2c)
  723. {
  724. ARM_I2C_STATUS stat = {0};
  725. uint32_t ksdk_lpi2c_master_status = LPI2C_MasterGetStatusFlags(lpi2c->resource->base);
  726. uint32_t ksdk_lpi2c_slave_status = LPI2C_SlaveGetStatusFlags(lpi2c->resource->base);
  727. /* Busy flag */
  728. stat.busy = (uint32_t)(((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterBusyFlag) != 0U) ||
  729. ((ksdk_lpi2c_slave_status & (uint32_t)kLPI2C_SlaveBusyFlag) != 0U));
  730. /* Mode: 0=Slave, 1=Master */
  731. if ((lpi2c->resource->base->SIER & (uint32_t)kLPI2C_SlaveIrqFlags) == (uint32_t)kLPI2C_SlaveIrqFlags)
  732. {
  733. stat.mode = 0UL;
  734. }
  735. else
  736. {
  737. stat.mode = 1UL;
  738. }
  739. /* Direction: 0=Transmitter, 1=Receiver */
  740. stat.direction = (uint32_t)lpi2c->handle->master_handle.transfer.direction;
  741. /* Master lost arbitration */
  742. stat.arbitration_lost = (uint32_t)((ksdk_lpi2c_master_status & (uint32_t)kLPI2C_MasterArbitrationLostFlag) != 0U);
  743. return stat;
  744. }
  745. #endif
  746. #if defined(LPI2C0) && defined(RTE_I2C0) && RTE_I2C0
  747. /* User needs to provide the implementation for LPI2C0_GetFreq/InitPins/DeinitPins
  748. in the application for enabling according instance. */
  749. extern uint32_t LPI2C0_GetFreq(void);
  750. static cmsis_lpi2c_resource_t LPI2C0_Resource = {LPI2C0, LPI2C0_GetFreq};
  751. #if defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN
  752. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  753. static cmsis_lpi2c_edma_resource_t LPI2C0_EdmaResource = {
  754. RTE_I2C0_DMA_TX_DMA_BASE, RTE_I2C0_DMA_TX_CH, RTE_I2C0_DMA_TX_PERI_SEL,
  755. RTE_I2C0_DMA_RX_DMA_BASE, RTE_I2C0_DMA_RX_CH, RTE_I2C0_DMA_RX_PERI_SEL,
  756. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  757. RTE_I2C0_DMA_TX_DMAMUX_BASE, RTE_I2C0_DMA_RX_DMAMUX_BASE,
  758. #endif
  759. };
  760. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C0_EdmaHandle);
  761. static edma_handle_t LPI2C0_EdmaTxHandle;
  762. static edma_handle_t LPI2C0_EdmaRxHandle;
  763. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  764. ARMCC_SECTION("lpi2c0_edma_driver_state")
  765. static cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
  766. #else
  767. static cmsis_lpi2c_edma_driver_state_t LPI2C0_EdmaDriverState = {
  768. #endif
  769. &LPI2C0_Resource, &LPI2C0_EdmaResource, &LPI2C0_EdmaHandle, &LPI2C0_EdmaTxHandle, &LPI2C0_EdmaRxHandle,
  770. };
  771. static int32_t LPI2C0_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  772. {
  773. #ifdef RTE_I2C0_PIN_INIT
  774. RTE_I2C0_PIN_INIT();
  775. #endif
  776. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C0_EdmaDriverState);
  777. }
  778. static int32_t LPI2C0_Master_EdmaUninitialize(void)
  779. {
  780. #ifdef RTE_I2C0_PIN_DEINIT
  781. RTE_I2C0_PIN_DEINIT();
  782. #endif
  783. return LPI2C_Master_EdmaUninitialize(&LPI2C0_EdmaDriverState);
  784. }
  785. static int32_t LPI2C0_Master_EdmaPowerControl(ARM_POWER_STATE state)
  786. {
  787. return LPI2C_Master_EdmaPowerControl(state, &LPI2C0_EdmaDriverState);
  788. }
  789. static int32_t LPI2C0_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  790. {
  791. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
  792. }
  793. static int32_t LPI2C0_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  794. {
  795. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C0_EdmaDriverState);
  796. }
  797. static int32_t LPI2C0_Master_EdmaGetDataCount(void)
  798. {
  799. return LPI2C_Master_EdmaGetDataCount(&LPI2C0_EdmaDriverState);
  800. }
  801. static int32_t LPI2C0_Master_EdmaControl(uint32_t control, uint32_t arg)
  802. {
  803. return LPI2C_Master_EdmaControl(control, arg, &LPI2C0_EdmaDriverState);
  804. }
  805. static ARM_I2C_STATUS LPI2C0_Master_EdmaGetStatus(void)
  806. {
  807. return LPI2C_Master_EdmaGetStatus(&LPI2C0_EdmaDriverState);
  808. }
  809. #endif
  810. #else
  811. static cmsis_i2c_handle_t LPI2C0_Handle;
  812. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  813. ARMCC_SECTION("lpi2c0_interrupt_driver_state")
  814. static cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
  815. #else
  816. static cmsis_lpi2c_interrupt_driver_state_t LPI2C0_InterruptDriverState = {
  817. #endif
  818. &LPI2C0_Resource,
  819. &LPI2C0_Handle,
  820. };
  821. static void KSDK_LPI2C0_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  822. {
  823. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C0_InterruptDriverState);
  824. }
  825. static int32_t LPI2C0_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  826. {
  827. #ifdef RTE_I2C0_PIN_INIT
  828. RTE_I2C0_PIN_INIT();
  829. #endif
  830. return LPI2C_InterruptInitialize(cb_event, &LPI2C0_InterruptDriverState);
  831. }
  832. static int32_t LPI2C0_InterruptUninitialize(void)
  833. {
  834. #ifdef RTE_I2C0_PIN_DEINIT
  835. RTE_I2C0_PIN_DEINIT();
  836. #endif
  837. return LPI2C_InterruptUninitialize(&LPI2C0_InterruptDriverState);
  838. }
  839. static int32_t LPI2C0_InterruptPowerControl(ARM_POWER_STATE state)
  840. {
  841. return LPI2C_InterruptPowerControl(state, &LPI2C0_InterruptDriverState);
  842. }
  843. static int32_t LPI2C0_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  844. {
  845. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
  846. }
  847. static int32_t LPI2C0_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  848. {
  849. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C0_InterruptDriverState);
  850. }
  851. static int32_t LPI2C0_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  852. {
  853. LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
  854. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C0_InterruptDriverState);
  855. }
  856. static int32_t LPI2C0_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  857. {
  858. LPI2C0_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C0_SLAVE_InterruptCallback;
  859. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C0_InterruptDriverState);
  860. }
  861. static int32_t LPI2C0_InterruptGetDataCount(void)
  862. {
  863. return LPI2C_InterruptGetDataCount(&LPI2C0_InterruptDriverState);
  864. }
  865. static int32_t LPI2C0_InterruptControl(uint32_t control, uint32_t arg)
  866. {
  867. return LPI2C_InterruptControl(control, arg, &LPI2C0_InterruptDriverState);
  868. }
  869. static ARM_I2C_STATUS LPI2C0_InterruptGetStatus(void)
  870. {
  871. return LPI2C_InterruptGetStatus(&LPI2C0_InterruptDriverState);
  872. }
  873. #endif
  874. ARM_DRIVER_I2C Driver_I2C0 = {LPI2Cx_GetVersion,
  875. LPI2Cx_GetCapabilities,
  876. #if defined(RTE_I2C0_DMA_EN) && RTE_I2C0_DMA_EN
  877. LPI2C0_Master_EdmaInitialize,
  878. LPI2C0_Master_EdmaUninitialize,
  879. LPI2C0_Master_EdmaPowerControl,
  880. LPI2C0_Master_EdmaTransmit,
  881. LPI2C0_Master_EdmaReceive,
  882. NULL,
  883. NULL,
  884. LPI2C0_Master_EdmaGetDataCount,
  885. LPI2C0_Master_EdmaControl,
  886. LPI2C0_Master_EdmaGetStatus
  887. #else
  888. LPI2C0_InterruptInitialize,
  889. LPI2C0_InterruptUninitialize,
  890. LPI2C0_InterruptPowerControl,
  891. LPI2C0_Master_InterruptTransmit,
  892. LPI2C0_Master_InterruptReceive,
  893. LPI2C0_Slave_InterruptTransmit,
  894. LPI2C0_Slave_InterruptReceive,
  895. LPI2C0_InterruptGetDataCount,
  896. LPI2C0_InterruptControl,
  897. LPI2C0_InterruptGetStatus
  898. #endif
  899. };
  900. #endif
  901. #if defined(LPI2C1) && defined(RTE_I2C1) && RTE_I2C1
  902. /* User needs to provide the implementation for LPI2C1_GetFreq/InitPins/DeinitPins
  903. in the application for enabling according instance. */
  904. extern uint32_t LPI2C1_GetFreq(void);
  905. static cmsis_lpi2c_resource_t LPI2C1_Resource = {LPI2C1, LPI2C1_GetFreq};
  906. #if defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN
  907. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  908. static cmsis_lpi2c_edma_resource_t LPI2C1_EdmaResource = {
  909. RTE_I2C1_DMA_TX_DMA_BASE, RTE_I2C1_DMA_TX_CH, RTE_I2C1_DMA_TX_PERI_SEL,
  910. RTE_I2C1_DMA_RX_DMA_BASE, RTE_I2C1_DMA_RX_CH, RTE_I2C1_DMA_RX_PERI_SEL,
  911. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  912. RTE_I2C1_DMA_TX_DMAMUX_BASE, RTE_I2C1_DMA_RX_DMAMUX_BASE,
  913. #endif
  914. };
  915. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C1_EdmaHandle);
  916. static edma_handle_t LPI2C1_EdmaTxHandle;
  917. static edma_handle_t LPI2C1_EdmaRxHandle;
  918. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  919. ARMCC_SECTION("lpi2c1_edma_driver_state")
  920. static cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
  921. #else
  922. static cmsis_lpi2c_edma_driver_state_t LPI2C1_EdmaDriverState = {
  923. #endif
  924. &LPI2C1_Resource, &LPI2C1_EdmaResource, &LPI2C1_EdmaHandle, &LPI2C1_EdmaTxHandle, &LPI2C1_EdmaRxHandle,
  925. };
  926. static int32_t LPI2C1_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  927. {
  928. #ifdef RTE_I2C1_PIN_INIT
  929. RTE_I2C1_PIN_INIT();
  930. #endif
  931. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C1_EdmaDriverState);
  932. }
  933. static int32_t LPI2C1_Master_EdmaUninitialize(void)
  934. {
  935. #ifdef RTE_I2C1_PIN_DEINIT
  936. RTE_I2C1_PIN_DEINIT();
  937. #endif
  938. return LPI2C_Master_EdmaUninitialize(&LPI2C1_EdmaDriverState);
  939. }
  940. static int32_t LPI2C1_Master_EdmaPowerControl(ARM_POWER_STATE state)
  941. {
  942. return LPI2C_Master_EdmaPowerControl(state, &LPI2C1_EdmaDriverState);
  943. }
  944. static int32_t LPI2C1_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  945. {
  946. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
  947. }
  948. static int32_t LPI2C1_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  949. {
  950. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C1_EdmaDriverState);
  951. }
  952. static int32_t LPI2C1_Master_EdmaGetDataCount(void)
  953. {
  954. return LPI2C_Master_EdmaGetDataCount(&LPI2C1_EdmaDriverState);
  955. }
  956. static int32_t LPI2C1_Master_EdmaControl(uint32_t control, uint32_t arg)
  957. {
  958. return LPI2C_Master_EdmaControl(control, arg, &LPI2C1_EdmaDriverState);
  959. }
  960. static ARM_I2C_STATUS LPI2C1_Master_EdmaGetStatus(void)
  961. {
  962. return LPI2C_Master_EdmaGetStatus(&LPI2C1_EdmaDriverState);
  963. }
  964. #endif
  965. #else
  966. static cmsis_i2c_handle_t LPI2C1_Handle;
  967. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  968. ARMCC_SECTION("lpi2c1_interrupt_driver_state")
  969. static cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
  970. #else
  971. static cmsis_lpi2c_interrupt_driver_state_t LPI2C1_InterruptDriverState = {
  972. #endif
  973. &LPI2C1_Resource,
  974. &LPI2C1_Handle,
  975. };
  976. static void KSDK_LPI2C1_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  977. {
  978. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C1_InterruptDriverState);
  979. }
  980. static int32_t LPI2C1_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  981. {
  982. #ifdef RTE_I2C1_PIN_INIT
  983. RTE_I2C1_PIN_INIT();
  984. #endif
  985. return LPI2C_InterruptInitialize(cb_event, &LPI2C1_InterruptDriverState);
  986. }
  987. static int32_t LPI2C1_InterruptUninitialize(void)
  988. {
  989. #ifdef RTE_I2C1_PIN_DEINIT
  990. RTE_I2C1_PIN_DEINIT();
  991. #endif
  992. return LPI2C_InterruptUninitialize(&LPI2C1_InterruptDriverState);
  993. }
  994. static int32_t LPI2C1_InterruptPowerControl(ARM_POWER_STATE state)
  995. {
  996. return LPI2C_InterruptPowerControl(state, &LPI2C1_InterruptDriverState);
  997. }
  998. static int32_t LPI2C1_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  999. {
  1000. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
  1001. }
  1002. static int32_t LPI2C1_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1003. {
  1004. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C1_InterruptDriverState);
  1005. }
  1006. static int32_t LPI2C1_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1007. {
  1008. LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
  1009. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C1_InterruptDriverState);
  1010. }
  1011. static int32_t LPI2C1_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1012. {
  1013. LPI2C1_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C1_SLAVE_InterruptCallback;
  1014. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C1_InterruptDriverState);
  1015. }
  1016. static int32_t LPI2C1_InterruptGetDataCount(void)
  1017. {
  1018. return LPI2C_InterruptGetDataCount(&LPI2C1_InterruptDriverState);
  1019. }
  1020. static int32_t LPI2C1_InterruptControl(uint32_t control, uint32_t arg)
  1021. {
  1022. return LPI2C_InterruptControl(control, arg, &LPI2C1_InterruptDriverState);
  1023. }
  1024. static ARM_I2C_STATUS LPI2C1_InterruptGetStatus(void)
  1025. {
  1026. return LPI2C_InterruptGetStatus(&LPI2C1_InterruptDriverState);
  1027. }
  1028. #endif
  1029. ARM_DRIVER_I2C Driver_I2C1 = {LPI2Cx_GetVersion,
  1030. LPI2Cx_GetCapabilities,
  1031. #if defined(RTE_I2C1_DMA_EN) && RTE_I2C1_DMA_EN
  1032. LPI2C1_Master_EdmaInitialize,
  1033. LPI2C1_Master_EdmaUninitialize,
  1034. LPI2C1_Master_EdmaPowerControl,
  1035. LPI2C1_Master_EdmaTransmit,
  1036. LPI2C1_Master_EdmaReceive,
  1037. NULL,
  1038. NULL,
  1039. LPI2C1_Master_EdmaGetDataCount,
  1040. LPI2C1_Master_EdmaControl,
  1041. LPI2C1_Master_EdmaGetStatus
  1042. #else
  1043. LPI2C1_InterruptInitialize,
  1044. LPI2C1_InterruptUninitialize,
  1045. LPI2C1_InterruptPowerControl,
  1046. LPI2C1_Master_InterruptTransmit,
  1047. LPI2C1_Master_InterruptReceive,
  1048. LPI2C1_Slave_InterruptTransmit,
  1049. LPI2C1_Slave_InterruptReceive,
  1050. LPI2C1_InterruptGetDataCount,
  1051. LPI2C1_InterruptControl,
  1052. LPI2C1_InterruptGetStatus
  1053. #endif
  1054. };
  1055. #endif
  1056. #if defined(LPI2C2) && defined(RTE_I2C2) && RTE_I2C2
  1057. /* User needs to provide the implementation for LPI2C2_GetFreq/InitPins/DeinitPins
  1058. in the application for enabling according instance. */
  1059. extern uint32_t LPI2C2_GetFreq(void);
  1060. static cmsis_lpi2c_resource_t LPI2C2_Resource = {LPI2C2, LPI2C2_GetFreq};
  1061. #if defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN
  1062. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1063. static cmsis_lpi2c_edma_resource_t LPI2C2_EdmaResource = {
  1064. RTE_I2C2_DMA_TX_DMA_BASE, RTE_I2C2_DMA_TX_CH, RTE_I2C2_DMA_TX_PERI_SEL,
  1065. RTE_I2C2_DMA_RX_DMA_BASE, RTE_I2C2_DMA_RX_CH, RTE_I2C2_DMA_RX_PERI_SEL,
  1066. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1067. RTE_I2C2_DMA_TX_DMAMUX_BASE, RTE_I2C2_DMA_RX_DMAMUX_BASE,
  1068. #endif
  1069. };
  1070. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C2_EdmaHandle);
  1071. static edma_handle_t LPI2C2_EdmaTxHandle;
  1072. static edma_handle_t LPI2C2_EdmaRxHandle;
  1073. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1074. ARMCC_SECTION("lpi2c2_edma_driver_state")
  1075. static cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
  1076. #else
  1077. static cmsis_lpi2c_edma_driver_state_t LPI2C2_EdmaDriverState = {
  1078. #endif
  1079. &LPI2C2_Resource, &LPI2C2_EdmaResource, &LPI2C2_EdmaHandle, &LPI2C2_EdmaTxHandle, &LPI2C2_EdmaRxHandle,
  1080. };
  1081. static int32_t LPI2C2_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1082. {
  1083. #ifdef RTE_I2C2_PIN_INIT
  1084. RTE_I2C2_PIN_INIT();
  1085. #endif
  1086. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C2_EdmaDriverState);
  1087. }
  1088. static int32_t LPI2C2_Master_EdmaUninitialize(void)
  1089. {
  1090. #ifdef RTE_I2C2_PIN_DEINIT
  1091. RTE_I2C2_PIN_DEINIT();
  1092. #endif
  1093. return LPI2C_Master_EdmaUninitialize(&LPI2C2_EdmaDriverState);
  1094. }
  1095. static int32_t LPI2C2_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1096. {
  1097. return LPI2C_Master_EdmaPowerControl(state, &LPI2C2_EdmaDriverState);
  1098. }
  1099. static int32_t LPI2C2_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1100. {
  1101. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
  1102. }
  1103. static int32_t LPI2C2_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1104. {
  1105. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C2_EdmaDriverState);
  1106. }
  1107. static int32_t LPI2C2_Master_EdmaGetDataCount(void)
  1108. {
  1109. return LPI2C_Master_EdmaGetDataCount(&LPI2C2_EdmaDriverState);
  1110. }
  1111. static int32_t LPI2C2_Master_EdmaControl(uint32_t control, uint32_t arg)
  1112. {
  1113. return LPI2C_Master_EdmaControl(control, arg, &LPI2C2_EdmaDriverState);
  1114. }
  1115. static ARM_I2C_STATUS LPI2C2_Master_EdmaGetStatus(void)
  1116. {
  1117. return LPI2C_Master_EdmaGetStatus(&LPI2C2_EdmaDriverState);
  1118. }
  1119. #endif
  1120. #else
  1121. static cmsis_i2c_handle_t LPI2C2_Handle;
  1122. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1123. ARMCC_SECTION("lpi2c2_interrupt_driver_state")
  1124. static cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
  1125. #else
  1126. static cmsis_lpi2c_interrupt_driver_state_t LPI2C2_InterruptDriverState = {
  1127. #endif
  1128. &LPI2C2_Resource,
  1129. &LPI2C2_Handle,
  1130. };
  1131. static void KSDK_LPI2C2_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1132. {
  1133. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C2_InterruptDriverState);
  1134. }
  1135. static int32_t LPI2C2_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1136. {
  1137. #ifdef RTE_I2C2_PIN_INIT
  1138. RTE_I2C2_PIN_INIT();
  1139. #endif
  1140. return LPI2C_InterruptInitialize(cb_event, &LPI2C2_InterruptDriverState);
  1141. }
  1142. static int32_t LPI2C2_InterruptUninitialize(void)
  1143. {
  1144. #ifdef RTE_I2C2_PIN_DEINIT
  1145. RTE_I2C2_PIN_DEINIT();
  1146. #endif
  1147. return LPI2C_InterruptUninitialize(&LPI2C2_InterruptDriverState);
  1148. }
  1149. static int32_t LPI2C2_InterruptPowerControl(ARM_POWER_STATE state)
  1150. {
  1151. return LPI2C_InterruptPowerControl(state, &LPI2C2_InterruptDriverState);
  1152. }
  1153. static int32_t LPI2C2_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1154. {
  1155. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
  1156. }
  1157. static int32_t LPI2C2_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1158. {
  1159. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C2_InterruptDriverState);
  1160. }
  1161. static int32_t LPI2C2_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1162. {
  1163. LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
  1164. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C2_InterruptDriverState);
  1165. }
  1166. static int32_t LPI2C2_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1167. {
  1168. LPI2C2_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C2_SLAVE_InterruptCallback;
  1169. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C2_InterruptDriverState);
  1170. }
  1171. static int32_t LPI2C2_InterruptGetDataCount(void)
  1172. {
  1173. return LPI2C_InterruptGetDataCount(&LPI2C2_InterruptDriverState);
  1174. }
  1175. static int32_t LPI2C2_InterruptControl(uint32_t control, uint32_t arg)
  1176. {
  1177. return LPI2C_InterruptControl(control, arg, &LPI2C2_InterruptDriverState);
  1178. }
  1179. static ARM_I2C_STATUS LPI2C2_InterruptGetStatus(void)
  1180. {
  1181. return LPI2C_InterruptGetStatus(&LPI2C2_InterruptDriverState);
  1182. }
  1183. #endif
  1184. ARM_DRIVER_I2C Driver_I2C2 = {LPI2Cx_GetVersion,
  1185. LPI2Cx_GetCapabilities,
  1186. #if defined(RTE_I2C2_DMA_EN) && RTE_I2C2_DMA_EN
  1187. LPI2C2_Master_EdmaInitialize,
  1188. LPI2C2_Master_EdmaUninitialize,
  1189. LPI2C2_Master_EdmaPowerControl,
  1190. LPI2C2_Master_EdmaTransmit,
  1191. LPI2C2_Master_EdmaReceive,
  1192. NULL,
  1193. NULL,
  1194. LPI2C2_Master_EdmaGetDataCount,
  1195. LPI2C2_Master_EdmaControl,
  1196. LPI2C2_Master_EdmaGetStatus
  1197. #else
  1198. LPI2C2_InterruptInitialize,
  1199. LPI2C2_InterruptUninitialize,
  1200. LPI2C2_InterruptPowerControl,
  1201. LPI2C2_Master_InterruptTransmit,
  1202. LPI2C2_Master_InterruptReceive,
  1203. LPI2C2_Slave_InterruptTransmit,
  1204. LPI2C2_Slave_InterruptReceive,
  1205. LPI2C2_InterruptGetDataCount,
  1206. LPI2C2_InterruptControl,
  1207. LPI2C2_InterruptGetStatus
  1208. #endif
  1209. };
  1210. #endif
  1211. #if defined(LPI2C3) && defined(RTE_I2C3) && RTE_I2C3
  1212. /* User needs to provide the implementation for LPI2C3_GetFreq/InitPins/DeinitPins
  1213. in the application for enabling according instance. */
  1214. extern uint32_t LPI2C3_GetFreq(void);
  1215. static cmsis_lpi2c_resource_t LPI2C3_Resource = {LPI2C3, LPI2C3_GetFreq};
  1216. #if defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN
  1217. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1218. static cmsis_lpi2c_edma_resource_t LPI2C3_EdmaResource = {
  1219. RTE_I2C3_DMA_TX_DMA_BASE, RTE_I2C3_DMA_TX_CH, RTE_I2C3_DMA_TX_PERI_SEL,
  1220. RTE_I2C3_DMA_RX_DMA_BASE, RTE_I2C3_DMA_RX_CH, RTE_I2C3_DMA_RX_PERI_SEL,
  1221. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1222. RTE_I2C3_DMA_TX_DMAMUX_BASE, RTE_I2C3_DMA_RX_DMAMUX_BASE,
  1223. #endif
  1224. };
  1225. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C3_EdmaHandle);
  1226. static edma_handle_t LPI2C3_EdmaTxHandle;
  1227. static edma_handle_t LPI2C3_EdmaRxHandle;
  1228. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1229. ARMCC_SECTION("lpi2c3_edma_driver_state")
  1230. static cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
  1231. #else
  1232. static cmsis_lpi2c_edma_driver_state_t LPI2C3_EdmaDriverState = {
  1233. #endif
  1234. &LPI2C3_Resource, &LPI2C3_EdmaResource, &LPI2C3_EdmaHandle, &LPI2C3_EdmaTxHandle, &LPI2C3_EdmaRxHandle,
  1235. };
  1236. static int32_t LPI2C3_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1237. {
  1238. #ifdef RTE_I2C3_PIN_INIT
  1239. RTE_I2C3_PIN_INIT();
  1240. #endif
  1241. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C3_EdmaDriverState);
  1242. }
  1243. static int32_t LPI2C3_Master_EdmaUninitialize(void)
  1244. {
  1245. #ifdef RTE_I2C3_PIN_DEINIT
  1246. RTE_I2C3_PIN_DEINIT();
  1247. #endif
  1248. return LPI2C_Master_EdmaUninitialize(&LPI2C3_EdmaDriverState);
  1249. }
  1250. static int32_t LPI2C3_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1251. {
  1252. return LPI2C_Master_EdmaPowerControl(state, &LPI2C3_EdmaDriverState);
  1253. }
  1254. static int32_t LPI2C3_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1255. {
  1256. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
  1257. }
  1258. static int32_t LPI2C3_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1259. {
  1260. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C3_EdmaDriverState);
  1261. }
  1262. static int32_t LPI2C3_Master_EdmaGetDataCount(void)
  1263. {
  1264. return LPI2C_Master_EdmaGetDataCount(&LPI2C3_EdmaDriverState);
  1265. }
  1266. static int32_t LPI2C3_Master_EdmaControl(uint32_t control, uint32_t arg)
  1267. {
  1268. return LPI2C_Master_EdmaControl(control, arg, &LPI2C3_EdmaDriverState);
  1269. }
  1270. static ARM_I2C_STATUS LPI2C3_Master_EdmaGetStatus(void)
  1271. {
  1272. return LPI2C_Master_EdmaGetStatus(&LPI2C3_EdmaDriverState);
  1273. }
  1274. #endif
  1275. #else
  1276. static cmsis_i2c_handle_t LPI2C3_Handle;
  1277. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1278. ARMCC_SECTION("lpi2c3_interrupt_driver_state")
  1279. static cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
  1280. #else
  1281. static cmsis_lpi2c_interrupt_driver_state_t LPI2C3_InterruptDriverState = {
  1282. #endif
  1283. &LPI2C3_Resource,
  1284. &LPI2C3_Handle,
  1285. };
  1286. static void KSDK_LPI2C3_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1287. {
  1288. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C3_InterruptDriverState);
  1289. }
  1290. static int32_t LPI2C3_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1291. {
  1292. #ifdef RTE_I2C3_PIN_INIT
  1293. RTE_I2C3_PIN_INIT();
  1294. #endif
  1295. return LPI2C_InterruptInitialize(cb_event, &LPI2C3_InterruptDriverState);
  1296. }
  1297. static int32_t LPI2C3_InterruptUninitialize(void)
  1298. {
  1299. #ifdef RTE_I2C3_PIN_DEINIT
  1300. RTE_I2C3_PIN_DEINIT();
  1301. #endif
  1302. return LPI2C_InterruptUninitialize(&LPI2C3_InterruptDriverState);
  1303. }
  1304. static int32_t LPI2C3_InterruptPowerControl(ARM_POWER_STATE state)
  1305. {
  1306. return LPI2C_InterruptPowerControl(state, &LPI2C3_InterruptDriverState);
  1307. }
  1308. static int32_t LPI2C3_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1309. {
  1310. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
  1311. }
  1312. static int32_t LPI2C3_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1313. {
  1314. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C3_InterruptDriverState);
  1315. }
  1316. static int32_t LPI2C3_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1317. {
  1318. LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
  1319. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C3_InterruptDriverState);
  1320. }
  1321. static int32_t LPI2C3_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1322. {
  1323. LPI2C3_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C3_SLAVE_InterruptCallback;
  1324. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C3_InterruptDriverState);
  1325. }
  1326. static int32_t LPI2C3_InterruptGetDataCount(void)
  1327. {
  1328. return LPI2C_InterruptGetDataCount(&LPI2C3_InterruptDriverState);
  1329. }
  1330. static int32_t LPI2C3_InterruptControl(uint32_t control, uint32_t arg)
  1331. {
  1332. return LPI2C_InterruptControl(control, arg, &LPI2C3_InterruptDriverState);
  1333. }
  1334. static ARM_I2C_STATUS LPI2C3_InterruptGetStatus(void)
  1335. {
  1336. return LPI2C_InterruptGetStatus(&LPI2C3_InterruptDriverState);
  1337. }
  1338. #endif /* RTE_I2C3_DMA_EN */
  1339. ARM_DRIVER_I2C Driver_I2C3 = {LPI2Cx_GetVersion,
  1340. LPI2Cx_GetCapabilities,
  1341. #if defined(RTE_I2C3_DMA_EN) && RTE_I2C3_DMA_EN
  1342. LPI2C3_Master_EdmaInitialize,
  1343. LPI2C3_Master_EdmaUninitialize,
  1344. LPI2C3_Master_EdmaPowerControl,
  1345. LPI2C3_Master_EdmaTransmit,
  1346. LPI2C3_Master_EdmaReceive,
  1347. NULL,
  1348. NULL,
  1349. LPI2C3_Master_EdmaGetDataCount,
  1350. LPI2C3_Master_EdmaControl,
  1351. LPI2C3_Master_EdmaGetStatus
  1352. #else
  1353. LPI2C3_InterruptInitialize,
  1354. LPI2C3_InterruptUninitialize,
  1355. LPI2C3_InterruptPowerControl,
  1356. LPI2C3_Master_InterruptTransmit,
  1357. LPI2C3_Master_InterruptReceive,
  1358. LPI2C3_Slave_InterruptTransmit,
  1359. LPI2C3_Slave_InterruptReceive,
  1360. LPI2C3_InterruptGetDataCount,
  1361. LPI2C3_InterruptControl,
  1362. LPI2C3_InterruptGetStatus
  1363. #endif /* RTE_I2C3_DMA_EN */
  1364. };
  1365. #endif
  1366. #if defined(LPI2C4) && defined(RTE_I2C4) && RTE_I2C4
  1367. /* User needs to provide the implementation for LPI2C4_GetFreq/InitPins/DeinitPins
  1368. in the application for enabling according instance. */
  1369. extern uint32_t LPI2C4_GetFreq(void);
  1370. static cmsis_lpi2c_resource_t LPI2C4_Resource = {LPI2C4, LPI2C4_GetFreq};
  1371. #if defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN
  1372. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1373. static cmsis_lpi2c_edma_resource_t LPI2C4_EdmaResource = {
  1374. RTE_I2C4_DMA_TX_DMA_BASE, RTE_I2C4_DMA_TX_CH, RTE_I2C4_DMA_TX_PERI_SEL,
  1375. RTE_I2C4_DMA_RX_DMA_BASE, RTE_I2C4_DMA_RX_CH, RTE_I2C4_DMA_RX_PERI_SEL,
  1376. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1377. RTE_I2C4_DMA_TX_DMAMUX_BASE, RTE_I2C4_DMA_RX_DMAMUX_BASE,
  1378. #endif
  1379. };
  1380. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C4_EdmaHandle);
  1381. static edma_handle_t LPI2C4_EdmaTxHandle;
  1382. static edma_handle_t LPI2C4_EdmaRxHandle;
  1383. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1384. ARMCC_SECTION("lpi2c4_edma_driver_state")
  1385. static cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
  1386. #else
  1387. static cmsis_lpi2c_edma_driver_state_t LPI2C4_EdmaDriverState = {
  1388. #endif
  1389. &LPI2C4_Resource, &LPI2C4_EdmaResource, &LPI2C4_EdmaHandle, &LPI2C4_EdmaTxHandle, &LPI2C4_EdmaRxHandle,
  1390. };
  1391. static int32_t LPI2C4_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1392. {
  1393. #ifdef RTE_I2C4_PIN_INIT
  1394. RTE_I2C4_PIN_INIT();
  1395. #endif
  1396. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C4_EdmaDriverState);
  1397. }
  1398. static int32_t LPI2C4_Master_EdmaUninitialize(void)
  1399. {
  1400. #ifdef RTE_I2C4_PIN_DEINIT
  1401. RTE_I2C4_PIN_DEINIT();
  1402. #endif
  1403. return LPI2C_Master_EdmaUninitialize(&LPI2C4_EdmaDriverState);
  1404. }
  1405. static int32_t LPI2C4_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1406. {
  1407. return LPI2C_Master_EdmaPowerControl(state, &LPI2C4_EdmaDriverState);
  1408. }
  1409. static int32_t LPI2C4_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1410. {
  1411. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
  1412. }
  1413. static int32_t LPI2C4_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1414. {
  1415. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C4_EdmaDriverState);
  1416. }
  1417. static int32_t LPI2C4_Master_EdmaGetDataCount(void)
  1418. {
  1419. return LPI2C_Master_EdmaGetDataCount(&LPI2C4_EdmaDriverState);
  1420. }
  1421. static int32_t LPI2C4_Master_EdmaControl(uint32_t control, uint32_t arg)
  1422. {
  1423. return LPI2C_Master_EdmaControl(control, arg, &LPI2C4_EdmaDriverState);
  1424. }
  1425. static ARM_I2C_STATUS LPI2C4_Master_EdmaGetStatus(void)
  1426. {
  1427. return LPI2C_Master_EdmaGetStatus(&LPI2C4_EdmaDriverState);
  1428. }
  1429. #endif
  1430. #else
  1431. static cmsis_i2c_handle_t LPI2C4_Handle;
  1432. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1433. ARMCC_SECTION("lpi2c4_interrupt_driver_state")
  1434. static cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
  1435. #else
  1436. static cmsis_lpi2c_interrupt_driver_state_t LPI2C4_InterruptDriverState = {
  1437. #endif
  1438. &LPI2C4_Resource,
  1439. &LPI2C4_Handle,
  1440. };
  1441. static void KSDK_LPI2C4_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1442. {
  1443. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C4_InterruptDriverState);
  1444. }
  1445. static int32_t LPI2C4_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1446. {
  1447. #ifdef RTE_I2C4_PIN_INIT
  1448. RTE_I2C4_PIN_INIT();
  1449. #endif
  1450. return LPI2C_InterruptInitialize(cb_event, &LPI2C4_InterruptDriverState);
  1451. }
  1452. static int32_t LPI2C4_InterruptUninitialize(void)
  1453. {
  1454. #ifdef RTE_I2C4_PIN_DEINIT
  1455. RTE_I2C4_PIN_DEINIT();
  1456. #endif
  1457. return LPI2C_InterruptUninitialize(&LPI2C4_InterruptDriverState);
  1458. }
  1459. static int32_t LPI2C4_InterruptPowerControl(ARM_POWER_STATE state)
  1460. {
  1461. return LPI2C_InterruptPowerControl(state, &LPI2C4_InterruptDriverState);
  1462. }
  1463. static int32_t LPI2C4_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1464. {
  1465. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
  1466. }
  1467. static int32_t LPI2C4_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1468. {
  1469. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C4_InterruptDriverState);
  1470. }
  1471. static int32_t LPI2C4_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1472. {
  1473. LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
  1474. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C4_InterruptDriverState);
  1475. }
  1476. static int32_t LPI2C4_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1477. {
  1478. LPI2C4_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C4_SLAVE_InterruptCallback;
  1479. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C4_InterruptDriverState);
  1480. }
  1481. static int32_t LPI2C4_InterruptGetDataCount(void)
  1482. {
  1483. return LPI2C_InterruptGetDataCount(&LPI2C4_InterruptDriverState);
  1484. }
  1485. static int32_t LPI2C4_InterruptControl(uint32_t control, uint32_t arg)
  1486. {
  1487. return LPI2C_InterruptControl(control, arg, &LPI2C4_InterruptDriverState);
  1488. }
  1489. static ARM_I2C_STATUS LPI2C4_InterruptGetStatus(void)
  1490. {
  1491. return LPI2C_InterruptGetStatus(&LPI2C4_InterruptDriverState);
  1492. }
  1493. #endif /* RTE_I2C4_DMA_EN */
  1494. ARM_DRIVER_I2C Driver_I2C4 = {LPI2Cx_GetVersion,
  1495. LPI2Cx_GetCapabilities,
  1496. #if defined(RTE_I2C4_DMA_EN) && RTE_I2C4_DMA_EN
  1497. LPI2C4_Master_EdmaInitialize,
  1498. LPI2C4_Master_EdmaUninitialize,
  1499. LPI2C4_Master_EdmaPowerControl,
  1500. LPI2C4_Master_EdmaTransmit,
  1501. LPI2C4_Master_EdmaReceive,
  1502. NULL,
  1503. NULL,
  1504. LPI2C4_Master_EdmaGetDataCount,
  1505. LPI2C4_Master_EdmaControl,
  1506. LPI2C4_Master_EdmaGetStatus
  1507. #else
  1508. LPI2C4_InterruptInitialize,
  1509. LPI2C4_InterruptUninitialize,
  1510. LPI2C4_InterruptPowerControl,
  1511. LPI2C4_Master_InterruptTransmit,
  1512. LPI2C4_Master_InterruptReceive,
  1513. LPI2C4_Slave_InterruptTransmit,
  1514. LPI2C4_Slave_InterruptReceive,
  1515. LPI2C4_InterruptGetDataCount,
  1516. LPI2C4_InterruptControl,
  1517. LPI2C4_InterruptGetStatus
  1518. #endif /* RTE_I2C4_DMA_EN */
  1519. };
  1520. #endif
  1521. #if defined(LPI2C5) && defined(RTE_I2C5) && RTE_I2C5
  1522. /* User needs to provide the implementation for LPI2C5_GetFreq/InitPins/DeinitPins
  1523. in the application for enabling according instance. */
  1524. extern uint32_t LPI2C5_GetFreq(void);
  1525. static cmsis_lpi2c_resource_t LPI2C5_Resource = {LPI2C5, LPI2C5_GetFreq};
  1526. #if defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN
  1527. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1528. static cmsis_lpi2c_edma_resource_t LPI2C5_EdmaResource = {
  1529. RTE_I2C5_DMA_TX_DMA_BASE, RTE_I2C5_DMA_TX_CH, RTE_I2C5_DMA_TX_PERI_SEL,
  1530. RTE_I2C5_DMA_RX_DMA_BASE, RTE_I2C5_DMA_RX_CH, RTE_I2C5_DMA_RX_PERI_SEL,
  1531. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1532. RTE_I2C5_DMA_TX_DMAMUX_BASE, RTE_I2C5_DMA_RX_DMAMUX_BASE,
  1533. #endif
  1534. };
  1535. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C5_EdmaHandle);
  1536. static edma_handle_t LPI2C5_EdmaTxHandle;
  1537. static edma_handle_t LPI2C5_EdmaRxHandle;
  1538. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1539. ARMCC_SECTION("lpi2c5_edma_driver_state")
  1540. static cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
  1541. #else
  1542. static cmsis_lpi2c_edma_driver_state_t LPI2C5_EdmaDriverState = {
  1543. #endif
  1544. &LPI2C5_Resource, &LPI2C5_EdmaResource, &LPI2C5_EdmaHandle, &LPI2C5_EdmaTxHandle, &LPI2C5_EdmaRxHandle,
  1545. };
  1546. static int32_t LPI2C5_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1547. {
  1548. #ifdef RTE_I2C5_PIN_INIT
  1549. RTE_I2C5_PIN_INIT();
  1550. #endif
  1551. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C5_EdmaDriverState);
  1552. }
  1553. static int32_t LPI2C5_Master_EdmaUninitialize(void)
  1554. {
  1555. #ifdef RTE_I2C5_PIN_DEINIT
  1556. RTE_I2C5_PIN_DEINIT();
  1557. #endif
  1558. return LPI2C_Master_EdmaUninitialize(&LPI2C5_EdmaDriverState);
  1559. }
  1560. static int32_t LPI2C5_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1561. {
  1562. return LPI2C_Master_EdmaPowerControl(state, &LPI2C5_EdmaDriverState);
  1563. }
  1564. static int32_t LPI2C5_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1565. {
  1566. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
  1567. }
  1568. static int32_t LPI2C5_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1569. {
  1570. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C5_EdmaDriverState);
  1571. }
  1572. static int32_t LPI2C5_Master_EdmaGetDataCount(void)
  1573. {
  1574. return LPI2C_Master_EdmaGetDataCount(&LPI2C5_EdmaDriverState);
  1575. }
  1576. static int32_t LPI2C5_Master_EdmaControl(uint32_t control, uint32_t arg)
  1577. {
  1578. return LPI2C_Master_EdmaControl(control, arg, &LPI2C5_EdmaDriverState);
  1579. }
  1580. static ARM_I2C_STATUS LPI2C5_Master_EdmaGetStatus(void)
  1581. {
  1582. return LPI2C_Master_EdmaGetStatus(&LPI2C5_EdmaDriverState);
  1583. }
  1584. #endif
  1585. #else
  1586. static cmsis_i2c_handle_t LPI2C5_Handle;
  1587. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1588. ARMCC_SECTION("lpi2c5_interrupt_driver_state")
  1589. static cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
  1590. #else
  1591. static cmsis_lpi2c_interrupt_driver_state_t LPI2C5_InterruptDriverState = {
  1592. #endif
  1593. &LPI2C5_Resource,
  1594. &LPI2C5_Handle,
  1595. };
  1596. static void KSDK_LPI2C5_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1597. {
  1598. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C5_InterruptDriverState);
  1599. }
  1600. static int32_t LPI2C5_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1601. {
  1602. #ifdef RTE_I2C5_PIN_INIT
  1603. RTE_I2C5_PIN_INIT();
  1604. #endif
  1605. return LPI2C_InterruptInitialize(cb_event, &LPI2C5_InterruptDriverState);
  1606. }
  1607. static int32_t LPI2C5_InterruptUninitialize(void)
  1608. {
  1609. #ifdef RTE_I2C5_PIN_DEINIT
  1610. RTE_I2C5_PIN_DEINIT();
  1611. #endif
  1612. return LPI2C_InterruptUninitialize(&LPI2C5_InterruptDriverState);
  1613. }
  1614. static int32_t LPI2C5_InterruptPowerControl(ARM_POWER_STATE state)
  1615. {
  1616. return LPI2C_InterruptPowerControl(state, &LPI2C5_InterruptDriverState);
  1617. }
  1618. static int32_t LPI2C5_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1619. {
  1620. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
  1621. }
  1622. static int32_t LPI2C5_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1623. {
  1624. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C5_InterruptDriverState);
  1625. }
  1626. static int32_t LPI2C5_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1627. {
  1628. LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
  1629. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C5_InterruptDriverState);
  1630. }
  1631. static int32_t LPI2C5_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1632. {
  1633. LPI2C5_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C5_SLAVE_InterruptCallback;
  1634. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C5_InterruptDriverState);
  1635. }
  1636. static int32_t LPI2C5_InterruptGetDataCount(void)
  1637. {
  1638. return LPI2C_InterruptGetDataCount(&LPI2C5_InterruptDriverState);
  1639. }
  1640. static int32_t LPI2C5_InterruptControl(uint32_t control, uint32_t arg)
  1641. {
  1642. return LPI2C_InterruptControl(control, arg, &LPI2C5_InterruptDriverState);
  1643. }
  1644. static ARM_I2C_STATUS LPI2C5_InterruptGetStatus(void)
  1645. {
  1646. return LPI2C_InterruptGetStatus(&LPI2C5_InterruptDriverState);
  1647. }
  1648. #endif /* RTE_I2C5_DMA_EN */
  1649. ARM_DRIVER_I2C Driver_I2C5 = {LPI2Cx_GetVersion,
  1650. LPI2Cx_GetCapabilities,
  1651. #if defined(RTE_I2C5_DMA_EN) && RTE_I2C5_DMA_EN
  1652. LPI2C5_Master_EdmaInitialize,
  1653. LPI2C5_Master_EdmaUninitialize,
  1654. LPI2C5_Master_EdmaPowerControl,
  1655. LPI2C5_Master_EdmaTransmit,
  1656. LPI2C5_Master_EdmaReceive,
  1657. NULL,
  1658. NULL,
  1659. LPI2C5_Master_EdmaGetDataCount,
  1660. LPI2C5_Master_EdmaControl,
  1661. LPI2C5_Master_EdmaGetStatus
  1662. #else
  1663. LPI2C5_InterruptInitialize,
  1664. LPI2C5_InterruptUninitialize,
  1665. LPI2C5_InterruptPowerControl,
  1666. LPI2C5_Master_InterruptTransmit,
  1667. LPI2C5_Master_InterruptReceive,
  1668. LPI2C5_Slave_InterruptTransmit,
  1669. LPI2C5_Slave_InterruptReceive,
  1670. LPI2C5_InterruptGetDataCount,
  1671. LPI2C5_InterruptControl,
  1672. LPI2C5_InterruptGetStatus
  1673. #endif /* RTE_I2C5_DMA_EN */
  1674. };
  1675. #endif /* LPI2C5 */
  1676. #if defined(LPI2C6) && defined(RTE_I2C6) && RTE_I2C6
  1677. /* User needs to provide the implementation for LPI2C6_GetFreq/InitPins/DeinitPins
  1678. in the application for enabling according instance. */
  1679. extern uint32_t LPI2C6_GetFreq(void);
  1680. static cmsis_lpi2c_resource_t LPI2C6_Resource = {LPI2C6, LPI2C6_GetFreq};
  1681. #if defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN
  1682. #if (defined(FSL_FEATURE_SOC_EDMA_COUNT) && FSL_FEATURE_SOC_EDMA_COUNT)
  1683. static cmsis_lpi2c_edma_resource_t LPI2C6_EdmaResource = {
  1684. RTE_I2C6_DMA_TX_DMA_BASE, RTE_I2C6_DMA_TX_CH, RTE_I2C6_DMA_TX_PERI_SEL,
  1685. RTE_I2C6_DMA_RX_DMA_BASE, RTE_I2C6_DMA_RX_CH, RTE_I2C6_DMA_RX_PERI_SEL,
  1686. #if (defined(FSL_FEATURE_SOC_DMAMUX_COUNT) && FSL_FEATURE_SOC_DMAMUX_COUNT)
  1687. RTE_I2C6_DMA_TX_DMAMUX_BASE, RTE_I2C6_DMA_RX_DMAMUX_BASE,
  1688. #endif
  1689. };
  1690. AT_NONCACHEABLE_SECTION(static lpi2c_master_edma_handle_t LPI2C6_EdmaHandle);
  1691. static edma_handle_t LPI2C6_EdmaTxHandle;
  1692. static edma_handle_t LPI2C6_EdmaRxHandle;
  1693. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1694. ARMCC_SECTION("lpi2c6_edma_driver_state")
  1695. static cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
  1696. #else
  1697. static cmsis_lpi2c_edma_driver_state_t LPI2C6_EdmaDriverState = {
  1698. #endif
  1699. &LPI2C6_Resource, &LPI2C6_EdmaResource, &LPI2C6_EdmaHandle, &LPI2C6_EdmaTxHandle, &LPI2C6_EdmaRxHandle,
  1700. };
  1701. static int32_t LPI2C6_Master_EdmaInitialize(ARM_I2C_SignalEvent_t cb_event)
  1702. {
  1703. #ifdef RTE_I2C6_PIN_INIT
  1704. RTE_I2C6_PIN_INIT();
  1705. #endif
  1706. return LPI2C_Master_EdmaInitialize(cb_event, &LPI2C6_EdmaDriverState);
  1707. }
  1708. static int32_t LPI2C6_Master_EdmaUninitialize(void)
  1709. {
  1710. #ifdef RTE_I2C6_PIN_DEINIT
  1711. RTE_I2C6_PIN_DEINIT();
  1712. #endif
  1713. return LPI2C_Master_EdmaUninitialize(&LPI2C6_EdmaDriverState);
  1714. }
  1715. static int32_t LPI2C6_Master_EdmaPowerControl(ARM_POWER_STATE state)
  1716. {
  1717. return LPI2C_Master_EdmaPowerControl(state, &LPI2C6_EdmaDriverState);
  1718. }
  1719. static int32_t LPI2C6_Master_EdmaTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1720. {
  1721. return LPI2C_Master_EdmaTransmit(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
  1722. }
  1723. static int32_t LPI2C6_Master_EdmaReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1724. {
  1725. return LPI2C_Master_EdmaReceive(addr, data, num, xfer_pending, &LPI2C6_EdmaDriverState);
  1726. }
  1727. static int32_t LPI2C6_Master_EdmaGetDataCount(void)
  1728. {
  1729. return LPI2C_Master_EdmaGetDataCount(&LPI2C6_EdmaDriverState);
  1730. }
  1731. static int32_t LPI2C6_Master_EdmaControl(uint32_t control, uint32_t arg)
  1732. {
  1733. return LPI2C_Master_EdmaControl(control, arg, &LPI2C6_EdmaDriverState);
  1734. }
  1735. static ARM_I2C_STATUS LPI2C6_Master_EdmaGetStatus(void)
  1736. {
  1737. return LPI2C_Master_EdmaGetStatus(&LPI2C6_EdmaDriverState);
  1738. }
  1739. #endif
  1740. #else
  1741. static cmsis_i2c_handle_t LPI2C6_Handle;
  1742. #if defined(__CC_ARM) || defined(__ARMCC_VERSION)
  1743. ARMCC_SECTION("lpi2c6_interrupt_driver_state")
  1744. static cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
  1745. #else
  1746. static cmsis_lpi2c_interrupt_driver_state_t LPI2C6_InterruptDriverState = {
  1747. #endif
  1748. &LPI2C6_Resource,
  1749. &LPI2C6_Handle,
  1750. };
  1751. static void KSDK_LPI2C6_SLAVE_InterruptCallback(LPI2C_Type *base, lpi2c_slave_transfer_t *xfer, void *userData)
  1752. {
  1753. KSDK_LPI2C_SLAVE_InterruptCallback(base, xfer, userData, &LPI2C6_InterruptDriverState);
  1754. }
  1755. static int32_t LPI2C6_InterruptInitialize(ARM_I2C_SignalEvent_t cb_event)
  1756. {
  1757. #ifdef RTE_I2C6_PIN_INIT
  1758. RTE_I2C6_PIN_INIT();
  1759. #endif
  1760. return LPI2C_InterruptInitialize(cb_event, &LPI2C6_InterruptDriverState);
  1761. }
  1762. static int32_t LPI2C6_InterruptUninitialize(void)
  1763. {
  1764. #ifdef RTE_I2C6_PIN_DEINIT
  1765. RTE_I2C6_PIN_DEINIT();
  1766. #endif
  1767. return LPI2C_InterruptUninitialize(&LPI2C6_InterruptDriverState);
  1768. }
  1769. static int32_t LPI2C6_InterruptPowerControl(ARM_POWER_STATE state)
  1770. {
  1771. return LPI2C_InterruptPowerControl(state, &LPI2C6_InterruptDriverState);
  1772. }
  1773. static int32_t LPI2C6_Master_InterruptTransmit(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
  1774. {
  1775. return LPI2C_Master_InterruptTransmit(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
  1776. }
  1777. static int32_t LPI2C6_Master_InterruptReceive(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
  1778. {
  1779. return LPI2C_Master_InterruptReceive(addr, data, num, xfer_pending, &LPI2C6_InterruptDriverState);
  1780. }
  1781. static int32_t LPI2C6_Slave_InterruptTransmit(const uint8_t *data, uint32_t num)
  1782. {
  1783. LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
  1784. return LPI2C_Slave_InterruptTransmit(data, num, &LPI2C6_InterruptDriverState);
  1785. }
  1786. static int32_t LPI2C6_Slave_InterruptReceive(uint8_t *data, uint32_t num)
  1787. {
  1788. LPI2C6_InterruptDriverState.handle->slave_handle.callback = KSDK_LPI2C6_SLAVE_InterruptCallback;
  1789. return LPI2C_Slave_InterruptReceive(data, num, &LPI2C6_InterruptDriverState);
  1790. }
  1791. static int32_t LPI2C6_InterruptGetDataCount(void)
  1792. {
  1793. return LPI2C_InterruptGetDataCount(&LPI2C6_InterruptDriverState);
  1794. }
  1795. static int32_t LPI2C6_InterruptControl(uint32_t control, uint32_t arg)
  1796. {
  1797. return LPI2C_InterruptControl(control, arg, &LPI2C6_InterruptDriverState);
  1798. }
  1799. static ARM_I2C_STATUS LPI2C6_InterruptGetStatus(void)
  1800. {
  1801. return LPI2C_InterruptGetStatus(&LPI2C6_InterruptDriverState);
  1802. }
  1803. #endif /* RTE_I2C6_DMA_EN */
  1804. ARM_DRIVER_I2C Driver_I2C6 = {LPI2Cx_GetVersion,
  1805. LPI2Cx_GetCapabilities,
  1806. #if defined(RTE_I2C6_DMA_EN) && RTE_I2C6_DMA_EN
  1807. LPI2C6_Master_EdmaInitialize,
  1808. LPI2C6_Master_EdmaUninitialize,
  1809. LPI2C6_Master_EdmaPowerControl,
  1810. LPI2C6_Master_EdmaTransmit,
  1811. LPI2C6_Master_EdmaReceive,
  1812. NULL,
  1813. NULL,
  1814. LPI2C6_Master_EdmaGetDataCount,
  1815. LPI2C6_Master_EdmaControl,
  1816. LPI2C6_Master_EdmaGetStatus
  1817. #else
  1818. LPI2C6_InterruptInitialize,
  1819. LPI2C6_InterruptUninitialize,
  1820. LPI2C6_InterruptPowerControl,
  1821. LPI2C6_Master_InterruptTransmit,
  1822. LPI2C6_Master_InterruptReceive,
  1823. LPI2C6_Slave_InterruptTransmit,
  1824. LPI2C6_Slave_InterruptReceive,
  1825. LPI2C6_InterruptGetDataCount,
  1826. LPI2C6_InterruptControl,
  1827. LPI2C6_InterruptGetStatus
  1828. #endif /* RTE_I2C6_DMA_EN */
  1829. };
  1830. #endif /* LPI2C6 */